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.idea | ||
.vscode | ||
Software/build | ||
.vscode |
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all: lcd_test.rom | ||
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clean: | ||
rm -f *.lst *.map *.o *.rom | ||
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%.o: src/%.s | ||
ca65 -o $@ $< | ||
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%.rom: %.o ../kw6502.cfg | ||
ld65 -C ../kw6502.cfg -o build/$@ $< | ||
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.PHONY: all clean |
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# LCD Test | ||
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This program puts "Hello, world!" on the LCD |
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...lcd_hello_world/build/lcd_hello_world.rom → Software/01_lcd_test/build/lcd_test.rom
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E = %10000000 | ||
RW = %01000000 | ||
RS = %00100000 | ||
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init_lcd: | ||
lda #%11111111 ; Set all pins on port B to output | ||
sta via_ddrb | ||
lda #%11100000 ; Set top 3 pins on port A to output | ||
sta via_ddra | ||
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lda #%00111000 ; Set 8-bit mode; 2-line display; 5x8 font | ||
jsr lcd_instruction | ||
lda #%00001110 ; Display on; cursor on; blink off | ||
jsr lcd_instruction | ||
lda #%00000110 ; Increment and shift cursor; don't shift display | ||
jsr lcd_instruction | ||
lda #$00000001 ; Clear display | ||
jsr lcd_instruction | ||
rts | ||
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_lcd_wait: | ||
pha | ||
lda #%00000000 ; Port B is input | ||
sta via_ddrb | ||
_lcdbusy: | ||
lda #RW | ||
sta via_a | ||
lda #(RW | E) | ||
sta via_a | ||
lda via_b | ||
and #%10000000 | ||
bne _lcdbusy | ||
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lda #RW | ||
sta via_a | ||
lda #%11111111 ; Port B is output | ||
sta via_ddrb | ||
pla | ||
rts | ||
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lcd_instruction: | ||
jsr _lcd_wait | ||
sta via_b | ||
lda #0 ; Clear RS/RW/E bits | ||
sta via_a | ||
lda #E ; Set E bit to send instruction | ||
sta via_a | ||
lda #0 ; Clear RS/RW/E bits | ||
sta via_a | ||
rts | ||
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write_lcd: | ||
pha | ||
jsr _lcd_wait | ||
sta via_b | ||
lda #RS ; Set RS; Clear RW/E bits | ||
sta via_a | ||
lda #(RS | E) ; Set E bit to send instruction | ||
sta via_a | ||
lda #RS ; Clear E bits | ||
sta via_a | ||
pla | ||
rts |
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.segment "CODE" | ||
.include "main.s" | ||
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.segment "ACIA" | ||
acia_data: .res 1 ; Read: Receiver Data Register - Write: Transmit Data Register | ||
acia_status: .res 1 ; Read: Status Register - Write: Programmed Reset (Data is "Don't Care") | ||
acia_command: .res 1 ; Command Register | ||
acia_control: .res 1 ; Control Register | ||
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.segment "VIA" | ||
via_b: .res 1 ; Register "B" | ||
via_a: .res 1 ; Register "A" | ||
via_ddrb: .res 1 ; Data Direction Register "B" | ||
via_ddra: .res 1 ; Data Direction Register "A" | ||
via_t1c_l: .res 1 ; Read: T1 Low-Order Counter - Write: T1 Low-Order Latches | ||
via_t1c_h: .res 1 ; T1 High-Order Counter | ||
via_t1l_l: .res 1 ; T1 Low-Order Latches | ||
via_t1l_h: .res 1 ; T1 High-Order Latches | ||
via_t2c_l: .res 1 ; Read: T2 Low-Order Counter - Write: T2 Low-Order Latches | ||
via_t2c_h: .res 1 ; T2 High-Order Counter | ||
via_sr: .res 1 ; Shift Register | ||
via_acr: .res 1 ; Auxilary Control Register | ||
via_pcr: .res 1 ; Peripheral Control Register | ||
via_ifr: .res 1 ; Interrupt Flag Register | ||
via_ier: .res 1 ; Interrupt Enable Register | ||
via_a_noh: .res 1 ; Same as Register "A" (via_a) except no "Handshake" | ||
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.segment "VECTORS" | ||
.word nmi | ||
.word main | ||
.word irq |
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.include "lcd.s" | ||
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main: | ||
; Initialize LCD | ||
jsr init_lcd ; lcd.s | ||
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; Loop through 'message' and print the characters | ||
ldx #0 | ||
print: | ||
lda message,x ; Load character | ||
beq exit ; If end of message go to exit | ||
jsr write_lcd ; Print character | ||
inx ; Increment Loop Idx | ||
jmp print | ||
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exit: | ||
jmp exit | ||
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message: .asciiz "Hello, world!" | ||
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nmi: | ||
rti | ||
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irq: | ||
rti |
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all: serial_test.rom | ||
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clean: | ||
rm -f *.lst *.map *.o *.rom | ||
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%.o: src/%.s | ||
ca65 -o $@ $< | ||
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%.rom: %.o ../kw6502.cfg | ||
ld65 -C ../kw6502.cfg -o build/$@ $< | ||
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.PHONY: all clean |
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# Serial Test | ||
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This program reads and writes to the serial monitor. | ||
Every time you press a key on the serial monitor, a counter gets incremented and written to the serial monitor. | ||
The counter gets reset to 0 after it passes 9 |
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.include "serial.s" | ||
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main: | ||
; Initialize Serial | ||
jsr init_serial ; serial.s | ||
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; create read loop | ||
ldx #0 | ||
read: | ||
jsr read_serial ; read serial | ||
cpx #$a ; compare x register with a | ||
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bcc continue_writing ; continue if x is less than a (so 0-9) | ||
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ldx #0 ; if not 0-9: reset x | ||
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continue_writing: | ||
txa ; put x in a | ||
ora #%00110000 ; set correct upper 4 bits to get the correct character codes (logical inclusive or) | ||
jsr write_serial ; write a (modified index) to serial | ||
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inx | ||
jmp read | ||
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nmi: | ||
rti | ||
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irq: | ||
rti |
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init_serial: | ||
sta acia_status ; Programmed Reset (Data is "Don't Care") | ||
lda #%00001011 ; No parity, no echo, no interrupt | ||
sta acia_command | ||
lda #%00011111 ; 1 stop bit, 8 data bits, 19200 baud | ||
sta acia_control | ||
rts | ||
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read_serial: | ||
lda acia_status | ||
and #%00001000 | ||
beq read_serial | ||
lda acia_data | ||
rts | ||
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write_serial: | ||
pha | ||
_wait_tx_empty: | ||
lda acia_status | ||
and #%00010000 | ||
beq _wait_tx_empty | ||
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pla | ||
sta acia_data ; Send to ACIA | ||
rts |
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.segment "CODE" | ||
.include "main.s" | ||
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.segment "ACIA" | ||
acia_data: .res 1 ; Read: Receiver Data Register - Write: Transmit Data Register | ||
acia_status: .res 1 ; Read: Status Register - Write: Programmed Reset (Data is "Don't Care") | ||
acia_command: .res 1 ; Command Register | ||
acia_control: .res 1 ; Control Register | ||
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.segment "VIA" | ||
via_b: .res 1 ; Register "B" | ||
via_a: .res 1 ; Register "A" | ||
via_ddrb: .res 1 ; Data Direction Register "B" | ||
via_ddra: .res 1 ; Data Direction Register "A" | ||
via_t1c_l: .res 1 ; Read: T1 Low-Order Counter - Write: T1 Low-Order Latches | ||
via_t1c_h: .res 1 ; T1 High-Order Counter | ||
via_t1l_l: .res 1 ; T1 Low-Order Latches | ||
via_t1l_h: .res 1 ; T1 High-Order Latches | ||
via_t2c_l: .res 1 ; Read: T2 Low-Order Counter - Write: T2 Low-Order Latches | ||
via_t2c_h: .res 1 ; T2 High-Order Counter | ||
via_sr: .res 1 ; Shift Register | ||
via_acr: .res 1 ; Auxilary Control Register | ||
via_pcr: .res 1 ; Peripheral Control Register | ||
via_ifr: .res 1 ; Interrupt Flag Register | ||
via_ier: .res 1 ; Interrupt Enable Register | ||
via_a_noh: .res 1 ; Same as Register "A" (via_a) except no "Handshake" | ||
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.segment "VECTORS" | ||
.word nmi | ||
.word main | ||
.word irq |
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all: serial_and_lcd.rom | ||
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clean: | ||
rm -f *.lst *.map *.o *.rom | ||
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%.o: src/%.s | ||
ca65 -o $@ $< | ||
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%.rom: %.o ../kw6502.cfg | ||
ld65 -C ../kw6502.cfg -o build/$@ $< | ||
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.PHONY: all clean |
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# Serial and LCD | ||
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This program reads from the serial monitor and output it on both the lcd and serial monitor. |
Binary file not shown.
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E = %10000000 | ||
RW = %01000000 | ||
RS = %00100000 | ||
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init_lcd: | ||
lda #%11111111 ; Set all pins on port B to output | ||
sta via_ddrb | ||
lda #%11100000 ; Set top 3 pins on port A to output | ||
sta via_ddra | ||
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lda #%00111000 ; Set 8-bit mode; 2-line display; 5x8 font | ||
jsr lcd_instruction | ||
lda #%00001110 ; Display on; cursor on; blink off | ||
jsr lcd_instruction | ||
lda #%00000110 ; Increment and shift cursor; don't shift display | ||
jsr lcd_instruction | ||
lda #$00000001 ; Clear display | ||
jsr lcd_instruction | ||
rts | ||
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_lcd_wait: | ||
pha | ||
lda #%00000000 ; Port B is input | ||
sta via_ddrb | ||
_lcdbusy: | ||
lda #RW | ||
sta via_a | ||
lda #(RW | E) | ||
sta via_a | ||
lda via_b | ||
and #%10000000 | ||
bne _lcdbusy | ||
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lda #RW | ||
sta via_a | ||
lda #%11111111 ; Port B is output | ||
sta via_ddrb | ||
pla | ||
rts | ||
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lcd_instruction: | ||
jsr _lcd_wait | ||
sta via_b | ||
lda #0 ; Clear RS/RW/E bits | ||
sta via_a | ||
lda #E ; Set E bit to send instruction | ||
sta via_a | ||
lda #0 ; Clear RS/RW/E bits | ||
sta via_a | ||
rts | ||
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write_lcd: | ||
pha | ||
jsr _lcd_wait | ||
sta via_b | ||
lda #RS ; Set RS; Clear RW/E bits | ||
sta via_a | ||
lda #(RS | E) ; Set E bit to send instruction | ||
sta via_a | ||
lda #RS ; Clear E bits | ||
sta via_a | ||
pla | ||
rts |
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.include "lcd.s" | ||
.include "serial.s" | ||
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main: | ||
; Initialize LCD and Serial | ||
jsr init_lcd ; lcd.s | ||
jsr init_serial ; serial.s | ||
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read: | ||
jsr read_serial ; Wait until data is received and store in a | ||
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jsr write_serial ; Send to ACIA | ||
jsr write_lcd ; Send to LCD | ||
jmp read | ||
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nmi: | ||
rti | ||
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irq: | ||
rti |
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init_serial: | ||
sta acia_status ; Programmed Reset (Data is "Don't Care") | ||
lda #%00001011 ; No parity, no echo, no interrupt | ||
sta acia_command | ||
lda #%00011111 ; 1 stop bit, 8 data bits, 19200 baud | ||
sta acia_control | ||
rts | ||
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read_serial: | ||
lda acia_status | ||
and #%00001000 | ||
beq read_serial | ||
lda acia_data | ||
rts | ||
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write_serial: | ||
pha | ||
_wait_tx_empty: | ||
lda acia_status | ||
and #%00010000 | ||
beq _wait_tx_empty | ||
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pla | ||
sta acia_data ; Send to ACIA | ||
rts |
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