Zilog Z280 MPU Board in 16-bit Z-BUS mode
- CPU clock 12MHz (Bus clock 6MHz)
- 16-bit Z-BUS
- ROM 2M-bit EEPROM x 2 (First 4k-Byte active)
- RAM 1M-bit SRAM x 2
- I/O extention connector x 1
| File and Directory | Discription |
|---|---|
| Z280_MainBoard.pdf | MPU board circuit diagram |
| IDE_Interface.pdf | IDE interface circuit diaglam |
| Z280CPLD.PLD | ATF1502 CPLD definition file |
| z280mon/ | Z280 mini monitor |
MIT License