From 905e4d31e45e503536ebc3cdb9707de0469be758 Mon Sep 17 00:00:00 2001 From: Amjad Alsharafi <26300843+Amjad50@users.noreply.github.com> Date: Wed, 13 Mar 2024 17:36:10 +0300 Subject: [PATCH 1/6] Testing: small changes to blargg tests I think this doesn't change anything, since we already test `mem_timing` --- mizu-core/src/tests/blargg_tests.rs | 5 +++++ mizu-core/src/tests/mooneye_tests.rs | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/mizu-core/src/tests/blargg_tests.rs b/mizu-core/src/tests/blargg_tests.rs index 9da84cd..30e3622 100644 --- a/mizu-core/src/tests/blargg_tests.rs +++ b/mizu-core/src/tests/blargg_tests.rs @@ -18,6 +18,11 @@ gb_tests!( 3778129031474618196, 3778129031474618196; + blargg_mem_timing, + "blargg-gb-tests/mem_timing/mem_timing.gb", + 12641521912361914783, + 12641521912361914783; + blargg_mem_timing_2, "blargg-gb-tests/mem_timing-2/mem_timing.gb", 12164226896603567743, diff --git a/mizu-core/src/tests/mooneye_tests.rs b/mizu-core/src/tests/mooneye_tests.rs index 7092090..051144b 100644 --- a/mizu-core/src/tests/mooneye_tests.rs +++ b/mizu-core/src/tests/mooneye_tests.rs @@ -207,7 +207,7 @@ mod acceptance { mooneye_tests!("misc"; boot_div-cgbABCDE for cgb, // FIXME: pass but require bootrom - //boot_hwio-C, + // boot_hwio-C, boot_regs-cgb for cgb, ); From 9d2af3695dd6b882b925e70e0fee06c02663a9a0 Mon Sep 17 00:00:00 2001 From: Amjad Alsharafi <26300843+Amjad50@users.noreply.github.com> Date: Wed, 13 Mar 2024 17:51:36 +0300 Subject: [PATCH 2/6] Testing: used `c-sp/gameboy-test-roms` to provide test roms This will make it easier to test and also provide other tests that we can star integrating --- mizu-core/src/tests/acid2_test.rs | 4 ++-- mizu-core/src/tests/blargg_tests.rs | 18 +++++++++--------- mizu-core/src/tests/mod.rs | 2 +- mizu-core/src/tests/rtc3.rs | 6 +++--- mizu-core/src/tests/samesuite_tests.rs | 20 ++++++++++---------- mizu-core/src/tests/save_state_tests.rs | 2 +- mizu-core/src/tests/scribbltests.rs | 2 +- test_roms/tests_data.csv | 10 ++-------- 8 files changed, 29 insertions(+), 35 deletions(-) diff --git a/mizu-core/src/tests/acid2_test.rs b/mizu-core/src/tests/acid2_test.rs index a9e9429..bd41d41 100644 --- a/mizu-core/src/tests/acid2_test.rs +++ b/mizu-core/src/tests/acid2_test.rs @@ -2,12 +2,12 @@ gb_tests!( brk; // clock until break dmg_acid2_test, - "dmg-acid2.gb", + "dmg-acid2/dmg-acid2.gb", 13523824884037480967, 13523824884037480967; cgb_acid2_test for cgb, - "cgb-acid2.gbc", + "cgb-acid2/cgb-acid2.gbc", 0, 4378550468433865064; ); diff --git a/mizu-core/src/tests/blargg_tests.rs b/mizu-core/src/tests/blargg_tests.rs index 30e3622..c9b0224 100644 --- a/mizu-core/src/tests/blargg_tests.rs +++ b/mizu-core/src/tests/blargg_tests.rs @@ -4,44 +4,44 @@ gb_tests!( // FIXME: the test passes but the screen is not correct // the label for test 11 does not show "OK" blargg_cpu_instrs, - "blargg-gb-tests/cpu_instrs/cpu_instrs.gb", + "blargg/cpu_instrs/cpu_instrs.gb", 16599394073517471602, 3892107528677358037; blargg_instr_timing, - "blargg-gb-tests/instr_timing/instr_timing.gb", + "blargg/instr_timing/instr_timing.gb", 14586804626949338345, 14586804626949338345; blargg_halt_bug, - "blargg-gb-tests/halt_bug.gb", + "blargg/halt_bug.gb", 3778129031474618196, 3778129031474618196; blargg_mem_timing, - "blargg-gb-tests/mem_timing/mem_timing.gb", + "blargg/mem_timing/mem_timing.gb", 12641521912361914783, 12641521912361914783; blargg_mem_timing_2, - "blargg-gb-tests/mem_timing-2/mem_timing.gb", + "blargg/mem_timing-2/mem_timing.gb", 12164226896603567743, 12164226896603567743; blargg_dmg_sound_all for dmg, - "blargg-gb-tests/dmg_sound/dmg_sound.gb", + "blargg/dmg_sound/dmg_sound.gb", 9608420910100250529, 0; // cannot test on CGB as it goes into `STOP` for some reason blargg_cgb_sound_all, - "blargg-gb-tests/cgb_sound/cgb_sound.gb", + "blargg/cgb_sound/cgb_sound.gb", 18396380547272095665, // some tests only should fail in DMG (check which are failing) 4141669196667164762; // FIXME: the test passes but the screen is not correct // it shows the numbers, but doesn't print "Passed" blargg_interrupt_time for cgb, - "blargg-gb-tests/interrupt_time/interrupt_time.gb", + "blargg/interrupt_time/interrupt_time.gb", 0, // this test is designed for cgb 3220739068587521835; ); @@ -53,7 +53,7 @@ fn blargg_oam_bug_all() { (false, 2687058989347279874), // cgb should fail, but with this screen ] { let mut gb = crate::tests::TestingGameBoy::new( - "../test_roms/blargg-gb-tests/oam_bug/oam_bug.gb", + "../test_roms/game-boy-test-roms/blargg/oam_bug/oam_bug.gb", is_dmg, ) .unwrap(); diff --git a/mizu-core/src/tests/mod.rs b/mizu-core/src/tests/mod.rs index 84b0355..8c12816 100644 --- a/mizu-core/src/tests/mod.rs +++ b/mizu-core/src/tests/mod.rs @@ -37,7 +37,7 @@ macro_rules! gb_tests { } - let file_path = concat!("../test_roms/", $file_path); + let file_path = concat!("../test_roms/game-boy-test-roms/", $file_path); let mut emu = String::new(); $(emu += stringify!($emu);)? diff --git a/mizu-core/src/tests/rtc3.rs b/mizu-core/src/tests/rtc3.rs index b1f8cf2..dcad5ae 100644 --- a/mizu-core/src/tests/rtc3.rs +++ b/mizu-core/src/tests/rtc3.rs @@ -2,17 +2,17 @@ gb_tests!( brk; // clock until break rtc3test_1, - "rtc3test/rtc3test-1.gb", + "../rtc3test/rtc3test-1.gb", 5668068657756263343, 13700459787635561240; rtc3test_2, - "rtc3test/rtc3test-2.gb", + "../rtc3test/rtc3test-2.gb", 9943343428460028138, 14288417446659987136; rtc3test_3, - "rtc3test/rtc3test-3.gb", + "../rtc3test/rtc3test-3.gb", 11694994367292180084, 2728978286698242625; ); diff --git a/mizu-core/src/tests/samesuite_tests.rs b/mizu-core/src/tests/samesuite_tests.rs index 5be44b6..76338b0 100644 --- a/mizu-core/src/tests/samesuite_tests.rs +++ b/mizu-core/src/tests/samesuite_tests.rs @@ -2,52 +2,52 @@ gb_tests!( brk; // clock until break dma_gbc_dma_cont for cgb, - "SameSuite/dma/gbc_dma_cont.gb", + "same-suite/dma/gbc_dma_cont.gb", 0, 11599733213654421168; dma_gdma_addr_mask for cgb, - "SameSuite/dma/gdma_addr_mask.gb", + "same-suite/dma/gdma_addr_mask.gb", 0, 9261950325417747531; dma_hdma_lcd_off for cgb, - "SameSuite/dma/hdma_lcd_off.gb", + "same-suite/dma/hdma_lcd_off.gb", 0, 1934747480547799326; dma_hdma_mode0 for cgb, - "SameSuite/dma/hdma_mode0.gb", + "same-suite/dma/hdma_mode0.gb", 0, 1934747480547799326; ppu_blocking_bgpi_increase for cgb, - "SameSuite/ppu/blocking_bgpi_increase.gb", + "same-suite/ppu/blocking_bgpi_increase.gb", 0, 8677756512934466165; apu_div_write_trigger_10, - "SameSuite/apu/div_write_trigger_10.gb", + "same-suite/apu/div_write_trigger_10.gb", 6901507070137769233, 15470169245269049758; apu_div_write_trigger, - "SameSuite/apu/div_write_trigger.gb", + "same-suite/apu/div_write_trigger.gb", 14744474223730903048, 5536075953610796630; apu_div_write_trigger_volume for cgb, - "SameSuite/apu/div_write_trigger_volume.gb", + "same-suite/apu/div_write_trigger_volume.gb", 0, 364719782163348138; apu_div_write_trigger_volume_10 for cgb, - "SameSuite/apu/div_write_trigger_volume_10.gb", + "same-suite/apu/div_write_trigger_volume_10.gb", 0, 4353720675538315229; apu_div_trigger_volume_10 for cgb, - "SameSuite/apu/div_trigger_volume_10.gb", + "same-suite/apu/div_trigger_volume_10.gb", 0, 4353720675538315229; ); diff --git a/mizu-core/src/tests/save_state_tests.rs b/mizu-core/src/tests/save_state_tests.rs index da2297d..9077888 100644 --- a/mizu-core/src/tests/save_state_tests.rs +++ b/mizu-core/src/tests/save_state_tests.rs @@ -5,7 +5,7 @@ fn load_state() { // 0- perform normal test (this part should always pass) const CGB_CRC: u64 = 4378550468433865064; - let file_path = "../test_roms/cgb-acid2.gbc"; + let file_path = "../test_roms/game-boy-test-roms/cgb-acid2/cgb-acid2.gbc"; // 1- make sure after start and advancing 2 frames does not pass the test let mut gb = crate::tests::TestingGameBoy::new(file_path, false).unwrap(); diff --git a/mizu-core/src/tests/scribbltests.rs b/mizu-core/src/tests/scribbltests.rs index e63c043..094d380 100644 --- a/mizu-core/src/tests/scribbltests.rs +++ b/mizu-core/src/tests/scribbltests.rs @@ -32,7 +32,7 @@ fn statcount_auto() { let is_dmg = i == 0; let mut gb = TestingGameBoy::new( - "../test_roms/scribbltests/statcount/statcount-auto.gb", + "../test_roms/game-boy-test-roms/scribbltests/statcount/statcount-auto.gb", is_dmg, ) .unwrap(); diff --git a/test_roms/tests_data.csv b/test_roms/tests_data.csv index 1ba3711..b5deaa7 100644 --- a/test_roms/tests_data.csv +++ b/test_roms/tests_data.csv @@ -1,12 +1,6 @@ #url,installation_type,destination_folder,[branch] -https://gekkio.fi/files/mooneye-test-suite/mts-20220509-1908-c7d75b7/mts-20220509-1908-c7d75b7.zip,unzip_rename_inner_if_alone,mooneye-gb_hwtests -https://github.com/Hacktix/scribbltests,git,scribbltests -https://github.com/mattcurrie/dmg-acid2/releases/latest/download/dmg-acid2.gb,none,dmg-acid2.gb -https://github.com/mattcurrie/cgb-acid2/releases/latest/download/cgb-acid2.gbc,none,cgb-acid2.gbc -https://github.com/retrio/gb-test-roms,git,blargg-gb-tests -#dependancy_for_SameSuite -https://github.com/gbdev/rgbds,git_make_install,rgbds,v0.6.1 -https://github.com/LIJI32/SameSuite,git_make,SameSuite +https://gekkio.fi/files/mooneye-test-suite/mts-20240127-1204-74ae166/mts-20240127-1204-74ae166.zip,unzip_rename_inner_if_alone,mooneye-gb_hwtests +https://github.com/c-sp/gameboy-test-roms/releases/download/v7.0/game-boy-test-roms-v7.0.zip,unzip_rename_inner_if_alone,game-boy-test-roms #dependancy_for_rtc3test_diff_version https://github.com/gbdev/rgbds,git_make_install,rgbds,v0.4.2 https://github.com/Amjad50/rtc3test,git_make,rtc3test From 4537c8d0fd33375f16517399b812381e00a0dd9c Mon Sep 17 00:00:00 2001 From: Amjad Alsharafi <26300843+Amjad50@users.noreply.github.com> Date: Wed, 13 Mar 2024 21:54:09 +0300 Subject: [PATCH 3/6] Testing: Added `gbmicrotest` tests that are passing For now, we just add these tests, then we can improve the emulator based on them later. --- mizu-core/src/tests/gbmicrotest.rs | 572 +++++++++++++++++++++++++++++ mizu-core/src/tests/mod.rs | 1 + 2 files changed, 573 insertions(+) create mode 100644 mizu-core/src/tests/gbmicrotest.rs diff --git a/mizu-core/src/tests/gbmicrotest.rs b/mizu-core/src/tests/gbmicrotest.rs new file mode 100644 index 0000000..ce3f9d7 --- /dev/null +++ b/mizu-core/src/tests/gbmicrotest.rs @@ -0,0 +1,572 @@ +use std::error::Error; + +use crate::cpu::CpuBusProvider; + +fn gbmicrotest_test(file_path: &str, is_dmg: bool) -> Result<(), Box> { + let mut gb = crate::tests::TestingGameBoy::new(file_path, is_dmg).unwrap(); + + // gb.print_screen_buffer(); + + let mut passed = gb.bus.read_no_oam_bug(0xFF82); + let mut limit = 200; + while passed == 0 && limit != 0 { + gb.clock_for_frame(); + limit -= 1; + passed = gb.bus.read_no_oam_bug(0xFF82); + } + + let actual = gb.bus.read_no_oam_bug(0xFF80); + let expected = gb.bus.read_no_oam_bug(0xFF81); + + assert!( + passed == 0x01, + "passed = {passed:02X}, actual = {actual:02X}, expected = {expected:02X}" + ); + + Ok(()) +} + +macro_rules! gbmicrotest_tests { + ($($test_name: ident $(: $file_name: expr)? $(,)?),*) => { + $( + /// Run the test and check memory addresses specific values (take from gbmicrotest) + #[test] + #[allow(unused_mut)] + #[allow(non_snake_case)] + fn $test_name() -> ::std::result::Result<(), Box> { + + let mut file_name = String::new(); + $(file_name += stringify!($file_name);)? + + if file_name.is_empty() { + file_name = stringify!($test_name).to_owned() + ".gb"; + } + + let file_path = "../test_roms/game-boy-test-roms/gbmicrotest/".to_owned() + &file_name; + + + crate::tests::gbmicrotest::gbmicrotest_test(&file_path, true)?; + crate::tests::gbmicrotest::gbmicrotest_test(&file_path, false)?; + Ok(()) + } + )* + }; +} + +#[rustfmt::skip] +gbmicrotest_tests!( + // audio_testbench, + // ppu_latch_bgdisplay: "803-ppu-latch-bgdisplay.gb", + // cpu_bus_1, + div_inc_timing_a, + div_inc_timing_b, + dma_0x1000, + dma_0x9000, + dma_0xA000, + dma_0xC000, + dma_0xE000, + // dma_basic, + dma_timing_a, + // dma: "400-dma.gb", + // flood_vram, + // halt_bug, + // halt_op_dupe_delay, + halt_op_dupe, + // hblank_int_di_timing_a, + hblank_int_di_timing_b, + // hblank_int_if_a, + hblank_int_if_b, + // hblank_int_l0, + // hblank_int_l1, + // hblank_int_l2, + hblank_int_scx0_if_a, + hblank_int_scx0_if_b, + hblank_int_scx0_if_c, + hblank_int_scx0_if_d, + // hblank_int_scx0, + hblank_int_scx1_if_a, + hblank_int_scx1_if_b, + hblank_int_scx1_if_c, + hblank_int_scx1_if_d, + hblank_int_scx1_nops_a, + hblank_int_scx1_nops_b, + // hblank_int_scx1, + hblank_int_scx2_if_a, + // hblank_int_scx2_if_b, + // hblank_int_scx2_if_c, + // hblank_int_scx2_if_d, + // hblank_int_scx2_nops_a, + // hblank_int_scx2_nops_b, + // hblank_int_scx2, + hblank_int_scx3_if_a, + hblank_int_scx3_if_b, + hblank_int_scx3_if_c, + hblank_int_scx3_if_d, + hblank_int_scx3_nops_a, + hblank_int_scx3_nops_b, + hblank_int_scx3, + hblank_int_scx4_if_a, + hblank_int_scx4_if_b, + hblank_int_scx4_if_c, + hblank_int_scx4_if_d, + hblank_int_scx4_nops_a, + hblank_int_scx4_nops_b, + // hblank_int_scx4, + hblank_int_scx5_if_a, + hblank_int_scx5_if_b, + hblank_int_scx5_if_c, + hblank_int_scx5_if_d, + hblank_int_scx5_nops_a, + hblank_int_scx5_nops_b, + // hblank_int_scx5, + hblank_int_scx6_if_a, + // hblank_int_scx6_if_b, + // hblank_int_scx6_if_c, + // hblank_int_scx6_if_d, + // hblank_int_scx6_nops_a, + // hblank_int_scx6_nops_b, + // hblank_int_scx6, + hblank_int_scx7_if_a, + hblank_int_scx7_if_b, + hblank_int_scx7_if_c, + hblank_int_scx7_if_d, + hblank_int_scx7_nops_a, + hblank_int_scx7_nops_b, + // hblank_int_scx7, + // hblank_scx2_if_a, + hblank_scx3_if_a, + // hblank_scx3_if_b, + // hblank_scx3_if_c, + // hblank_scx3_if_d, + hblank_scx3_int_a, + // hblank_scx3_int_b, + int_hblank_halt_bug_a, + int_hblank_halt_bug_b, + // int_hblank_halt_scx0, + // int_hblank_halt_scx1, + // int_hblank_halt_scx2, + // int_hblank_halt_scx3, + // int_hblank_halt_scx4, + // int_hblank_halt_scx5, + // int_hblank_halt_scx6, + // int_hblank_halt_scx7, + // int_hblank_incs_scx0, + // int_hblank_incs_scx1, + // int_hblank_incs_scx2, + // int_hblank_incs_scx3, + // int_hblank_incs_scx4, + // int_hblank_incs_scx5, + // int_hblank_incs_scx6, + // int_hblank_incs_scx7, + // int_hblank_nops_scx0, + // int_hblank_nops_scx1, + // int_hblank_nops_scx2, + // int_hblank_nops_scx3, + // int_hblank_nops_scx4, + // int_hblank_nops_scx5, + // int_hblank_nops_scx6, + // int_hblank_nops_scx7, + // int_lyc_halt, + int_lyc_incs, + // int_lyc_nops, + // int_oam_halt, + // int_oam_incs, + // int_oam_nops, + int_timer_halt_div_a, + // int_timer_halt_div_b, + // int_timer_halt, + int_timer_incs, + int_timer_nops_div_a, + int_timer_nops_div_b, + int_timer_nops, + // int_vblank1_halt, + // int_vblank1_incs, + // int_vblank1_nops, + // int_vblank2_halt, + // int_vblank2_incs, + // int_vblank2_nops, + is_if_set_during_ime0, + // lcd_on_stat: "007-lcd_on_stat.gb", + // lcdon_halt_to_vblank_int_a, + lcdon_halt_to_vblank_int_b, + // lcdon_nops_to_vblank_int_a, + lcdon_nops_to_vblank_int_b, + lcdon_to_if_oam_a, + // lcdon_to_if_oam_b, + lcdon_to_ly1_a, + lcdon_to_ly1_b, + lcdon_to_ly2_a, + lcdon_to_ly2_b, + lcdon_to_ly3_a, + lcdon_to_ly3_b, + lcdon_to_lyc1_int, + lcdon_to_lyc2_int, + lcdon_to_lyc3_int, + // lcdon_to_oam_int_l0, + // lcdon_to_oam_int_l1, + // lcdon_to_oam_int_l2, + lcdon_to_oam_unlock_a, + lcdon_to_oam_unlock_b, + lcdon_to_oam_unlock_c, + // lcdon_to_oam_unlock_d, + lcdon_to_stat0_a, + lcdon_to_stat0_b, + lcdon_to_stat0_c, + lcdon_to_stat0_d, + lcdon_to_stat1_a, + // lcdon_to_stat1_b, + lcdon_to_stat1_c, + // lcdon_to_stat1_d, + lcdon_to_stat1_e, + // lcdon_to_stat2_a, + lcdon_to_stat2_b, + lcdon_to_stat2_c, + lcdon_to_stat2_d, + lcdon_to_stat3_a, + lcdon_to_stat3_b, + lcdon_to_stat3_c, + lcdon_to_stat3_d, + // lcdon_write_timing, + line_144_oam_int_a, + // line_144_oam_int_b, + // line_144_oam_int_c, + // line_144_oam_int_d, + line_153_ly_a, + line_153_ly_b, + // line_153_ly_c, + line_153_ly_d, + // line_153_ly_e, + line_153_ly_f, + line_153_lyc_a, + line_153_lyc_b, + // line_153_lyc_c, + line_153_lyc_int_a, + line_153_lyc_int_b, + line_153_lyc0_int_inc_sled, + line_153_lyc0_stat_timing_a, + line_153_lyc0_stat_timing_b, + line_153_lyc0_stat_timing_c, + line_153_lyc0_stat_timing_d, + line_153_lyc0_stat_timing_e, + // line_153_lyc0_stat_timing_f, + line_153_lyc0_stat_timing_g, + // line_153_lyc0_stat_timing_h, + line_153_lyc0_stat_timing_i, + // line_153_lyc0_stat_timing_j, + line_153_lyc0_stat_timing_k, + line_153_lyc0_stat_timing_l, + // line_153_lyc0_stat_timing_m, + line_153_lyc0_stat_timing_n, + line_153_lyc153_stat_timing_a, + line_153_lyc153_stat_timing_b, + // line_153_lyc153_stat_timing_c, + line_153_lyc153_stat_timing_d, + // line_153_lyc153_stat_timing_e, + line_153_lyc153_stat_timing_f, + // line_65_ly, + // ly_while_lcd_off, + // lyc_int_halt_a, + lyc_int_halt_b, + // lyc1_int_halt_a, + lyc1_int_halt_b, + lyc1_int_if_edge_a, + lyc1_int_if_edge_b, + lyc1_int_if_edge_c, + lyc1_int_if_edge_d, + lyc1_int_nops_a, + lyc1_int_nops_b, + lyc1_write_timing_a, + lyc1_write_timing_b, + lyc1_write_timing_c, + lyc1_write_timing_d, + // lyc2_int_halt_a, + lyc2_int_halt_b, + mbc1_ram_banks, + // mbc1_rom_banks, + // minimal, + // mode2_stat_int_to_oam_unlock, + // oam_int_halt_a, + oam_int_halt_b, + oam_int_if_edge_a, + // oam_int_if_edge_b, + oam_int_if_edge_c, + // oam_int_if_edge_d, + oam_int_if_level_c, + // oam_int_if_level_d, + // oam_int_inc_sled, + // oam_int_nops_a, + oam_int_nops_b, + // oam_lock: "000-oam_lock.gb", + oam_read_l0_a, + oam_read_l0_b, + oam_read_l0_c, + // oam_read_l0_d, + oam_read_l1_a, + oam_read_l1_b, + oam_read_l1_c, + // oam_read_l1_d, + oam_read_l1_e, + oam_read_l1_f, + // oam_sprite_trashing, + oam_write_l0_a, + oam_write_l0_b, + oam_write_l0_c, + // oam_write_l0_d, + // oam_write_l0_e, + oam_write_l1_a, + oam_write_l1_b, + // oam_write_l1_c, + oam_write_l1_d, + oam_write_l1_e, + // oam_write_l1_f, + poweron_bgp_000, + // poweron_div_000, + // poweron_div_004, + // poweron_div_005, + // poweron_dma_000, + poweron_if_000, + poweron_joy_000, + poweron_lcdc_000, + poweron_ly_000, + // poweron_ly_119, + poweron_ly_120, + // poweron_ly_233, + poweron_ly_234, + poweron_lyc_000, + poweron_oam_000, + poweron_oam_005, + poweron_oam_006, + poweron_oam_069, + poweron_oam_070, + // poweron_oam_119, + poweron_oam_120, + poweron_oam_121, + poweron_oam_183, + poweron_oam_184, + // poweron_oam_233, + poweron_oam_234, + poweron_oam_235, + poweron_obp0_000, + poweron_obp1_000, + poweron_sb_000, + poweron_sc_000, + poweron_scx_000, + poweron_scy_000, + poweron_stat_000, + poweron_stat_005, + // poweron_stat_006, + poweron_stat_007, + // poweron_stat_026, + poweron_stat_027, + // poweron_stat_069, + poweron_stat_070, + poweron_stat_119, + // poweron_stat_120, + poweron_stat_121, + // poweron_stat_140, + poweron_stat_141, + // poweron_stat_183, + poweron_stat_184, + // poweron_stat_234, + poweron_stat_235, + poweron_tac_000, + poweron_tima_000, + poweron_tma_000, + poweron_vram_000, + poweron_vram_025, + // poweron_vram_026, + // poweron_vram_069, + poweron_vram_070, + poweron_vram_139, + // poweron_vram_140, + // poweron_vram_183, + poweron_vram_184, + poweron_wx_000, + poweron_wy_000, + // poweron, + // ppu_scx_vs_bgp, + // ppu_sprite_testbench, + ppu_sprite0_scx0_a, + ppu_sprite0_scx0_b, + ppu_sprite0_scx1_a, + ppu_sprite0_scx1_b, + ppu_sprite0_scx2_a, + // ppu_sprite0_scx2_b, + ppu_sprite0_scx3_a, + // ppu_sprite0_scx3_b, + ppu_sprite0_scx4_a, + ppu_sprite0_scx4_b, + ppu_sprite0_scx5_a, + ppu_sprite0_scx5_b, + ppu_sprite0_scx6_a, + // ppu_sprite0_scx6_b, + ppu_sprite0_scx7_a, + // ppu_sprite0_scx7_b, + // ppu_spritex_vs_scx, + // ppu_win_vs_wx, + // ppu_wx_early, + // ppu_latch_scx: "800-ppu-latch-scx.gb", + // ppu_latch_scy: "801-ppu-latch-scy.gb", + // sprite_0_a, + sprite_0_b, + // sprite_1_a, + sprite_1_b, + // sprite4_0_a, + sprite4_0_b, + // sprite4_1_a, + sprite4_1_b, + // sprite4_2_a, + sprite4_2_b, + // sprite4_3_a, + sprite4_3_b, + // sprite4_4_a, + sprite4_4_b, + // sprite4_5_a, + sprite4_5_b, + // sprite4_6_a, + sprite4_6_b, + // sprite4_7_a, + sprite4_7_b, + // stat_write_glitch_l0_a, + // stat_write_glitch_l0_b, + stat_write_glitch_l0_c, + stat_write_glitch_l1_a, + // stat_write_glitch_l1_b, + // stat_write_glitch_l1_c, + stat_write_glitch_l1_d, + stat_write_glitch_l143_a, + // stat_write_glitch_l143_b, + // stat_write_glitch_l143_c, + // stat_write_glitch_l143_d, + // stat_write_glitch_l154_a, + // stat_write_glitch_l154_b, + stat_write_glitch_l154_c, + // stat_write_glitch_l154_d, + temp, + // ppu_latch_tileselect: "802-ppu-latch-tileselect.gb", + // tima_boot_phase: "004-tima_boot_phase.gb", + // tima_cycle_timer: "004-tima_cycle_timer.gb", + timer_div_phase_c, + timer_div_phase_d, + timer_tima_inc_256k_a, + timer_tima_inc_256k_b, + timer_tima_inc_256k_c, + timer_tima_inc_256k_d, + timer_tima_inc_256k_e, + timer_tima_inc_256k_f, + timer_tima_inc_256k_g, + timer_tima_inc_256k_h, + timer_tima_inc_256k_i, + timer_tima_inc_256k_j, + timer_tima_inc_256k_k, + timer_tima_inc_64k_a, + timer_tima_inc_64k_b, + timer_tima_inc_64k_c, + timer_tima_inc_64k_d, + // timer_tima_phase_a, + // timer_tima_phase_b, + // timer_tima_phase_c, + // timer_tima_phase_d, + // timer_tima_phase_e, + // timer_tima_phase_f, + // timer_tima_phase_g, + // timer_tima_phase_h, + // timer_tima_phase_i, + // timer_tima_phase_j, + timer_tima_reload_256k_a, + timer_tima_reload_256k_b, + timer_tima_reload_256k_c, + timer_tima_reload_256k_d, + timer_tima_reload_256k_e, + timer_tima_reload_256k_f, + timer_tima_reload_256k_g, + timer_tima_reload_256k_h, + timer_tima_reload_256k_i, + timer_tima_reload_256k_j, + timer_tima_reload_256k_k, + timer_tima_write_a, + timer_tima_write_b, + timer_tima_write_c, + timer_tima_write_d, + timer_tima_write_e, + timer_tima_write_f, + timer_tma_write_a, + timer_tma_write_b, + // scx_timing: "500-scx-timing.gb", + // toggle_lcdc, + // vblank_int_halt_a, + vblank_int_halt_b, + vblank_int_if_a, + // vblank_int_if_b, + vblank_int_if_c, + // vblank_int_if_d, + // vblank_int_inc_sled, + // vblank_int_nops_a, + vblank_int_nops_b, + // vblank2_int_halt_a, + vblank2_int_halt_b, + vblank2_int_if_a, + // vblank2_int_if_b, + vblank2_int_if_c, + // vblank2_int_if_d, + // vblank2_int_inc_sled, + // vblank2_int_nops_a, + vblank2_int_nops_b, + // vram_locked: "002-vram_locked.gb", + vram_read_l0_a, + // vram_read_l0_b, + // vram_read_l0_c, + vram_read_l0_d, + vram_read_l1_a, + // vram_read_l1_b, + // vram_read_l1_c, + vram_read_l1_d, + // vram_unlocked: "001-vram_unlocked.gb", + vram_write_l0_a, + // vram_write_l0_b, + // vram_write_l0_c, + vram_write_l0_d, + vram_write_l1_a, + // vram_write_l1_b, + // vram_write_l1_c, + vram_write_l1_d, + // wave_write_to_0xC003, + win0_a, + // win0_b, + win0_scx3_a, + win0_scx3_b, + win1_a, + // win1_b, + win10_a, + // win10_b, + win10_scx3_a, + // win10_scx3_b, + win11_a, + // win11_b, + win12_a, + // win12_b, + win13_a, + // win13_b, + win14_a, + // win14_b, + win15_a, + // win15_b, + win2_a, + win2_b, + win3_a, + win3_b, + win4_a, + win4_b, + win5_a, + win5_b, + // win6_a, + win6_b, + // win7_a, + win7_b, + win8_a, + // win8_b, + win9_a, + // win9_b, + // write_to_x8000: "000-write_to_x8000.gb", + +); diff --git a/mizu-core/src/tests/mod.rs b/mizu-core/src/tests/mod.rs index 8c12816..fe0d69d 100644 --- a/mizu-core/src/tests/mod.rs +++ b/mizu-core/src/tests/mod.rs @@ -62,6 +62,7 @@ macro_rules! gb_tests { // defined after the macro so that it can use it mod acid2_test; mod blargg_tests; +mod gbmicrotest; mod mooneye_tests; mod rtc3; mod samesuite_tests; From 156825b66976aa2278ee339b76aa2eaf524d7724 Mon Sep 17 00:00:00 2001 From: Amjad Alsharafi <26300843+Amjad50@users.noreply.github.com> Date: Wed, 13 Mar 2024 22:05:09 +0300 Subject: [PATCH 4/6] Testing: Updated the `TESTING.md` to include latest test suite --- TESTING.md | 527 ++++++++++++++++++++++++++++- mizu-core/src/tests/gbmicrotest.rs | 1 - 2 files changed, 525 insertions(+), 3 deletions(-) diff --git a/TESTING.md b/TESTING.md index 273a6b1..c64bcf6 100644 --- a/TESTING.md +++ b/TESTING.md @@ -47,6 +47,7 @@ A documentation of all hardware tests tested on `mizu`. | cpu_instrs | :+1: | | instr_timing | :+1: | | halt_bug | :+1: | +| mem_timing | :+1: | | mem_timing-2 | :+1: | | dmg_sound | :+1: | | cgb_sound | :+1: | @@ -358,6 +359,525 @@ A documentation of all hardware tests tested on `mizu`. | channel_4_lfsr_restart_fast | :x: | | channel_4_volume_div | :x: | +## [GBMicrotest] + +| Test | State | +| ------------------------------------- | ----- | +| audio_testbench | :x: | +| 803-ppu-latch-bgdisplay | :x: | +| cpu_bus_1 | :x: | +| div_inc_timing_a | :+1: | +| div_inc_timing_b | :+1: | +| dma_0x1000 | :+1: | +| dma_0x9000 | :+1: | +| dma_0xA000 | :+1: | +| dma_0xC000 | :+1: | +| dma_0xE000 | :+1: | +| dma_basic | :x: | +| dma_timing_a | :+1: | +| 400-dma | :x: | +| flood_vram | :x: | +| halt_bug | :x: | +| halt_op_dupe_delay | :x: | +| halt_op_dupe | :+1: | +| hblank_int_di_timing_a | :x: | +| hblank_int_di_timing_b | :+1: | +| hblank_int_if_a | :x: | +| hblank_int_if_b | :+1: | +| hblank_int_l0 | :x: | +| hblank_int_l1 | :x: | +| hblank_int_l2 | :x: | +| hblank_int_scx0_if_a | :+1: | +| hblank_int_scx0_if_b | :+1: | +| hblank_int_scx0_if_c | :+1: | +| hblank_int_scx0_if_d | :+1: | +| hblank_int_scx0 | :x: | +| hblank_int_scx1_if_a | :+1: | +| hblank_int_scx1_if_b | :+1: | +| hblank_int_scx1_if_c | :+1: | +| hblank_int_scx1_if_d | :+1: | +| hblank_int_scx1_nops_a | :+1: | +| hblank_int_scx1_nops_b | :+1: | +| hblank_int_scx1 | :x: | +| hblank_int_scx2_if_a | :+1: | +| hblank_int_scx2_if_b | :x: | +| hblank_int_scx2_if_c | :x: | +| hblank_int_scx2_if_d | :x: | +| hblank_int_scx2_nops_a | :x: | +| hblank_int_scx2_nops_b | :x: | +| hblank_int_scx2 | :x: | +| hblank_int_scx3_if_a | :+1: | +| hblank_int_scx3_if_b | :+1: | +| hblank_int_scx3_if_c | :+1: | +| hblank_int_scx3_if_d | :+1: | +| hblank_int_scx3_nops_a | :+1: | +| hblank_int_scx3_nops_b | :+1: | +| hblank_int_scx3 | :+1: | +| hblank_int_scx4_if_a | :+1: | +| hblank_int_scx4_if_b | :+1: | +| hblank_int_scx4_if_c | :+1: | +| hblank_int_scx4_if_d | :+1: | +| hblank_int_scx4_nops_a | :+1: | +| hblank_int_scx4_nops_b | :+1: | +| hblank_int_scx4 | :x: | +| hblank_int_scx5_if_a | :+1: | +| hblank_int_scx5_if_b | :+1: | +| hblank_int_scx5_if_c | :+1: | +| hblank_int_scx5_if_d | :+1: | +| hblank_int_scx5_nops_a | :+1: | +| hblank_int_scx5_nops_b | :+1: | +| hblank_int_scx5 | :x: | +| hblank_int_scx6_if_a | :+1: | +| hblank_int_scx6_if_b | :x: | +| hblank_int_scx6_if_c | :x: | +| hblank_int_scx6_if_d | :x: | +| hblank_int_scx6_nops_a | :x: | +| hblank_int_scx6_nops_b | :x: | +| hblank_int_scx6 | :x: | +| hblank_int_scx7_if_a | :+1: | +| hblank_int_scx7_if_b | :+1: | +| hblank_int_scx7_if_c | :+1: | +| hblank_int_scx7_if_d | :+1: | +| hblank_int_scx7_nops_a | :+1: | +| hblank_int_scx7_nops_b | :+1: | +| hblank_int_scx7 | :x: | +| hblank_scx2_if_a | :x: | +| hblank_scx3_if_a | :+1: | +| hblank_scx3_if_b | :x: | +| hblank_scx3_if_c | :x: | +| hblank_scx3_if_d | :x: | +| hblank_scx3_int_a | :+1: | +| hblank_scx3_int_b | :x: | +| int_hblank_halt_bug_a | :+1: | +| int_hblank_halt_bug_b | :+1: | +| int_hblank_halt_scx0 | :x: | +| int_hblank_halt_scx1 | :x: | +| int_hblank_halt_scx2 | :x: | +| int_hblank_halt_scx3 | :x: | +| int_hblank_halt_scx4 | :x: | +| int_hblank_halt_scx5 | :x: | +| int_hblank_halt_scx6 | :x: | +| int_hblank_halt_scx7 | :x: | +| int_hblank_incs_scx0 | :x: | +| int_hblank_incs_scx1 | :x: | +| int_hblank_incs_scx2 | :x: | +| int_hblank_incs_scx3 | :x: | +| int_hblank_incs_scx4 | :x: | +| int_hblank_incs_scx5 | :x: | +| int_hblank_incs_scx6 | :x: | +| int_hblank_incs_scx7 | :x: | +| int_hblank_nops_scx0 | :x: | +| int_hblank_nops_scx1 | :x: | +| int_hblank_nops_scx2 | :x: | +| int_hblank_nops_scx3 | :x: | +| int_hblank_nops_scx4 | :x: | +| int_hblank_nops_scx5 | :x: | +| int_hblank_nops_scx6 | :x: | +| int_hblank_nops_scx7 | :x: | +| int_lyc_halt | :x: | +| int_lyc_incs | :+1: | +| int_lyc_nops | :x: | +| int_oam_halt | :x: | +| int_oam_incs | :x: | +| int_oam_nops | :x: | +| int_timer_halt_div_a | :+1: | +| int_timer_halt_div_b | :x: | +| int_timer_halt | :x: | +| int_timer_incs | :+1: | +| int_timer_nops_div_a | :+1: | +| int_timer_nops_div_b | :+1: | +| int_timer_nops | :+1: | +| int_vblank1_halt | :x: | +| int_vblank1_incs | :x: | +| int_vblank1_nops | :x: | +| int_vblank2_halt | :x: | +| int_vblank2_incs | :x: | +| int_vblank2_nops | :x: | +| is_if_set_during_ime0 | :+1: | +| 007-lcd_on_stat | :x: | +| lcdon_halt_to_vblank_int_a | :x: | +| lcdon_halt_to_vblank_int_b | :+1: | +| lcdon_nops_to_vblank_int_a | :x: | +| lcdon_nops_to_vblank_int_b | :+1: | +| lcdon_to_if_oam_a | :+1: | +| lcdon_to_if_oam_b | :x: | +| lcdon_to_ly1_a | :+1: | +| lcdon_to_ly1_b | :+1: | +| lcdon_to_ly2_a | :+1: | +| lcdon_to_ly2_b | :+1: | +| lcdon_to_ly3_a | :+1: | +| lcdon_to_ly3_b | :+1: | +| lcdon_to_lyc1_int | :+1: | +| lcdon_to_lyc2_int | :+1: | +| lcdon_to_lyc3_int | :+1: | +| lcdon_to_oam_int_l0 | :x: | +| lcdon_to_oam_int_l1 | :x: | +| lcdon_to_oam_int_l2 | :x: | +| lcdon_to_oam_unlock_a | :+1: | +| lcdon_to_oam_unlock_b | :+1: | +| lcdon_to_oam_unlock_c | :+1: | +| lcdon_to_oam_unlock_d | :x: | +| lcdon_to_stat0_a | :+1: | +| lcdon_to_stat0_b | :+1: | +| lcdon_to_stat0_c | :+1: | +| lcdon_to_stat0_d | :+1: | +| lcdon_to_stat1_a | :+1: | +| lcdon_to_stat1_b | :x: | +| lcdon_to_stat1_c | :+1: | +| lcdon_to_stat1_d | :x: | +| lcdon_to_stat1_e | :+1: | +| lcdon_to_stat2_a | :x: | +| lcdon_to_stat2_b | :+1: | +| lcdon_to_stat2_c | :+1: | +| lcdon_to_stat2_d | :+1: | +| lcdon_to_stat3_a | :+1: | +| lcdon_to_stat3_b | :+1: | +| lcdon_to_stat3_c | :+1: | +| lcdon_to_stat3_d | :+1: | +| lcdon_write_timing | :x: | +| line_144_oam_int_a | :+1: | +| line_144_oam_int_b | :x: | +| line_144_oam_int_c | :x: | +| line_144_oam_int_d | :x: | +| line_153_ly_a | :+1: | +| line_153_ly_b | :+1: | +| line_153_ly_c | :x: | +| line_153_ly_d | :+1: | +| line_153_ly_e | :x: | +| line_153_ly_f | :+1: | +| line_153_lyc_a | :+1: | +| line_153_lyc_b | :+1: | +| line_153_lyc_c | :x: | +| line_153_lyc_int_a | :+1: | +| line_153_lyc_int_b | :+1: | +| line_153_lyc0_int_inc_sled | :+1: | +| line_153_lyc0_stat_timing_a | :+1: | +| line_153_lyc0_stat_timing_b | :+1: | +| line_153_lyc0_stat_timing_c | :+1: | +| line_153_lyc0_stat_timing_d | :+1: | +| line_153_lyc0_stat_timing_e | :+1: | +| line_153_lyc0_stat_timing_f | :x: | +| line_153_lyc0_stat_timing_g | :+1: | +| line_153_lyc0_stat_timing_h | :x: | +| line_153_lyc0_stat_timing_i | :+1: | +| line_153_lyc0_stat_timing_j | :x: | +| line_153_lyc0_stat_timing_k | :+1: | +| line_153_lyc0_stat_timing_l | :+1: | +| line_153_lyc0_stat_timing_m | :x: | +| line_153_lyc0_stat_timing_n | :+1: | +| line_153_lyc153_stat_timing_a | :+1: | +| line_153_lyc153_stat_timing_b | :+1: | +| line_153_lyc153_stat_timing_c | :x: | +| line_153_lyc153_stat_timing_d | :+1: | +| line_153_lyc153_stat_timing_e | :x: | +| line_153_lyc153_stat_timing_f | :+1: | +| line_65_ly | :x: | +| ly_while_lcd_off | :x: | +| lyc_int_halt_a | :x: | +| lyc_int_halt_b | :+1: | +| lyc1_int_halt_a | :x: | +| lyc1_int_halt_b | :+1: | +| lyc1_int_if_edge_a | :+1: | +| lyc1_int_if_edge_b | :+1: | +| lyc1_int_if_edge_c | :+1: | +| lyc1_int_if_edge_d | :+1: | +| lyc1_int_nops_a | :+1: | +| lyc1_int_nops_b | :+1: | +| lyc1_write_timing_a | :+1: | +| lyc1_write_timing_b | :+1: | +| lyc1_write_timing_c | :+1: | +| lyc1_write_timing_d | :+1: | +| lyc2_int_halt_a | :x: | +| lyc2_int_halt_b | :+1: | +| mbc1_ram_banks | :+1: | +| mbc1_rom_banks | :x: | +| minimal | :x: | +| mode2_stat_int_to_oam_unlock | :x: | +| oam_int_halt_a | :x: | +| oam_int_halt_b | :+1: | +| oam_int_if_edge_a | :+1: | +| oam_int_if_edge_b | :x: | +| oam_int_if_edge_c | :+1: | +| oam_int_if_edge_d | :x: | +| oam_int_if_level_c | :+1: | +| oam_int_if_level_d | :x: | +| oam_int_inc_sled | :x: | +| oam_int_nops_a | :x: | +| oam_int_nops_b | :+1: | +| 000-oam_lock | :x: | +| oam_read_l0_a | :+1: | +| oam_read_l0_b | :+1: | +| oam_read_l0_c | :+1: | +| oam_read_l0_d | :x: | +| oam_read_l1_a | :+1: | +| oam_read_l1_b | :+1: | +| oam_read_l1_c | :+1: | +| oam_read_l1_d | :x: | +| oam_read_l1_e | :+1: | +| oam_read_l1_f | :+1: | +| oam_sprite_trashing | :x: | +| oam_write_l0_a | :+1: | +| oam_write_l0_b | :+1: | +| oam_write_l0_c | :+1: | +| oam_write_l0_d | :x: | +| oam_write_l0_e | :x: | +| oam_write_l1_a | :+1: | +| oam_write_l1_b | :+1: | +| oam_write_l1_c | :x: | +| oam_write_l1_d | :+1: | +| oam_write_l1_e | :+1: | +| oam_write_l1_f | :x: | +| poweron_bgp_000 | :+1: | +| poweron_div_000 | :x: | +| poweron_div_004 | :x: | +| poweron_div_005 | :x: | +| poweron_dma_000 | :x: | +| poweron_if_000 | :+1: | +| poweron_joy_000 | :+1: | +| poweron_lcdc_000 | :+1: | +| poweron_ly_000 | :+1: | +| poweron_ly_119 | :x: | +| poweron_ly_120 | :+1: | +| poweron_ly_233 | :x: | +| poweron_ly_234 | :+1: | +| poweron_lyc_000 | :+1: | +| poweron_oam_000 | :+1: | +| poweron_oam_005 | :+1: | +| poweron_oam_006 | :+1: | +| poweron_oam_069 | :+1: | +| poweron_oam_070 | :+1: | +| poweron_oam_119 | :x: | +| poweron_oam_120 | :+1: | +| poweron_oam_121 | :+1: | +| poweron_oam_183 | :+1: | +| poweron_oam_184 | :+1: | +| poweron_oam_233 | :x: | +| poweron_oam_234 | :+1: | +| poweron_oam_235 | :+1: | +| poweron_obp0_000 | :+1: | +| poweron_obp1_000 | :+1: | +| poweron_sb_000 | :+1: | +| poweron_sc_000 | :+1: | +| poweron_scx_000 | :+1: | +| poweron_scy_000 | :+1: | +| poweron_stat_000 | :+1: | +| poweron_stat_005 | :+1: | +| poweron_stat_006 | :x: | +| poweron_stat_007 | :+1: | +| poweron_stat_026 | :x: | +| poweron_stat_027 | :+1: | +| poweron_stat_069 | :x: | +| poweron_stat_070 | :+1: | +| poweron_stat_119 | :+1: | +| poweron_stat_120 | :x: | +| poweron_stat_121 | :+1: | +| poweron_stat_140 | :x: | +| poweron_stat_141 | :+1: | +| poweron_stat_183 | :x: | +| poweron_stat_184 | :+1: | +| poweron_stat_234 | :x: | +| poweron_stat_235 | :+1: | +| poweron_tac_000 | :+1: | +| poweron_tima_000 | :+1: | +| poweron_tma_000 | :+1: | +| poweron_vram_000 | :+1: | +| poweron_vram_025 | :+1: | +| poweron_vram_026 | :x: | +| poweron_vram_069 | :x: | +| poweron_vram_070 | :+1: | +| poweron_vram_139 | :+1: | +| poweron_vram_140 | :x: | +| poweron_vram_183 | :x: | +| poweron_vram_184 | :+1: | +| poweron_wx_000 | :+1: | +| poweron_wy_000 | :+1: | +| poweron | :x: | +| ppu_scx_vs_bgp | :x: | +| ppu_sprite_testbench | :x: | +| ppu_sprite0_scx0_a | :+1: | +| ppu_sprite0_scx0_b | :+1: | +| ppu_sprite0_scx1_a | :+1: | +| ppu_sprite0_scx1_b | :+1: | +| ppu_sprite0_scx2_a | :+1: | +| ppu_sprite0_scx2_b | :x: | +| ppu_sprite0_scx3_a | :+1: | +| ppu_sprite0_scx3_b | :x: | +| ppu_sprite0_scx4_a | :+1: | +| ppu_sprite0_scx4_b | :+1: | +| ppu_sprite0_scx5_a | :+1: | +| ppu_sprite0_scx5_b | :+1: | +| ppu_sprite0_scx6_a | :+1: | +| ppu_sprite0_scx6_b | :x: | +| ppu_sprite0_scx7_a | :+1: | +| ppu_sprite0_scx7_b | :x: | +| ppu_spritex_vs_scx | :x: | +| ppu_win_vs_wx | :x: | +| ppu_wx_early | :x: | +| 800-ppu-latch-scx | :x: | +| 801-ppu-latch-scy | :x: | +| sprite_0_a | :x: | +| sprite_0_b | :+1: | +| sprite_1_a | :x: | +| sprite_1_b | :+1: | +| sprite4_0_a | :x: | +| sprite4_0_b | :+1: | +| sprite4_1_a | :x: | +| sprite4_1_b | :+1: | +| sprite4_2_a | :x: | +| sprite4_2_b | :+1: | +| sprite4_3_a | :x: | +| sprite4_3_b | :+1: | +| sprite4_4_a | :x: | +| sprite4_4_b | :+1: | +| sprite4_5_a | :x: | +| sprite4_5_b | :+1: | +| sprite4_6_a | :x: | +| sprite4_6_b | :+1: | +| sprite4_7_a | :x: | +| sprite4_7_b | :+1: | +| stat_write_glitch_l0_a | :x: | +| stat_write_glitch_l0_b | :x: | +| stat_write_glitch_l0_c | :+1: | +| stat_write_glitch_l1_a | :+1: | +| stat_write_glitch_l1_b | :x: | +| stat_write_glitch_l1_c | :x: | +| stat_write_glitch_l1_d | :+1: | +| stat_write_glitch_l143_a | :+1: | +| stat_write_glitch_l143_b | :x: | +| stat_write_glitch_l143_c | :x: | +| stat_write_glitch_l143_d | :x: | +| stat_write_glitch_l154_a | :x: | +| stat_write_glitch_l154_b | :x: | +| stat_write_glitch_l154_c | :+1: | +| stat_write_glitch_l154_d | :x: | +| temp | :+1: | +| 802-ppu-latch-tileselect | :x: | +| 004-tima_boot_phase | :x: | +| 004-tima_cycle_timer | :x: | +| timer_div_phase_c | :+1: | +| timer_div_phase_d | :+1: | +| timer_tima_inc_256k_a | :+1: | +| timer_tima_inc_256k_b | :+1: | +| timer_tima_inc_256k_c | :+1: | +| timer_tima_inc_256k_d | :+1: | +| timer_tima_inc_256k_e | :+1: | +| timer_tima_inc_256k_f | :+1: | +| timer_tima_inc_256k_g | :+1: | +| timer_tima_inc_256k_h | :+1: | +| timer_tima_inc_256k_i | :+1: | +| timer_tima_inc_256k_j | :+1: | +| timer_tima_inc_256k_k | :+1: | +| timer_tima_inc_64k_a | :+1: | +| timer_tima_inc_64k_b | :+1: | +| timer_tima_inc_64k_c | :+1: | +| timer_tima_inc_64k_d | :+1: | +| timer_tima_phase_a | :x: | +| timer_tima_phase_b | :x: | +| timer_tima_phase_c | :x: | +| timer_tima_phase_d | :x: | +| timer_tima_phase_e | :x: | +| timer_tima_phase_f | :x: | +| timer_tima_phase_g | :x: | +| timer_tima_phase_h | :x: | +| timer_tima_phase_i | :x: | +| timer_tima_phase_j | :x: | +| timer_tima_reload_256k_a | :+1: | +| timer_tima_reload_256k_b | :+1: | +| timer_tima_reload_256k_c | :+1: | +| timer_tima_reload_256k_d | :+1: | +| timer_tima_reload_256k_e | :+1: | +| timer_tima_reload_256k_f | :+1: | +| timer_tima_reload_256k_g | :+1: | +| timer_tima_reload_256k_h | :+1: | +| timer_tima_reload_256k_i | :+1: | +| timer_tima_reload_256k_j | :+1: | +| timer_tima_reload_256k_k | :+1: | +| timer_tima_write_a | :+1: | +| timer_tima_write_b | :+1: | +| timer_tima_write_c | :+1: | +| timer_tima_write_d | :+1: | +| timer_tima_write_e | :+1: | +| timer_tima_write_f | :+1: | +| timer_tma_write_a | :+1: | +| timer_tma_write_b | :+1: | +| 500-scx-timing | :x: | +| toggle_lcdc | :x: | +| vblank_int_halt_a | :x: | +| vblank_int_halt_b | :+1: | +| vblank_int_if_a | :+1: | +| vblank_int_if_b | :x: | +| vblank_int_if_c | :+1: | +| vblank_int_if_d | :x: | +| vblank_int_inc_sled | :x: | +| vblank_int_nops_a | :x: | +| vblank_int_nops_b | :+1: | +| vblank2_int_halt_a | :x: | +| vblank2_int_halt_b | :+1: | +| vblank2_int_if_a | :+1: | +| vblank2_int_if_b | :x: | +| vblank2_int_if_c | :+1: | +| vblank2_int_if_d | :x: | +| vblank2_int_inc_sled | :x: | +| vblank2_int_nops_a | :x: | +| vblank2_int_nops_b | :+1: | +| 002-vram_locked | :x: | +| vram_read_l0_a | :+1: | +| vram_read_l0_b | :x: | +| vram_read_l0_c | :x: | +| vram_read_l0_d | :+1: | +| vram_read_l1_a | :+1: | +| vram_read_l1_b | :x: | +| vram_read_l1_c | :x: | +| vram_read_l1_d | :+1: | +| 001-vram_unlocked | :x: | +| vram_write_l0_a | :+1: | +| vram_write_l0_b | :x: | +| vram_write_l0_c | :x: | +| vram_write_l0_d | :+1: | +| vram_write_l1_a | :+1: | +| vram_write_l1_b | :x: | +| vram_write_l1_c | :x: | +| vram_write_l1_d | :+1: | +| wave_write_to_0xC003 | :x: | +| win0_a | :+1: | +| win0_b | :x: | +| win0_scx3_a | :+1: | +| win0_scx3_b | :+1: | +| win1_a | :+1: | +| win1_b | :x: | +| win10_a | :+1: | +| win10_b | :x: | +| win10_scx3_a | :+1: | +| win10_scx3_b | :x: | +| win11_a | :+1: | +| win11_b | :x: | +| win12_a | :+1: | +| win12_b | :x: | +| win13_a | :+1: | +| win13_b | :x: | +| win14_a | :+1: | +| win14_b | :x: | +| win15_a | :+1: | +| win15_b | :x: | +| win2_a | :+1: | +| win2_b | :+1: | +| win3_a | :+1: | +| win3_b | :+1: | +| win4_a | :+1: | +| win4_b | :+1: | +| win5_a | :+1: | +| win5_b | :+1: | +| win6_a | :x: | +| win6_b | :+1: | +| win7_a | :x: | +| win7_b | :+1: | +| win8_a | :+1: | +| win8_b | :x: | +| win9_a | :+1: | +| win9_b | :x: | +| 000-write_to_x8000 | :x: | + + ## Extra These are valuable tests, they come in a single rom, so they were grouped into a single table @@ -365,8 +885,10 @@ a single table | Test | State | | ---------------- | ----- | | [rtc3test] | :+1: | -| [bullyGB] in DMG | :+1: | -| [bullyGB] in CGB | :+1: | +| [bullyGB] in DMG | :question:* | +| [bullyGB] in CGB | :question:* | + +> \* previusly passed, but now it fails, it needs to be retested and fix the issues [dmg_acid2]: https://github.com/mattcurrie/dmg-acid2 @@ -378,4 +900,5 @@ a single table [SameSuite]: https://github.com/LIJI32/SameSuite [rtc3test]: https://github.com/aaaaaa123456789/rtc3test [bullyGB]: https://github.com/Hacktix/BullyGB +[GBMicrotest]: https://github.com/aappleby/GBMicrotest diff --git a/mizu-core/src/tests/gbmicrotest.rs b/mizu-core/src/tests/gbmicrotest.rs index ce3f9d7..53f2884 100644 --- a/mizu-core/src/tests/gbmicrotest.rs +++ b/mizu-core/src/tests/gbmicrotest.rs @@ -568,5 +568,4 @@ gbmicrotest_tests!( win9_a, // win9_b, // write_to_x8000: "000-write_to_x8000.gb", - ); From 911c2acc01dfb86bea7ef22550a27ff8110c9038 Mon Sep 17 00:00:00 2001 From: Amjad Alsharafi <26300843+Amjad50@users.noreply.github.com> Date: Wed, 13 Mar 2024 22:16:19 +0300 Subject: [PATCH 5/6] Testing: Added MBC3-Tester --- TESTING.md | 2 ++ mizu-core/src/tests/mbc3_tester.rs | 25 +++++++++++++++++++++++++ mizu-core/src/tests/mod.rs | 1 + 3 files changed, 28 insertions(+) create mode 100644 mizu-core/src/tests/mbc3_tester.rs diff --git a/TESTING.md b/TESTING.md index c64bcf6..df75601 100644 --- a/TESTING.md +++ b/TESTING.md @@ -887,6 +887,7 @@ a single table | [rtc3test] | :+1: | | [bullyGB] in DMG | :question:* | | [bullyGB] in CGB | :question:* | +| [MBC3-Tester] | :+1: | > \* previusly passed, but now it fails, it needs to be retested and fix the issues @@ -901,4 +902,5 @@ a single table [rtc3test]: https://github.com/aaaaaa123456789/rtc3test [bullyGB]: https://github.com/Hacktix/BullyGB [GBMicrotest]: https://github.com/aappleby/GBMicrotest +[MBC3-Tester]: https://github.com/EricKirschenmann/MBC3-Tester-gb diff --git a/mizu-core/src/tests/mbc3_tester.rs b/mizu-core/src/tests/mbc3_tester.rs new file mode 100644 index 0000000..719f275 --- /dev/null +++ b/mizu-core/src/tests/mbc3_tester.rs @@ -0,0 +1,25 @@ +#[test] +fn mbc3_tester() { + for &(is_dmg, crc) in &[ + (true, 11138354573804784769), + (false, 11138354573804784769), // cgb should fail, but with this screen + ] { + let mut gb = crate::tests::TestingGameBoy::new( + "../test_roms/game-boy-test-roms/mbc3-tester/mbc3-tester.gb", + is_dmg, + ) + .unwrap(); + + for _ in 0..70 { + gb.clock_for_frame(); + } + + let screen_buffer = gb.raw_screen_buffer(); + gb.print_screen_buffer(); + + assert_eq!( + crc::Crc::::new(&crc::CRC_64_XZ).checksum(screen_buffer), + crc + ); + } +} diff --git a/mizu-core/src/tests/mod.rs b/mizu-core/src/tests/mod.rs index fe0d69d..1ed9e2d 100644 --- a/mizu-core/src/tests/mod.rs +++ b/mizu-core/src/tests/mod.rs @@ -63,6 +63,7 @@ macro_rules! gb_tests { mod acid2_test; mod blargg_tests; mod gbmicrotest; +mod mbc3_tester; mod mooneye_tests; mod rtc3; mod samesuite_tests; From f4a88e0cd23b29488fa0fa70a2fc7e6f482b2b77 Mon Sep 17 00:00:00 2001 From: Amjad Alsharafi <26300843+Amjad50@users.noreply.github.com> Date: Wed, 13 Mar 2024 22:35:37 +0300 Subject: [PATCH 6/6] Testing: Added turtle tests and did some reorg --- TESTING.md | 7 +++++ mizu-core/src/tests/acid2_test.rs | 13 --------- mizu-core/src/tests/mbc3_tester.rs | 25 ---------------- mizu-core/src/tests/mod.rs | 35 +++++++++++++++++----- mizu-core/src/tests/rtc3.rs | 18 ------------ mizu-core/src/tests/small_tests.rs | 47 ++++++++++++++++++++++++++++++ 6 files changed, 82 insertions(+), 63 deletions(-) delete mode 100644 mizu-core/src/tests/acid2_test.rs delete mode 100644 mizu-core/src/tests/mbc3_tester.rs delete mode 100644 mizu-core/src/tests/rtc3.rs create mode 100644 mizu-core/src/tests/small_tests.rs diff --git a/TESTING.md b/TESTING.md index df75601..ac31620 100644 --- a/TESTING.md +++ b/TESTING.md @@ -877,6 +877,12 @@ A documentation of all hardware tests tested on `mizu`. | win9_b | :x: | | 000-write_to_x8000 | :x: | +## [TurtleTests] + +| Test | State | +| ---------------- | ----- | +| window_y_trigger | :x: | +| window_y_trigger_wx_offscreen | :+1: | ## Extra These are valuable tests, they come in a single rom, so they were grouped into @@ -903,4 +909,5 @@ a single table [bullyGB]: https://github.com/Hacktix/BullyGB [GBMicrotest]: https://github.com/aappleby/GBMicrotest [MBC3-Tester]: https://github.com/EricKirschenmann/MBC3-Tester-gb +[TurtleTests]: https://github.com/Powerlated/TurtleTests diff --git a/mizu-core/src/tests/acid2_test.rs b/mizu-core/src/tests/acid2_test.rs deleted file mode 100644 index bd41d41..0000000 --- a/mizu-core/src/tests/acid2_test.rs +++ /dev/null @@ -1,13 +0,0 @@ -gb_tests!( - brk; // clock until break - - dmg_acid2_test, - "dmg-acid2/dmg-acid2.gb", - 13523824884037480967, - 13523824884037480967; - - cgb_acid2_test for cgb, - "cgb-acid2/cgb-acid2.gbc", - 0, - 4378550468433865064; -); diff --git a/mizu-core/src/tests/mbc3_tester.rs b/mizu-core/src/tests/mbc3_tester.rs deleted file mode 100644 index 719f275..0000000 --- a/mizu-core/src/tests/mbc3_tester.rs +++ /dev/null @@ -1,25 +0,0 @@ -#[test] -fn mbc3_tester() { - for &(is_dmg, crc) in &[ - (true, 11138354573804784769), - (false, 11138354573804784769), // cgb should fail, but with this screen - ] { - let mut gb = crate::tests::TestingGameBoy::new( - "../test_roms/game-boy-test-roms/mbc3-tester/mbc3-tester.gb", - is_dmg, - ) - .unwrap(); - - for _ in 0..70 { - gb.clock_for_frame(); - } - - let screen_buffer = gb.raw_screen_buffer(); - gb.print_screen_buffer(); - - assert_eq!( - crc::Crc::::new(&crc::CRC_64_XZ).checksum(screen_buffer), - crc - ); - } -} diff --git a/mizu-core/src/tests/mod.rs b/mizu-core/src/tests/mod.rs index 1ed9e2d..5de7b88 100644 --- a/mizu-core/src/tests/mod.rs +++ b/mizu-core/src/tests/mod.rs @@ -7,18 +7,29 @@ use super::GameBoyConfig; use std::path::Path; +enum ClockType { + InfiniteLoop, + Breakpoint, + FrameCount(usize), +} + macro_rules! gb_tests { // clock until infinite loop (inf; $($test_name: ident $(for $emu: ident)?, $file_path: expr, $dmg_crc: expr, $cgb_crc: expr;)*) => { - gb_tests!($($test_name $(for $emu)?, $file_path, $dmg_crc, $cgb_crc;)*, clock_until_infinte_loop); + gb_tests!($($test_name $(for $emu)?, $file_path, $dmg_crc, $cgb_crc;)*, super::ClockType::InfiniteLoop); }; // clock until breakpoint (brk; $($test_name: ident $(for $emu: ident)?, $file_path: expr, $dmg_crc: expr, $cgb_crc: expr;)*) => { - gb_tests!($($test_name $(for $emu)?, $file_path, $dmg_crc, $cgb_crc;)*, clock_until_breakpoint); + gb_tests!($($test_name $(for $emu)?, $file_path, $dmg_crc, $cgb_crc;)*, super::ClockType::Breakpoint); + }; + + // clock for a number of frames + (frames $n: expr; $($test_name: ident $(for $emu: ident)?, $file_path: expr, $dmg_crc: expr, $cgb_crc: expr;)*) => { + gb_tests!($($test_name $(for $emu)?, $file_path, $dmg_crc, $cgb_crc;)*, super::ClockType::FrameCount($n)); }; - ($($test_name: ident $(for $emu: ident)?, $file_path: expr, $dmg_crc: expr, $cgb_crc: expr;)*, $looping_statement: tt) => { + ($($test_name: ident $(for $emu: ident)?, $file_path: expr, $dmg_crc: expr, $cgb_crc: expr;)*, $clock_type: expr) => { $( /// Run the test and check the checksum of the screen buffer #[test] @@ -28,7 +39,19 @@ macro_rules! gb_tests { fn test(file_path: &str, is_dmg: bool, crc_checksum: u64) { let mut gb = crate::tests::TestingGameBoy::new(file_path, is_dmg).unwrap(); - gb.$looping_statement(); + match $clock_type { + super::ClockType::InfiniteLoop => { + gb.clock_until_infinte_loop(); + } + super::ClockType::Breakpoint => { + gb.clock_until_breakpoint(); + } + super::ClockType::FrameCount(frame_count) => { + for _ in 0..frame_count { + gb.clock_for_frame(); + } + } + } let screen_buffer = gb.raw_screen_buffer(); gb.print_screen_buffer(); @@ -60,15 +83,13 @@ macro_rules! gb_tests { } // defined after the macro so that it can use it -mod acid2_test; mod blargg_tests; mod gbmicrotest; -mod mbc3_tester; mod mooneye_tests; -mod rtc3; mod samesuite_tests; mod save_state_tests; mod scribbltests; +mod small_tests; #[derive(save_state::Savable)] struct TestingGameBoy { diff --git a/mizu-core/src/tests/rtc3.rs b/mizu-core/src/tests/rtc3.rs deleted file mode 100644 index dcad5ae..0000000 --- a/mizu-core/src/tests/rtc3.rs +++ /dev/null @@ -1,18 +0,0 @@ -gb_tests!( - brk; // clock until break - - rtc3test_1, - "../rtc3test/rtc3test-1.gb", - 5668068657756263343, - 13700459787635561240; - - rtc3test_2, - "../rtc3test/rtc3test-2.gb", - 9943343428460028138, - 14288417446659987136; - - rtc3test_3, - "../rtc3test/rtc3test-3.gb", - 11694994367292180084, - 2728978286698242625; -); diff --git a/mizu-core/src/tests/small_tests.rs b/mizu-core/src/tests/small_tests.rs new file mode 100644 index 0000000..82dd2f3 --- /dev/null +++ b/mizu-core/src/tests/small_tests.rs @@ -0,0 +1,47 @@ +gb_tests!( + brk; // clock until break + + dmg_acid2_test, + "dmg-acid2/dmg-acid2.gb", + 13523824884037480967, + 13523824884037480967; + + cgb_acid2_test for cgb, + "cgb-acid2/cgb-acid2.gbc", + 0, + 4378550468433865064; + + rtc3test_1, + "../rtc3test/rtc3test-1.gb", + 5668068657756263343, + 13700459787635561240; + + rtc3test_2, + "../rtc3test/rtc3test-2.gb", + 9943343428460028138, + 14288417446659987136; + + rtc3test_3, + "../rtc3test/rtc3test-3.gb", + 11694994367292180084, + 2728978286698242625; +); + +gb_tests!( + frames 70; // clock for 70 frames + + mbc3_tester, + "mbc3-tester/mbc3-tester.gb", + 11138354573804784769, + 11138354573804784769; + + turtle_window_y_trigger_wx_offscreen, + "turtle-tests/window_y_trigger_wx_offscreen/window_y_trigger_wx_offscreen.gb", + 7770242352201540162, + 7770242352201540162; + + // turtle_window_y_trigger, + // "turtle-tests/window_y_trigger/window_y_trigger.gb", + // 0, + // 0; +);