make firmware compile for stm32g4

boards/STM32F405RG.json

@@ -34,5 +34,5 @@
     ]
   },
   "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f405rg.html",
-  "vendor": "Generic"
+  "vendor": "ST"
 }

boards/STM32F411RE.json

@@ -34,5 +34,5 @@
     ]
   },
   "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f411re.html",
-  "vendor": "Generic"
+  "vendor": "ST"
 }

boards/STM32F722RE.json

@@ -30,5 +30,5 @@
     ]
   },
   "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f722re.html",
-  "vendor": "Generic"
+  "vendor": "ST"
 }

boards/STM32F745XG.json

@@ -30,5 +30,5 @@
     ]
   },
   "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f745xg.html",
-  "vendor": "Generic"
+  "vendor": "ST"
 }

boards/STM32F765VI.json

@@ -30,5 +30,5 @@
     ]
   },
   "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32f765vi.html",
-  "vendor": "Generic"
+  "vendor": "ST"
 }

boards/STM32G473CE.json

@@ -0,0 +1,40 @@
+{
+    "build": {
+        "core": "stm32",
+        "cpu": "cortex-m4",
+        "extra_flags": "-DSTM32G473xx -DSTM32G473 -DSTM32G4xx -DSTM32G4 -DSTM32 -DMCU_NAME=stm32g473 -DHSE_VALUE=8000000U",
+        "f_cpu": "170000000L",
+        "mcu": "stm32g473ce",
+        "product_line": "STM32G473xx",
+        "variant": "Generic_G473"
+    },
+    "connectivity": [
+        "can"
+    ],
+    "debug": {
+        "jlink_device": "STM32G473CB",
+        "openocd_target": "stm32g4x",
+        "svd_path": "STM32G473xx.svd"
+    },
+    "frameworks": [
+        "arduino",
+        "cmsis",
+        "libopencm3",
+        "stm32cube"
+    ],
+    "name": "STM32G473CE (128k RAM. 512k Flash)",
+    "upload": {
+        "maximum_ram_size": 131072,
+        "maximum_size": 524288,
+        "protocol": "stlink",
+        "protocols": [
+            "stlink",
+            "jlink",
+            "cmsis-dap",
+            "blackmagic",
+            "mbed"
+        ]
+    },
+    "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32g473ce.html",
+    "vendor": "ST"
+}

boards/STM32H743VI.json

@@ -30,5 +30,5 @@
     ]
   },
   "url": "https://www.st.com/en/microcontrollers-microprocessors/stm32h743vi.html",
-  "vendor": "Generic"
+  "vendor": "ST"
 }

platformio.ini

@@ -133,6 +133,24 @@ build_flags =
 [env:stm32h743]
 extends = stm32h743
 
+[stm32g4]
+extends = stm32
+system_flags = 
+  -mfloat-abi=hard
+  -mfpu=fpv4-sp-d16
+
+[stm32g473]
+extends = stm32g4
+board = STM32G473CE
+build_src_filter = ${stm32.build_src_filter} +<system/stm32g473>
+board_build.ldscript = $PROJECT_DIR/src/system/stm32g473/flash_layout.ld
+build_flags = 
+  ${stm32g4.build_flags} 
+  -Isrc/system/stm32g473
+
+[env:stm32g473]
+extends = stm32g473
+
 [at32]
 extends = common
 platform = https://github.com/ArteryTek/platform-arterytekat32.git#5729d36

script/device_gen.py

@@ -33,7 +33,7 @@ def parse_all(self):
         )
 
         # roughly filter to supported devices
-        supported = ["stm32f4", "stm32f7", "stm32h7"]
+        supported = ["stm32f4", "stm32g4", "stm32f7", "stm32h7"]
         device_file_names = [
             dfn for dfn in device_file_names if any(s in dfn for s in supported)
         ]
@@ -109,6 +109,7 @@ def __getitem__(self, item) -> modm_devices.device.Device:
 devices = [
     "stm32f405rg",
     "stm32f411re",
+    "stm32g473ce",
     "stm32f722re",
     "stm32f745vg",
     "stm32f765vi",

src/core/target.h

@@ -45,7 +45,9 @@ typedef enum {
   SERIAL_PORT4,
   SERIAL_PORT5,
 #endif
+#ifndef STM32G4
   SERIAL_PORT6,
+#endif
 #if defined(STM32F7) || defined(STM32H7) || defined(AT32F4)
   SERIAL_PORT7,
   SERIAL_PORT8,

src/driver/adc.h

@@ -10,7 +10,11 @@ typedef enum {
   ADC_DEVICE2,
   ADC_DEVICE3,
 #endif
-  ADC_DEVICEMAX,
+#ifdef STM32G473
+  ADC_DEVICE4,
+  ADC_DEVICE5,
+#endif
+  ADC_DEVICE_MAX,
 } adc_devices_t;
 
 typedef enum {

src/driver/at32/adc.c

@@ -14,7 +14,7 @@
 extern uint16_t adc_array[ADC_CHAN_MAX];
 extern adc_channel_t adc_pins[ADC_CHAN_MAX];
 
-static adc_type *adc_devs[ADC_DEVICEMAX] = {
+static adc_type *adc_devs[ADC_DEVICE_MAX] = {
     ADC1,
     ADC2,
     ADC3,
@@ -23,7 +23,7 @@ static adc_type *adc_devs[ADC_DEVICEMAX] = {
 static void adc_init_pin(adc_chan_t chan, gpio_pins_t pin) {
   adc_array[chan] = 1;
   adc_pins[chan].pin = PIN_NONE;
-  adc_pins[chan].dev = ADC_DEVICEMAX;
+  adc_pins[chan].dev = ADC_DEVICE_MAX;
 
   switch (chan) {
   case ADC_CHAN_VREF:
@@ -70,7 +70,7 @@ static void adc_init_dev() {
   common_init.vbat_state = FALSE;
   adc_common_config(&common_init);
 
-  for (uint32_t i = 0; i < ADC_DEVICEMAX; i++) {
+  for (uint32_t i = 0; i < ADC_DEVICE_MAX; i++) {
     adc_base_config_type base_init;
     base_init.sequence_mode = FALSE;
     base_init.repeat_mode = FALSE;
@@ -141,7 +141,7 @@ uint16_t adc_read_raw(adc_chan_t index) {
     do {
       last_adc_chan = (last_adc_chan + 1) % ADC_CHAN_MAX;
       // skip through all channels without a dev
-    } while (adc_pins[last_adc_chan].dev == ADC_DEVICEMAX);
+    } while (adc_pins[last_adc_chan].dev == ADC_DEVICE_MAX);
 
     adc_start_conversion(last_adc_chan);
   }

src/driver/fmc.h

@@ -4,7 +4,10 @@
 
 #include "util/util.h"
 
-#if defined(STM32H7)
+#if defined(STM32G4)
+#define FLASH_WORD_SIZE 8
+typedef uint64_t flash_word_t;
+#elif defined(STM32H7)
 #define FLASH_WORD_SIZE 32
 typedef uint64_t flash_word_t;
 #else

src/driver/stm32/adc.c

@@ -5,12 +5,25 @@ typedef struct {
   ADC_Common_TypeDef *common;
 } adc_dev_t;
 
-#ifdef STM32H7
+#if defined(STM32G4)
+#define ADC_INTERNAL_CHANNEL ADC_DEVICE1
+#define LL_ADC_CHANNEL_TEMPSENSOR LL_ADC_CHANNEL_TEMPSENSOR_ADC1
+#define ADC_SAMPLINGTIME LL_ADC_SAMPLINGTIME_247CYCLES_5
+#define READY_TO_CONVERT(dev) LL_ADC_IsActiveFlag_EOC(dev)
+
+static const adc_dev_t adc_dev[ADC_DEVICE_MAX] = {
+    {.adc = ADC1, .common = ADC12_COMMON},
+    {.adc = ADC2, .common = ADC12_COMMON},
+    {.adc = ADC3, .common = ADC345_COMMON},
+    {.adc = ADC4, .common = ADC345_COMMON},
+    {.adc = ADC5, .common = ADC345_COMMON},
+};
+#elif defined(STM32H7)
 #define ADC_INTERNAL_CHANNEL ADC_DEVICE3
 #define ADC_SAMPLINGTIME LL_ADC_SAMPLINGTIME_387CYCLES_5
 #define READY_TO_CONVERT(dev) LL_ADC_IsActiveFlag_EOC(dev)
 
-static const adc_dev_t adc_dev[ADC_DEVICEMAX] = {
+static const adc_dev_t adc_dev[ADC_DEVICE_MAX] = {
     {.adc = ADC1, .common = ADC12_COMMON},
     {.adc = ADC2, .common = ADC12_COMMON},
     {.adc = ADC3, .common = ADC3_COMMON},
@@ -20,7 +33,7 @@ static const adc_dev_t adc_dev[ADC_DEVICEMAX] = {
 #define ADC_SAMPLINGTIME LL_ADC_SAMPLINGTIME_480CYCLES
 #define READY_TO_CONVERT(dev) LL_ADC_IsActiveFlag_EOCS(dev)
 
-static const adc_dev_t adc_dev[ADC_DEVICEMAX] = {
+static const adc_dev_t adc_dev[ADC_DEVICE_MAX] = {
     {.adc = ADC1, .common = ADC},
 };
 #endif
@@ -56,7 +69,7 @@ static const uint32_t channel_map[] = {
 static void adc_init_pin(adc_chan_t chan, gpio_pins_t pin) {
   adc_array[chan] = 1;
   adc_pins[chan].pin = PIN_NONE;
-  adc_pins[chan].dev = ADC_DEVICEMAX;
+  adc_pins[chan].dev = ADC_DEVICE_MAX;
 
   switch (chan) {
   case ADC_CHAN_VREF:
@@ -117,7 +130,10 @@ static void adc_init_dev(adc_devices_t index) {
 
   LL_ADC_InitTypeDef adc_init;
   adc_init.Resolution = LL_ADC_RESOLUTION_12B;
-#ifdef STM32H7
+#if defined(STM32G4)
+  adc_init.DataAlignment = LL_ADC_DATA_ALIGN_RIGHT;
+  adc_init.LowPowerMode = LL_ADC_LP_MODE_NONE;
+#elif defined(STM32H7)
   adc_init.LeftBitShift = LL_ADC_LEFT_BIT_SHIFT_NONE;
   adc_init.LowPowerMode = LL_ADC_LP_MODE_NONE;
 #else
@@ -165,15 +181,18 @@ static void adc_start_conversion(adc_chan_t index) {
   LL_ADC_SetChannelSamplingTime(dev->adc, chan->channel, ADC_SAMPLINGTIME);
   LL_ADC_REG_SetSequencerRanks(dev->adc, LL_ADC_REG_RANK_1, chan->channel);
 
-#ifdef STM32H7
+#if defined(STM32H7) || defined(STM32G4)
   LL_ADC_REG_StartConversion(dev->adc);
 #else
   LL_ADC_REG_StartConversionSWStart(dev->adc);
 #endif
 }
 
 void adc_init() {
-#ifdef STM32H7
+#if defined(STM32G4)
+  rcc_enable(RCC_AHB2_GRP1(ADC12));
+  rcc_enable(RCC_AHB2_GRP1(ADC345));
+#elif defined(STM32H7)
   rcc_enable(RCC_AHB1_GRP1(ADC12));
   rcc_enable(RCC_AHB4_GRP1(ADC3));
 #else
@@ -192,7 +211,7 @@ void adc_init() {
     adc_init_pin(ADC_CHAN_IBAT, target.ibat);
   }
 
-  for (uint32_t i = 0; i < ADC_DEVICEMAX; i++) {
+  for (uint32_t i = 0; i < ADC_DEVICE_MAX; i++) {
     adc_init_dev(i);
   }
 
@@ -211,7 +230,7 @@ uint16_t adc_read_raw(adc_chan_t index) {
     do {
       last_adc_chan = (last_adc_chan + 1) % ADC_CHAN_MAX;
       // skip through all channels without a dev
-    } while (adc_pins[last_adc_chan].dev == ADC_DEVICEMAX);
+    } while (adc_pins[last_adc_chan].dev == ADC_DEVICE_MAX);
 
     adc_start_conversion(last_adc_chan);
   }

src/driver/stm32/dma.c

@@ -20,6 +20,20 @@
 // DMA2 Stream6 TIM1_CH3
 // DMA2 Stream7
 
+#if defined(STM32G4)
+#define DMA_STREAMS             \
+  DMA_STREAM(2, 0, 3, SPI1_RX)  \
+  DMA_STREAM(2, 0, 6, SPI1_TX)  \
+  DMA_STREAM(1, 0, 4, SPI2_RX)  \
+  DMA_STREAM(1, 0, 5, SPI2_TX)  \
+  DMA_STREAM(1, 0, 1, SPI3_RX)  \
+  DMA_STREAM(1, 0, 8, SPI3_TX)  \
+  DMA_STREAM(2, 0, 1, SPI4_RX)  \
+  DMA_STREAM(2, 0, 2, SPI4_TX)  \
+  DMA_STREAM(2, 0, 4, TIM1_CH1) \
+  DMA_STREAM(2, 0, 7, TIM1_CH3) \
+  DMA_STREAM(2, 0, 5, TIM1_CH4)
+#else
 #define DMA_STREAMS             \
   DMA_STREAM(2, 3, 2, SPI1_RX)  \
   DMA_STREAM(2, 3, 5, SPI1_TX)  \
@@ -32,8 +46,22 @@
   DMA_STREAM(2, 6, 3, TIM1_CH1) \
   DMA_STREAM(2, 6, 6, TIM1_CH3) \
   DMA_STREAM(2, 6, 4, TIM1_CH4)
+#endif
 
-#ifdef STM32H7
+#if defined(STM32G4)
+#define DMA_STREAM(_port, _chan, _stream, _dev)    \
+  [DMA_DEVICE_##_dev] = {                          \
+      .device = DMA_DEVICE_##_dev,                 \
+      .port = DMA##_port,                          \
+      .port_index = _port,                         \
+      .channel = -1,                               \
+      .channel_index = -1,                         \
+      .request = LL_DMAMUX_REQ_##_dev,             \
+      .stream = DMA##_port##_Channel##_stream,     \
+      .stream_index = LL_DMA_CHANNEL_##_stream,    \
+      .irq = DMA##_port##_Channel##_stream##_IRQn, \
+  },
+#elif defined(STM32H7)
 #define DMA_STREAM(_port, _chan, _stream, _dev)   \
   [DMA_DEVICE_##_dev] = {                         \
       .device = DMA_DEVICE_##_dev,                \

src/driver/stm32/dma.h

@@ -1,5 +1,20 @@
 #pragma once
 
+#ifdef STM32G4
+#define DMA_FLAG_TE (0x1 << 3)
+#define DMA_FLAG_HT (0x1 << 2)
+#define DMA_FLAG_TC (0x1 << 1)
+#define DMA_FLAG_GI (0x1 << 0)
+
+#define dma_flag_for_channel(dev, flags) ((flags) << (dev->stream_index * 4))
+#define dma_is_flag_active_tc(dev) READ_BIT(dev->port->ISR, dma_flag_for_channel(dev, DMA_FLAG_TC))
+#define dma_clear_flag_tc(dev) WRITE_REG(dev->port->IFCR, dma_flag_for_channel(dev, DMA_FLAG_TC | DMA_FLAG_TE | DMA_FLAG_HT | DMA_FLAG_GI));
+
+#define LL_DMA_EnableStream LL_DMA_EnableChannel
+#define LL_DMA_DisableStream LL_DMA_DisableChannel
+#define LL_DMA_IsEnabledStream LL_DMA_IsEnabledChannel
+
+#else
 #define DMA_FLAG_TC (0x1 << 5)
 #define DMA_FLAG_HT (0x1 << 4)
 #define DMA_FLAG_TE (0x1 << 3)
@@ -19,3 +34,5 @@ static const uint32_t _dma_flag_shift[] = {0, 6, 16, 22, 0, 6, 16, 22};
     else                                                                                                             \
       WRITE_REG(dev->port->HIFCR, dma_flag_for_channel(dev, DMA_FLAG_TC | DMA_FLAG_TE | DMA_FLAG_HT | DMA_FLAG_FE)); \
   }
+
+#endif

src/driver/stm32/exti.c

@@ -172,7 +172,7 @@ void EXTI15_10_IRQHandler() {
   handle_exit_isr();
 }
 
-#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
+#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7) || defined(STM32G4)
 
 #define EXTI5_IRQn EXTI9_5_IRQn
 #define EXTI6_IRQn EXTI9_5_IRQn