From 3917eaa1ecf594e5a72dc2d5424e5256889d1e57 Mon Sep 17 00:00:00 2001 From: bkleiner Date: Wed, 29 May 2024 21:44:21 +0200 Subject: [PATCH] add timer_enable_dma_request --- src/driver/at32/motor_dshot.c | 26 ++++---------------- src/driver/at32/timer.c | 24 +++++++++++++++++++ src/driver/stm32/motor_dshot.c | 44 +++++----------------------------- src/driver/stm32/timer.c | 36 ++++++++++++++++++++++++++++ src/driver/timer.h | 1 + 5 files changed, 72 insertions(+), 59 deletions(-) diff --git a/src/driver/at32/motor_dshot.c b/src/driver/at32/motor_dshot.c index 9ce1cce58..01c328276 100644 --- a/src/driver/at32/motor_dshot.c +++ b/src/driver/at32/motor_dshot.c @@ -31,7 +31,7 @@ typedef struct { uint32_t port_low; // motor pins for BSRRL, for setting pins low uint32_t port_high; // motor pins for BSRRH, for setting pins high - uint32_t timer_channel; + timer_channel_t timer_channel; dma_device_t dma_device; } dshot_gpio_port_t; @@ -43,15 +43,15 @@ volatile uint32_t dshot_dma_phase = 0; // 0: idle, 1 - (gpio_port_count + 1): ha static uint8_t gpio_port_count = 0; static dshot_gpio_port_t gpio_ports[DSHOT_MAX_PORT_COUNT] = { { - .timer_channel = TMR_SELECT_CHANNEL_1, + .timer_channel = TIMER_CH1, .dma_device = DMA_DEVICE_TIM1_CH1, }, { - .timer_channel = TMR_SELECT_CHANNEL_3, + .timer_channel = TIMER_CH3, .dma_device = DMA_DEVICE_TIM1_CH3, }, { - .timer_channel = TMR_SELECT_CHANNEL_4, + .timer_channel = TIMER_CH4, .dma_device = DMA_DEVICE_TIM1_CH4, }, }; @@ -129,22 +129,6 @@ static void dshot_init_gpio_port(dshot_gpio_port_t *port) { interrupt_enable(dma->irq, DMA_PRIORITY); } -static void dshot_enable_dma_request(uint32_t timer_channel, confirm_state new_state) { - switch (timer_channel) { - case TMR_SELECT_CHANNEL_1: - tmr_dma_request_enable(TMR1, TMR_C1_DMA_REQUEST, new_state); - break; - case TMR_SELECT_CHANNEL_3: - tmr_dma_request_enable(TMR1, TMR_C3_DMA_REQUEST, new_state); - break; - case TMR_SELECT_CHANNEL_4: - tmr_dma_request_enable(TMR1, TMR_C4_DMA_REQUEST, new_state); - break; - default: - break; - } -} - void motor_dshot_init() { gpio_port_count = 0; @@ -195,7 +179,7 @@ static void dshot_dma_setup_port(uint32_t index) { dma->channel->dtcnt = DSHOT_DMA_BUFFER_SIZE; dma_channel_enable(dma->channel, TRUE); - dshot_enable_dma_request(port->timer_channel, TRUE); + timer_enable_dma_request(TIMER1, port->timer_channel, true); } // make dshot dma packet, then fire diff --git a/src/driver/at32/timer.c b/src/driver/at32/timer.c index 14bb24729..3299b15b9 100644 --- a/src/driver/at32/timer.c +++ b/src/driver/at32/timer.c @@ -108,6 +108,30 @@ uint32_t timer_channel_val(timer_channel_t chan) { } } +void timer_enable_dma_request(timer_index_t tim, timer_channel_t chan, bool state) { + const timer_def_t *def = &timer_defs[tim]; + + switch (chan) { + case TIMER_CH1: + case TIMER_CH1N: + tmr_dma_request_enable(def->instance, TMR_C1_DMA_REQUEST, state ? TRUE : FALSE); + break; + case TIMER_CH2: + case TIMER_CH2N: + tmr_dma_request_enable(def->instance, TMR_C2_DMA_REQUEST, state ? TRUE : FALSE); + break; + case TIMER_CH3: + case TIMER_CH3N: + tmr_dma_request_enable(def->instance, TMR_C3_DMA_REQUEST, state ? TRUE : FALSE); + break; + case TIMER_CH4: + tmr_dma_request_enable(def->instance, TMR_C4_DMA_REQUEST, state ? TRUE : FALSE); + break; + default: + break; + } +} + static void timer_irq_handler() { extern void soft_serial_timer_irq_handler(); soft_serial_timer_irq_handler(); diff --git a/src/driver/stm32/motor_dshot.c b/src/driver/stm32/motor_dshot.c index fcb4d2f90..a2e8901a8 100644 --- a/src/driver/stm32/motor_dshot.c +++ b/src/driver/stm32/motor_dshot.c @@ -31,7 +31,7 @@ typedef struct { uint32_t port_low; // motor pins for BSRRL, for setting pins low uint32_t port_high; // motor pins for BSRRH, for setting pins high - uint32_t timer_channel; + timer_channel_t timer_channel; dma_device_t dma_device; } dshot_gpio_port_t; @@ -43,15 +43,15 @@ volatile uint32_t dshot_dma_phase = 0; // 0: idle, 1 - (gpio_port_count + 1): ha static uint8_t gpio_port_count = 0; static dshot_gpio_port_t gpio_ports[DSHOT_MAX_PORT_COUNT] = { { - .timer_channel = LL_TIM_CHANNEL_CH1, + .timer_channel = TIMER_CH1, .dma_device = DMA_DEVICE_TIM1_CH1, }, { - .timer_channel = LL_TIM_CHANNEL_CH3, + .timer_channel = TIMER_CH3, .dma_device = DMA_DEVICE_TIM1_CH3, }, { - .timer_channel = LL_TIM_CHANNEL_CH4, + .timer_channel = TIMER_CH4, .dma_device = DMA_DEVICE_TIM1_CH4, }, }; @@ -140,38 +140,6 @@ static void dshot_init_gpio_port(dshot_gpio_port_t *port) { LL_DMA_EnableIT_TC(dma->port, dma->stream_index); } -static void dshot_enable_dma_request(uint32_t timer_channel) { - switch (timer_channel) { - case LL_TIM_CHANNEL_CH1: - LL_TIM_EnableDMAReq_CC1(TIM1); - break; - case LL_TIM_CHANNEL_CH3: - LL_TIM_EnableDMAReq_CC3(TIM1); - break; - case LL_TIM_CHANNEL_CH4: - LL_TIM_EnableDMAReq_CC4(TIM1); - break; - default: - break; - } -} - -static void dshot_disable_dma_request(uint32_t timer_channel) { - switch (timer_channel) { - case LL_TIM_CHANNEL_CH1: - LL_TIM_DisableDMAReq_CC1(TIM1); - break; - case LL_TIM_CHANNEL_CH3: - LL_TIM_DisableDMAReq_CC3(TIM1); - break; - case LL_TIM_CHANNEL_CH4: - LL_TIM_DisableDMAReq_CC4(TIM1); - break; - default: - break; - } -} - void motor_dshot_init() { gpio_port_count = 0; @@ -227,7 +195,7 @@ static void dshot_dma_setup_port(uint32_t index) { LL_DMA_SetDataLength(dma->port, dma->stream_index, DSHOT_DMA_BUFFER_SIZE); LL_DMA_EnableStream(dma->port, dma->stream_index); - dshot_enable_dma_request(port->timer_channel); + timer_enable_dma_request(TIMER1, port->timer_channel, true); } // make dshot dma packet, then fire @@ -275,7 +243,7 @@ void dshot_dma_isr(dma_device_t dev) { LL_DMA_DisableStream(dma->port, dma->stream_index); const dshot_gpio_port_t *port = dshot_gpio_for_device(dev); - dshot_disable_dma_request(port->timer_channel); + timer_enable_dma_request(TIMER1, port->timer_channel, false); dshot_dma_phase--; } diff --git a/src/driver/stm32/timer.c b/src/driver/stm32/timer.c index 5827fde3e..43084a30a 100644 --- a/src/driver/stm32/timer.c +++ b/src/driver/stm32/timer.c @@ -81,6 +81,42 @@ uint32_t timer_channel_val(timer_channel_t chan) { } } +void timer_enable_dma_request(timer_index_t tim, timer_channel_t chan, bool state) { + const timer_def_t *def = &timer_defs[tim]; + + switch (chan) { + case TIMER_CH1: + case TIMER_CH1N: + if (state) + LL_TIM_EnableDMAReq_CC1(def->instance); + else + LL_TIM_DisableDMAReq_CC1(def->instance); + break; + case TIMER_CH2: + case TIMER_CH2N: + if (state) + LL_TIM_EnableDMAReq_CC2(def->instance); + else + LL_TIM_DisableDMAReq_CC2(def->instance); + break; + case TIMER_CH3: + case TIMER_CH3N: + if (state) + LL_TIM_EnableDMAReq_CC3(def->instance); + else + LL_TIM_DisableDMAReq_CC3(def->instance); + break; + case TIMER_CH4: + if (state) + LL_TIM_EnableDMAReq_CC4(def->instance); + else + LL_TIM_DisableDMAReq_CC4(def->instance); + break; + default: + break; + } +} + static void timer_irq_handler() { extern void soft_serial_timer_irq_handler(); soft_serial_timer_irq_handler(); diff --git a/src/driver/timer.h b/src/driver/timer.h index 843ba6d55..f5160ab4a 100644 --- a/src/driver/timer.h +++ b/src/driver/timer.h @@ -88,5 +88,6 @@ void timer_alloc_init(); bool timer_alloc_tag(timer_use_t use, resource_tag_t tag); resource_tag_t timer_alloc(timer_use_t use); uint32_t timer_channel_val(timer_channel_t chan); +void timer_enable_dma_request(timer_index_t tim, timer_channel_t chan, bool state); void timer_up_init(timer_index_t tim, uint16_t divider, uint32_t period); \ No newline at end of file