Skip to content

Commit

Permalink
feat: split trap into feature
Browse files Browse the repository at this point in the history
  • Loading branch information
yfblock committed Aug 3, 2024
1 parent f0002b5 commit 71d8d39
Show file tree
Hide file tree
Showing 12 changed files with 45 additions and 35 deletions.
4 changes: 2 additions & 2 deletions Cargo.lock

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

4 changes: 2 additions & 2 deletions Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "polyhal"
version = "0.1.0"
version = "0.1.1"
edition = "2021"
description = "This crate provides the interface for multiple platforms."
authors = ["yfblock@321353225@qq.com"]
Expand All @@ -19,7 +19,7 @@ logger = []
vga_text = []
graphic = []

default = ["boot", "trap", "kcontext"]
default = ["boot", "kcontext"]

[dependencies]
log = "0.4"
Expand Down
2 changes: 1 addition & 1 deletion example/Cargo.lock

Some generated files are not rendered by default. Learn more about how customized files appear on GitHub.

52 changes: 26 additions & 26 deletions example/src/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,8 +12,8 @@ use polyhal::addr::PhysPage;
use polyhal::common::{get_mem_areas, PageAlloc};
use polyhal::debug_console::DebugConsole;
use polyhal::instruction::Instruction;
use polyhal::trap::TrapType::{self, *};
use polyhal::trapframe::TrapFrame;
// use polyhal::trap::TrapType::{self, *};
// use polyhal::trapframe::TrapFrame;

pub struct PageAllocImpl;

Expand All @@ -28,30 +28,30 @@ impl PageAlloc for PageAllocImpl {
}

/// kernel interrupt
#[polyhal::arch_interrupt]
fn kernel_interrupt(ctx: &mut TrapFrame, trap_type: TrapType) {
// println!("trap_type @ {:x?} {:#x?}", trap_type, ctx);
match trap_type {
Breakpoint => return,
SysCall => {
// jump to next instruction anyway
ctx.syscall_ok();
log::info!("Handle a syscall");
}
StorePageFault(paddr) | LoadPageFault(paddr) | InstructionPageFault(paddr) => {
log::info!("page fault: {:#x}", paddr);
}
IllegalInstruction(_) => {
log::info!("illegal instruction");
}
Timer => {
log::info!("Timer");
}
_ => {
log::warn!("unsuspended trap type: {:?}", trap_type);
}
}
}
// #[polyhal::arch_interrupt]
// fn kernel_interrupt(ctx: &mut TrapFrame, trap_type: TrapType) {
// // println!("trap_type @ {:x?} {:#x?}", trap_type, ctx);
// match trap_type {
// Breakpoint => return,
// SysCall => {
// // jump to next instruction anyway
// ctx.syscall_ok();
// log::info!("Handle a syscall");
// }
// StorePageFault(paddr) | LoadPageFault(paddr) | InstructionPageFault(paddr) => {
// log::info!("page fault: {:#x}", paddr);
// }
// IllegalInstruction(_) => {
// log::info!("illegal instruction");
// }
// Timer => {
// log::info!("Timer");
// }
// _ => {
// log::warn!("unsuspended trap type: {:?}", trap_type);
// }
// }
// }

#[polyhal::arch_entry]
/// kernel main function, entry point.
Expand Down
2 changes: 1 addition & 1 deletion polyhal-macro/Cargo.toml
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
[package]
name = "polyhal-macro"
version = "0.1.0"
version = "0.1.1"
edition = "2021"
description = "This crate provides macros for polyhal."
authors = ["yfblock@321353225@qq.com"]
Expand Down
3 changes: 3 additions & 0 deletions src/components/arch/x86_64/idt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,18 +14,21 @@ impl IdtStruct {
/// `trap_handler_table`.
#[allow(clippy::new_without_default)]
pub fn new() -> Self {
#[cfg(target_arch = "trap")]
extern "C" {
#[link_name = "trap_handler_table"]
static ENTRIES: [extern "C" fn(); NUM_INT];
}
let mut idt = Self(InterruptDescriptorTable::new());

#[cfg(target_arch = "trap")]
let entries = unsafe {
core::slice::from_raw_parts_mut(
&mut idt.0 as *mut _ as *mut Entry<HandlerFunc>,
NUM_INT,
)
};
#[cfg(target_arch = "trap")]
for i in 0..NUM_INT {
entries[i].set_handler_fn(unsafe { core::mem::transmute(ENTRIES[i]) });
}
Expand Down
5 changes: 3 additions & 2 deletions src/components/boot/aarch64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ use crate::{
instruction::Instruction,
pagetable::{PTEFlags, TLB},
percpu::percpu_area_init,
timer, trap,
timer,
},
};

Expand Down Expand Up @@ -167,7 +167,8 @@ pub fn rust_tmp_main(hart_id: usize, device_tree: usize) {
crate::components::debug_console::init_early();
#[cfg(feature = "logger")]
crate::components::debug_console::DebugConsole::log_init();
trap::init();
#[cfg(target_arch = "trap")]
crate::components::trap::init();
// Init GIC interrupt controller.
crate::components::irq::init();

Expand Down
2 changes: 2 additions & 0 deletions src/components/boot/loongarch64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -78,10 +78,12 @@ pub fn rust_tmp_main(hart_id: usize) {
display_info!("Boot HART ID", "{}", hart_id);
display_info!();

#[cfg(target_arch = "trap")]
crate::components::trap::set_trap_vector_base();
// Enable floating point
euen::set_fpe(true);
crate::components::timer::init_timer();
#[cfg(target_arch = "trap")]
crate::components::trap::tlb_init(crate::components::trap::tlb_fill as _);

CPU_NUM.init_by(2);
Expand Down
2 changes: 2 additions & 0 deletions src/components/boot/riscv64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -145,6 +145,7 @@ pub(crate) fn rust_main(hartid: usize, device_tree: usize) {
println!("CPU_ID offset: {:#x}", CPU_ID.offset());
println!("init success, CPU_ID: {}", CPU_ID.read_current());
CPU_ID.write_current(hartid);
#[cfg(target_arch = "trap")]
crate::components::trap::init();

println!("CPU_ID offset: {:#x}", CPU_ID.offset());
Expand Down Expand Up @@ -195,6 +196,7 @@ pub(crate) extern "C" fn rust_secondary_main(hartid: usize) {
CPU_ID.write_current(hartid);

// Initialize the trap.
#[cfg(target_arch = "trap")]
crate::components::trap::init();

// TODO: Get the hart_id and device_tree for the specified device.
Expand Down
1 change: 1 addition & 0 deletions src/components/boot/x86_64.rs
Original file line number Diff line number Diff line change
Expand Up @@ -121,6 +121,7 @@ fn rust_tmp_main(magic: usize, mboot_ptr: usize) {
// Init allocator
set_local_thread_pointer(hart_id());
crate::components::arch::gdt::init();
#[cfg(target_arch = "trap")]
crate::components::trap::init_syscall();
crate::components::timer::init_early();

Expand Down
1 change: 1 addition & 0 deletions src/components/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -16,6 +16,7 @@ pub mod multicore;
pub mod pagetable;
pub mod percpu;
pub mod timer;
#[cfg(target_arch = "trap")]
pub mod trap;
pub mod trapframe;

Expand Down
2 changes: 1 addition & 1 deletion src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -158,7 +158,7 @@ use core::mem::size_of;

#[cfg(feature = "boot")]
pub use polyhal_macro::arch_entry;
#[cfg(feature = "interrupt")]
#[cfg(feature = "trap")]
pub use polyhal_macro::arch_interrupt;

// Re export the Module like Structure.
Expand Down

0 comments on commit 71d8d39

Please sign in to comment.