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RISC-V Assertion failure in SelectionDagBuilder.cpp when compiling CheriBSD-compiler-rt with 128bit intrinsics: `(PartVT.isInteger() || PartVT == MVT::x86mmx) && ValueVT.isInteger() && "Unknown mismatch!"' #23

RISC-V Assertion failure in SelectionDagBuilder.cpp when compiling CheriBSD-compiler-rt with 128bit intrinsics: `(PartVT.isInteger() || PartVT == MVT::x86mmx) && ValueVT.isInteger() && "Unknown mismatch!"'

RISC-V Assertion failure in SelectionDagBuilder.cpp when compiling CheriBSD-compiler-rt with 128bit intrinsics: `(PartVT.isInteger() || PartVT == MVT::x86mmx) && ValueVT.isInteger() && "Unknown mismatch!"' #23

Workflow file for this run

name: Labeling new issues
on:
issues:
types: ['opened']
jobs:
automate-issues-labels:
runs-on: ubuntu-latest
if: github.repository == 'llvm/llvm-project'
steps:
- uses: andymckay/labeler@1.0.4
with:
add-labels: 'new issue'
ignore-if-labeled: true