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[CHERI-RISC-V] Add MC tests for floating point loads/stores
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arichardson committed Sep 4, 2024
1 parent 053ca71 commit c7e2597
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21 changes: 21 additions & 0 deletions llvm/test/MC/RISCV/cheri/rv32fdcxcheri-cap-mode-only-valid.s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+c,+xcheri,+cap-mode,+f,+d -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+c,+xcheri,+cap-mode,+f,+d < %s \
# RUN: | llvm-objdump -M no-aliases --mattr=+c,+xcheri,+cap-mode,+f,+d -d - \
# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s

## Floating-point store is only supported in capmode for RV32

# CHECK-ASM-AND-OBJ: c.cfsd fa0, 40(ca0)
# CHECK-ASM-SAME: encoding: [0x08,0xb5]
c.cfsd fa0, 40(ca0)
# CHECK-ASM-AND-OBJ: c.cfld fa0, 40(ca0)
# CHECK-ASM-SAME: encoding: [0x08,0x35]
c.cfld fa0, 40(ca0)

# CHECK-ASM-AND-OBJ: c.cfsdcsp ft1, 40(csp)
# CHECK-ASM-SAME: encoding: [0x06,0xb4]
c.cfsdcsp ft1, 40(csp)
# CHECK-ASM-AND-OBJ: c.cfldcsp ft1, 40(csp)
# CHECK-ASM-SAME: encoding: [0xa2,0x30]
c.cfldcsp ft1, 40(csp)
40 changes: 40 additions & 0 deletions llvm/test/MC/RISCV/cheri/rv32fdxcheri-cap-mode-valid.s
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# RUN: llvm-mc %s -triple=riscv32 -mattr=+xcheri,+cap-mode,+f,+d -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+xcheri,+cap-mode,+f,+d < %s \
# RUN: | llvm-objdump -M no-aliases --mattr=+xcheri,+cap-mode,+f,+d -d - \
# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc %s -triple=riscv64 -mattr=+xcheri,+cap-mode,+f,+d -riscv-no-aliases -show-encoding \
# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+xcheri,+cap-mode,+f,+d < %s \
# RUN: | llvm-objdump -M no-aliases --mattr=+xcheri,+cap-mode,+f,+d -d - \
# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s


# CHECK-ASM-AND-OBJ: cfsd fa0, 40(ca0)
# CHECK-ASM-SAME: encoding: [0x27,0x34,0xa5,0x02]
cfsd fa0, 40(ca0)
# CHECK-ASM-AND-OBJ: cfld fa0, 40(ca0)
# CHECK-ASM-SAME: encoding: [0x07,0x35,0x85,0x02]
cfld fa0, 40(ca0)

# CHECK-ASM-AND-OBJ: cfsw ft1, 40(ca0)
# CHECK-ASM-SAME: encoding: [0x27,0x24,0x15,0x02]
cfsw ft1, 40(ca0)
# CHECK-ASM-AND-OBJ: cflw ft1, 40(ca0)
# CHECK-ASM-SAME: encoding: [0x87,0x20,0x85,0x02]
cflw ft1, 40(ca0)


# CHECK-ASM-AND-OBJ: cfsd fa0, 0(ca0)
# CHECK-ASM-SAME: encoding: [0x27,0x30,0xa5,0x00]
cfsd fa0, (ca0)
# CHECK-ASM-AND-OBJ: cfld fa0, 0(ca0)
# CHECK-ASM-SAME: encoding: [0x07,0x35,0x05,0x00]
cfld fa0, (ca0)

# CHECK-ASM-AND-OBJ: cfsw ft1, 0(ca0)
# CHECK-ASM-SAME: encoding: [0x27,0x20,0x15,0x00]
cfsw ft1, (ca0)
# CHECK-ASM-AND-OBJ: cflw ft1, 0(ca0)
# CHECK-ASM-SAME: encoding: [0x87,0x20,0x05,0x00]
cflw ft1, (ca0)

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