-
Notifications
You must be signed in to change notification settings - Fork 0
/
Project1_ucf.ucf
40 lines (34 loc) · 3.68 KB
/
Project1_ucf.ucf
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
## This file is a general .ucf for Nexys3 rev B board
## To use it in a project:
## - remove or comment the lines corresponding to unused pins
## - rename the used signals according to the project
## Clock signal
NET "clk" LOC = "V10" | IOSTANDARD = "LVCMOS33"; #Bank = 2, pin name = IO_L30N_GCLK0_USERCCLK, Sch name = GCLK
## 7 segment display
NET "SSEG<0>" LOC = "T17" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L51P_M1DQ12, Sch name = CA
NET "SSEG<1>" LOC = "T18" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L51N_M1DQ13, Sch name = CB
NET "SSEG<2>" LOC = "U17" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L52P_M1DQ14, Sch name = CC
NET "SSEG<3>" LOC = "U18" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L52N_M1DQ15, Sch name = CD
NET "SSEG<4>" LOC = "M14" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L53P, Sch name = CE
NET "SSEG<5>" LOC = "N14" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L53N_VREF, Sch name = CF
NET "SSEG<6>" LOC = "L14" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L61P, Sch name = CG
#NET "SSEG<7>" LOC = "M13" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L61N, Sch name = DP
NET "ANODE<0>" LOC = "N16" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L50N_M1UDQSN, Sch name = AN0
NET "ANODE<1>" LOC = "N15" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L50P_M1UDQS, Sch name = AN1
NET "ANODE<2>" LOC = "P18" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L49N_M1DQ11, Sch name = AN2
NET "ANODE<3>" LOC = "P17" | IOSTANDARD = "LVCMOS33"; #Bank = 1, Pin name = IO_L49P_M1DQ10, Sch name = AN3
## Switches
NET "SW" LOC = "T10" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L29N_GCLK2, Sch name = SW0
#NET "sw<1>" LOC = "T9" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L32P_GCLK29, Sch name = SW1
#NET "sw<2>" LOC = "V9" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L32N_GCLK28, Sch name = SW2
#NET "sw<3>" LOC = "M8" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L40P, Sch name = SW3
#NET "sw<4>" LOC = "N8" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L40N, Sch name = SW4
#NET "sw<5>" LOC = "U8" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L41P, Sch name = SW5
#NET "sw<6>" LOC = "V8" | IOSTANDARD = "LVCMOS33"; #Bank = 2, Pin name = IO_L41N_VREF, Sch name = SW6
#NET "sw<7>" LOC = "T5" | IOSTANDARD = "LVCMOS33"; #Bank = MISC, Pin name = IO_L48N_RDWR_B_VREF_2, Sch name = SW7
## Buttons
#NET "btn<0>" LOC = "B8" | IOSTANDARD = "LVCMOS33"; #Bank = 0, Pin name = IO_L33P, Sch name = BTNS
NET "rst" LOC = "A8" | IOSTANDARD = "LVCMOS33"; #Bank = 0, Pin name = IO_L33N, Sch name = BTNU
#NET "btn<2>" LOC = "C4" | IOSTANDARD = "LVCMOS33"; #Bank = 0, Pin name = IO_L1N_VREF, Sch name = BTNL
NET "step" LOC = "C9" | IOSTANDARD = "LVCMOS33"; #Bank = 0, Pin name = IO_L34N_GCLK18, Sch name = BTND
#NET "btn<4>" LOC = "D9" | IOSTANDARD = "LVCMOS33"; #Bank = 0, Pin name = IO_L34P_GCLK19, Sch name = BTNR