xtheadmemidx.adoc

Indexed memory operations (XTheadMemIdx)

Frozen

The XTheadMemIdx extension is stable.

The XTheadMemIdx ISA extension provides indexed memory operations. for GP registers.

The table below gives an overview of the instructions:

RV32	RV64	Mnemonic	Instruction
Y	Y	th.lbia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lbia]
Y	Y	th.lbib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lbib]
Y	Y	th.lbuia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lbuia]
Y	Y	th.lbuib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lbuib]
Y	Y	th.lhia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lhia]
Y	Y	th.lhib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lhib]
Y	Y	th.lhuia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lhuia]
Y	Y	th.lhuib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lhuib]
Y	Y	th.lwia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lwia]
Y	Y	th.lwib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lwib]
N	Y	th.lwuia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lwuia]
N	Y	th.lwuib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-lwuib]
N	Y	th.ldia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-ldia]
N	Y	th.ldib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-ldib]
Y	Y	th.sbia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-sbia]
Y	Y	th.sbib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-sbib]
Y	Y	th.shia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-shia]
Y	Y	th.shib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-shib]
Y	Y	th.swia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-swia]
Y	Y	th.swib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-swib]
N	Y	th.sdia rd, (rs1), imm5, imm2	[xtheadmemidx-insns-sdia]
N	Y	th.sdib rd, (rs1), imm5, imm2	[xtheadmemidx-insns-sdib]
Y	Y	th.lrb rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrb]
Y	Y	th.lrbu rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrbu]
Y	Y	th.lrh rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrh]
Y	Y	th.lrhu rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrhu]
Y	Y	th.lrw rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrw]
N	Y	th.lrwu rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrwu]
N	Y	th.lrd rd, rs1, rs2, imm2	[xtheadmemidx-insns-lrd]
Y	Y	th.srb rd, rs1, rs2, imm2	[xtheadmemidx-insns-srb]
Y	Y	th.srh rd, rs1, rs2, imm2	[xtheadmemidx-insns-srh]
Y	Y	th.srw rd, rs1, rs2, imm2	[xtheadmemidx-insns-srw]
N	Y	th.srd rd, rs1, rs2, imm2	[xtheadmemidx-insns-srd]
Y	Y	th.lurb rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurb]
Y	Y	th.lurbu rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurbu]
Y	Y	th.lurh rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurh]
Y	Y	th.lurhu rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurhu]
Y	Y	th.lurw rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurw]
N	Y	th.lurwu rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurwu]
N	Y	th.lurd rd, rs1, rs2, imm2	[xtheadmemidx-insns-lurd]
Y	Y	th.surb rd, rs1, rs2, imm2	[xtheadmemidx-insns-surb]
Y	Y	th.surh rd, rs1, rs2, imm2	[xtheadmemidx-insns-surh]
Y	Y	th.surw rd, rs1, rs2, imm2	[xtheadmemidx-insns-surw]
N	Y	th.surd rd, rs1, rs2, imm2	[xtheadmemidx-insns-surd]

Instructions

xtheadmemidx/lbia.adoc <<< xtheadmemidx/lbib.adoc <<< xtheadmemidx/lbuia.adoc <<< xtheadmemidx/lbuib.adoc <<< xtheadmemidx/lhia.adoc <<< xtheadmemidx/lhib.adoc <<< xtheadmemidx/lhuia.adoc <<< xtheadmemidx/lhuib.adoc <<< xtheadmemidx/lwia.adoc <<< xtheadmemidx/lwib.adoc <<< xtheadmemidx/lwuia.adoc <<< xtheadmemidx/lwuib.adoc <<< xtheadmemidx/ldia.adoc <<< xtheadmemidx/ldib.adoc <<< xtheadmemidx/sbia.adoc <<< xtheadmemidx/sbib.adoc <<< xtheadmemidx/shia.adoc <<< xtheadmemidx/shib.adoc <<< xtheadmemidx/swia.adoc <<< xtheadmemidx/swib.adoc <<< xtheadmemidx/sdia.adoc <<< xtheadmemidx/sdib.adoc <<< xtheadmemidx/lrb.adoc <<< xtheadmemidx/lrbu.adoc <<< xtheadmemidx/lrh.adoc <<< xtheadmemidx/lrhu.adoc <<< xtheadmemidx/lrw.adoc <<< xtheadmemidx/lrwu.adoc <<< xtheadmemidx/lrd.adoc <<< xtheadmemidx/srb.adoc <<< xtheadmemidx/srh.adoc <<< xtheadmemidx/srw.adoc <<< xtheadmemidx/srd.adoc <<< xtheadmemidx/lurb.adoc <<< xtheadmemidx/lurbu.adoc <<< xtheadmemidx/lurh.adoc <<< xtheadmemidx/lurhu.adoc <<< xtheadmemidx/lurw.adoc <<< xtheadmemidx/lurwu.adoc <<< xtheadmemidx/lurd.adoc <<< xtheadmemidx/surb.adoc <<< xtheadmemidx/surh.adoc <<< xtheadmemidx/surw.adoc <<< xtheadmemidx/surd.adoc