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howjmay committed Nov 3, 2023
1 parent 37a6ffc commit dc88d9c
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Showing 2 changed files with 25 additions and 22 deletions.
12 changes: 6 additions & 6 deletions sse2neon.h
Original file line number Diff line number Diff line change
Expand Up @@ -1774,7 +1774,7 @@ FORCE_INLINE void _sse2neon_set_fpcr(uint64_t value)
#if defined(_MSC_VER)
_WriteStatusReg(ARM64_FPCR, value);
#else
__asm__ __volatile__("msr FPCR, %0" ::"r"(value)); /* write */
__asm__ __volatile__("msr FPCR, %0" ::"r"(value)); /* write */
#endif
}

Expand Down Expand Up @@ -2385,7 +2385,7 @@ FORCE_INLINE void _sse2neon_mm_set_flush_zero_mode(unsigned int flag)
#if defined(__aarch64__) || defined(_M_ARM64)
_sse2neon_set_fpcr(r.value);
#else
__asm__ __volatile__("vmsr FPSCR, %0" ::"r"(r)); /* write */
__asm__ __volatile__("vmsr FPSCR, %0" ::"r"(r)); /* write */
#endif
}

Expand Down Expand Up @@ -2449,7 +2449,7 @@ FORCE_INLINE void _MM_SET_ROUNDING_MODE(int rounding)
#if defined(__aarch64__) || defined(_M_ARM64)
_sse2neon_set_fpcr(r.value);
#else
__asm__ __volatile__("vmsr FPSCR, %0" ::"r"(r)); /* write */
__asm__ __volatile__("vmsr FPSCR, %0" ::"r"(r)); /* write */
#endif
}

Expand Down Expand Up @@ -8636,9 +8636,9 @@ FORCE_INLINE __m128i _mm_aesenc_si128(__m128i a, __m128i RoundKey)
#define SSE2NEON_AES_B2W(b0, b1, b2, b3) \
(((uint32_t) (b3) << 24) | ((uint32_t) (b2) << 16) | \
((uint32_t) (b1) << 8) | (uint32_t) (b0))
// muliplying 'x' by 2 in GF(2^8)
// muliplying 'x' by 2 in GF(2^8)
#define SSE2NEON_AES_F2(x) ((x << 1) ^ (((x >> 7) & 1) * 0x011b /* WPOLY */))
// muliplying 'x' by 3 in GF(2^8)
// muliplying 'x' by 3 in GF(2^8)
#define SSE2NEON_AES_F3(x) (SSE2NEON_AES_F2(x) ^ x)
#define SSE2NEON_AES_U0(p) \
SSE2NEON_AES_B2W(SSE2NEON_AES_F2(p), p, p, SSE2NEON_AES_F3(p))
Expand Down Expand Up @@ -9167,7 +9167,7 @@ FORCE_INLINE void _sse2neon_mm_set_denormals_zero_mode(unsigned int flag)
#if defined(__aarch64__) || defined(_M_ARM64)
_sse2neon_set_fpcr(r.value);
#else
__asm__ __volatile__("vmsr FPSCR, %0" ::"r"(r)); /* write */
__asm__ __volatile__("vmsr FPSCR, %0" ::"r"(r)); /* write */
#endif
}

Expand Down
35 changes: 19 additions & 16 deletions tests/impl.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -365,7 +365,7 @@ static double next()
uint64_t z = (state += 0x9e3779b97f4a7c15);
z = (z ^ (z >> 30)) * 0xbf58476d1ce4e5b9;
z = (z ^ (z >> 27)) * 0x94d049bb133111eb;
return z ^ (z >> 31);
return (double)(z ^ (z >> 31));
}

static float ranf()
Expand Down Expand Up @@ -5847,7 +5847,7 @@ result_t test_mm_shuffle_epi32(const SSE2NEONTestImpl &impl, uint32_t iter)

#define TEST_IMPL(IDX) \
int32_t d##IDX[4]; \
d##IDX[0] = _a[((IDX) &0x3)]; \
d##IDX[0] = _a[((IDX) & 0x3)]; \
d##IDX[1] = _a[((IDX >> 2) & 0x3)]; \
d##IDX[2] = _a[((IDX >> 4) & 0x3)]; \
d##IDX[3] = _a[((IDX >> 6) & 0x3)]; \
Expand Down Expand Up @@ -5886,20 +5886,23 @@ result_t test_mm_shufflehi_epi16(const SSE2NEONTestImpl &impl, uint32_t iter)
const int16_t *_a = (const int16_t *) impl.mTestIntPointer1;
__m128i a, c;

#define TEST_IMPL(IDX) \
int16_t d##IDX[8]; \
d##IDX[0] = _a[0]; \
d##IDX[1] = _a[1]; \
d##IDX[2] = _a[2]; \
d##IDX[3] = _a[3]; \
d##IDX[4] = (int16_t) (((const int64_t *) _a)[1] >> ((IDX & 0x3) * 16)); \
d##IDX[5] = (int16_t) (((const int64_t *) _a)[1] >> (((IDX >> 2) & 0x3) * 16)); \
d##IDX[6] = (int16_t) (((const int64_t *) _a)[1] >> (((IDX >> 4) & 0x3) * 16)); \
d##IDX[7] = (int16_t) (((const int64_t *) _a)[1] >> (((IDX >> 6) & 0x3) * 16)); \
\
a = load_m128i(_a); \
c = _mm_shufflehi_epi16(a, IDX); \
\
#define TEST_IMPL(IDX) \
int16_t d##IDX[8]; \
d##IDX[0] = _a[0]; \
d##IDX[1] = _a[1]; \
d##IDX[2] = _a[2]; \
d##IDX[3] = _a[3]; \
d##IDX[4] = (int16_t) (((const int64_t *) _a)[1] >> ((IDX & 0x3) * 16)); \
d##IDX[5] = \
(int16_t) (((const int64_t *) _a)[1] >> (((IDX >> 2) & 0x3) * 16)); \
d##IDX[6] = \
(int16_t) (((const int64_t *) _a)[1] >> (((IDX >> 4) & 0x3) * 16)); \
d##IDX[7] = \
(int16_t) (((const int64_t *) _a)[1] >> (((IDX >> 6) & 0x3) * 16)); \
\
a = load_m128i(_a); \
c = _mm_shufflehi_epi16(a, IDX); \
\
CHECK_RESULT(VALIDATE_INT16_M128(c, d##IDX))

IMM_256_ITER
Expand Down

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