1.3.4
- Added FIFO reception thresh, and data size cfg to SPI]
- Add SMPS power config for some H7 variants
- Remove backup domain reset on RTC init
- Added SAI code to sync between periphs and blocks
- Added support for SAI3 and 4 clock selection on H7
- Split PLL source selection from input source on H7; cleaner config separation for PLLs 1-3