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stm32_svd-adc.ali
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stm32_svd-adc.ali
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V "GNAT Lib v12"
A -O3
A -gnatA
A --RTS=/home/sabermaster/.config/alire/cache/dependencies/gnat_arm_elf_12.2.1_9be2ca0e/arm-eabi/lib/gnat/embedded-stm32f429disco/
A -mlittle-endian
A -mfloat-abi=hard
A -mcpu=cortex-m4
A -mfpu=fpv4-sp-d16
A -mthumb
A -gnatn
A -ffunction-sections
A -fdata-sections
A -mlibarch=armv7e-m+fp
A -march=armv7e-m+fp
P DB ZX
RN
RV NO_IMPLICIT_CONDITIONALS
RV NO_IMPLEMENTATION_ATTRIBUTES
RV NO_IMPLEMENTATION_PRAGMAS
RV NO_IMPLEMENTATION_RESTRICTIONS
RV NO_IMPLICIT_LOOPS
RR NO_ELABORATION_CODE
U stm32_svd.adc%s stm32_svd-adc.ads f46a4eb7 NE OO PR PK IU
W hal%s hal.ads hal.ali
W stm32_svd%s stm32_svd.ads stm32_svd.ali
W system%s system.ads system.ali
Z system.unsigned_types%s s-unstyp.ads s-unstyp.ali
D hal.ads 20240326050407 2b42c80e hal%s
D interfac.ads 20220929111741 edec285f interfaces%s
D stm32_svd.ads 20240326050411 89b9f11a stm32_svd%s
D stm32_svd-adc.ads 20240326050411 0c4598f6 stm32_svd.adc%s
D system.ads 20220929111741 5ad4ef55 system%s
D s-unstyp.ads 20220929111741 fa2a7f59 system.unsigned_types%s
G a e
G c Z s s [sr_registerIP stm32_svd__adc 18 9 none]
G c Z s s [cr1_registerIP stm32_svd__adc 52 9 none]
G c Z s s [cr2_registerIP stm32_svd__adc 114 9 none]
G c Z s s [Tsmpr1_smp_field_arrayBIP stm32_svd__adc 174 4 none]
G c Z s s [smpr1_smp_fieldIP stm32_svd__adc 178 9 none]
G c Z s s [smpr1_registerIP stm32_svd__adc 198 9 none]
G c Z s s [Tsmpr2_smp_field_arrayBIP stm32_svd__adc 216 4 none]
G c Z s s [smpr2_smp_fieldIP stm32_svd__adc 220 9 none]
G c Z s s [smpr2_registerIP stm32_svd__adc 240 9 none]
G c Z s s [jofr1_registerIP stm32_svd__adc 257 9 none]
G c Z s s [jofr2_registerIP stm32_svd__adc 274 9 none]
G c Z s s [jofr3_registerIP stm32_svd__adc 291 9 none]
G c Z s s [jofr4_registerIP stm32_svd__adc 308 9 none]
G c Z s s [htr_registerIP stm32_svd__adc 325 9 none]
G c Z s s [ltr_registerIP stm32_svd__adc 342 9 none]
G c Z s s [Tsqr1_sq_field_arrayBIP stm32_svd__adc 360 4 none]
G c Z s s [sqr1_sq_fieldIP stm32_svd__adc 364 9 none]
G c Z s s [sqr1_registerIP stm32_svd__adc 386 9 none]
G c Z s s [Tsqr2_sq_field_arrayBIP stm32_svd__adc 407 4 none]
G c Z s s [sqr2_sq_fieldIP stm32_svd__adc 411 9 none]
G c Z s s [sqr2_registerIP stm32_svd__adc 431 9 none]
G c Z s s [Tsqr3_sq_field_arrayBIP stm32_svd__adc 449 4 none]
G c Z s s [sqr3_sq_fieldIP stm32_svd__adc 453 9 none]
G c Z s s [sqr3_registerIP stm32_svd__adc 473 9 none]
G c Z s s [Tjsqr_jsq_field_arrayBIP stm32_svd__adc 491 4 none]
G c Z s s [jsqr_jsq_fieldIP stm32_svd__adc 495 9 none]
G c Z s s [jsqr_registerIP stm32_svd__adc 517 9 none]
G c Z s s [jdr_registerIP stm32_svd__adc 537 9 none]
G c Z s s [dr_registerIP stm32_svd__adc 554 9 none]
G c Z s s [adc1_peripheralIP stm32_svd__adc 720 9 none]
G c Z s s [csr_registerIP stm32_svd__adc 569 9 none]
G c Z s s [ccr_registerIP stm32_svd__adc 646 9 none]
G c Z s s [Tcdr_data_field_arrayBIP stm32_svd__adc 691 4 none]
G c Z s s [cdr_registerIP stm32_svd__adc 695 9 none]
G c Z s s [c_adc_peripheralIP stm32_svd__adc 800 9 none]
X 1 hal.ads
34K9*HAL 166e8 4|7w6 32r23 47r31 48r33 49r29 74r24 84r24 108r33 109r32 110r32
. 111r31 120r24 130r24 138r24 146r24 171r33 184r19 202r24 213r33 226r19 244r24
. 254r36 261r24 271r36 278r24 288r36 295r24 305r36 312r24 322r28 329r24 339r28
. 346r24 357r31 370r19 383r28 392r24 404r31 417r19 435r24 446r31 459r19 477r24
. 488r32 501r19 514r29 523r24 534r31 541r24 551r29 558r24 583r24 597r24 611r24
. 640r30 641r31 642r29 643r32 650r24 654r24 662r24 668r24 688r32 701r19
37M9*Bit 4|138r28 146r28 654r28
39M9*UInt2 4|49r33 109r36 111r35 244r28 435r28 477r28 514r33 583r28 597r28
. 642r33 643r36
41M9*UInt3 4|48r37 171r37 213r37 650r28
43M9*UInt4 4|108r37 110r36 130r28 383r32 641r35 662r28
45M9*UInt5 4|47r35 84r28 202r28 357r35 404r35 446r35 488r36 640r34
47M9*UInt6 4|74r28 120r28
53M9*UInt8<2|68M9> 4|392r28 668r28
54M9*UInt10 4|523r28 611r28
58M9*UInt12 4|254r40 271r40 288r40 305r40 322r32 339r32
66M9*UInt16<2|71M9> 4|534r35 541r28 551r33 558r28 688r36
73M9*UInt20 4|261r28 278r28 295r28 312r28 329r28 346r28 370r23 501r23
85M9*UInt26 4|32r27
87M9*UInt27 4|184r23
93M9*UInt30 4|226r23 417r23 459r23
97M9*UInt32<2|79M9> 4|701r23
X 2 interfac.ads
68M9*Unsigned_8
71M9*Unsigned_16
79M9*Unsigned_32
X 3 stm32_svd.ads
10K9*STM32_SVD 184e14 4|10r9 820r5
X 4 stm32_svd-adc.ads
10K19*ADC 3|10k9 4|820l15 820e18
18R9*SR_Register 34e6 37r8 722r23
20b7*AWD{boolean} 38r7
22b7*EOC{boolean} 39r7
24b7*JEOC{boolean} 40r7
26b7*JSTRT{boolean} 41r7
28b7*STRT{boolean} 42r7
30b7*OVR{boolean} 43r7
32m7*Reserved_6_31{1|85M9} 44r7
47M12*CR1_AWDCH_Field{1|45M9} 54r24
48M12*CR1_DISCNUM_Field{1|41M9} 72r24
49M12*CR1_RES_Field{1|39M9} 80r24
52R9*CR1_Register 86e6 89r8 724r23
54m7*AWDCH{47M12} 90r7
56b7*EOCIE{boolean} 91r7
58b7*AWDIE{boolean} 92r7
60b7*JEOCIE{boolean} 93r7
62b7*SCAN{boolean} 94r7
64b7*AWDSGL{boolean} 95r7
66b7*JAUTO{boolean} 96r7
68b7*DISCEN{boolean} 97r7
70b7*JDISCEN{boolean} 98r7
72m7*DISCNUM{48M12} 99r7
74m7*Reserved_16_21{1|47M9} 100r7
76b7*JAWDEN{boolean} 101r7
78b7*AWDEN{boolean} 102r7
80m7*RES{49M12} 103r7
82b7*OVRIE{boolean} 104r7
84m7*Reserved_27_31{1|45M9} 105r7
108M12*CR2_JEXTSEL_Field{1|43M9} 132r24
109M12*CR2_JEXTEN_Field{1|39M9} 134r24
110M12*CR2_EXTSEL_Field{1|43M9} 140r24
111M12*CR2_EXTEN_Field{1|39M9} 142r24
114R9*CR2_Register 148e6 151r8 726r23
116b7*ADON{boolean} 152r7
118b7*CONT{boolean} 153r7
120m7*Reserved_2_7{1|47M9} 154r7
122b7*DMA{boolean} 155r7
124b7*DDS{boolean} 156r7
126b7*EOCS{boolean} 157r7
128b7*ALIGN{boolean} 158r7
130m7*Reserved_12_15{1|43M9} 159r7
132m7*JEXTSEL{108M12} 160r7
134m7*JEXTEN{109M12} 161r7
136b7*JSWSTART{boolean} 162r7
138m7*Reserved_23_23{1|37M9} 163r7
140m7*EXTSEL{110M12} 164r7
142m7*EXTEN{111M12} 165r7
144b7*SWSTART{boolean} 166r7
146m7*Reserved_31_31{1|37M9} 167r7
171M12*SMPR1_SMP_Element{1|41M9} 174r54
174A9*SMPR1_SMP_Field_Array(171M12)<integer> 187r19
178R9*SMPR1_SMP_Field 179d7 190e6 192r8 200r24
179b7*As_Array{boolean} 181r12 200m44
184m13*Val{1|87M9} 193r7 200m63
187a13*Arr{174A9} 194r7
198R9*SMPR1_Register 204e6 207r8 728r23
200r7*SMP{178R9} 208r7
202m7*Reserved_27_31{1|45M9} 209r7
213M12*SMPR2_SMP_Element{1|41M9} 216r52
216A9*SMPR2_SMP_Field_Array(213M12)<integer> 229r19
220R9*SMPR2_SMP_Field 221d7 232e6 234r8 242r24
221b7*As_Array{boolean} 223r12 242m44
226m13*Val{1|93M9} 235r7 242m63
229a13*Arr{216A9} 236r7
240R9*SMPR2_Register 246e6 249r8 730r23
242r7*SMP{220R9} 250r7
244m7*Reserved_30_31{1|39M9} 251r7
254M12*JOFR1_JOFFSET1_Field{1|58M9} 259r24
257R9*JOFR1_Register 263e6 266r8 732r23
259m7*JOFFSET1{254M12} 267r7
261m7*Reserved_12_31{1|73M9} 268r7
271M12*JOFR2_JOFFSET2_Field{1|58M9} 276r24
274R9*JOFR2_Register 280e6 283r8 734r23
276m7*JOFFSET2{271M12} 284r7
278m7*Reserved_12_31{1|73M9} 285r7
288M12*JOFR3_JOFFSET3_Field{1|58M9} 293r24
291R9*JOFR3_Register 297e6 300r8 736r23
293m7*JOFFSET3{288M12} 301r7
295m7*Reserved_12_31{1|73M9} 302r7
305M12*JOFR4_JOFFSET4_Field{1|58M9} 310r24
308R9*JOFR4_Register 314e6 317r8 738r23
310m7*JOFFSET4{305M12} 318r7
312m7*Reserved_12_31{1|73M9} 319r7
322M12*HTR_HT_Field{1|58M9} 327r24
325R9*HTR_Register 331e6 334r8 740r23
327m7*HT{322M12} 335r7
329m7*Reserved_12_31{1|73M9} 336r7
339M12*LTR_LT_Field{1|58M9} 344r24
342R9*LTR_Register 348e6 351r8 742r23
344m7*LT{339M12} 352r7
346m7*Reserved_12_31{1|73M9} 353r7
357M12*SQR1_SQ_Element{1|45M9} 360r52
360A9*SQR1_SQ_Field_Array(357M12)<integer> 373r19
364R9*SQR1_SQ_Field 365d7 376e6 378r8 388r24
365b7*As_Array{boolean} 367r12 388m42
370m13*Val{1|73M9} 379r7 388m61
373a13*Arr{360A9} 380r7
383M12*SQR1_L_Field{1|43M9} 390r24
386R9*SQR1_Register 394e6 397r8 744r23
388r7*SQ{364R9} 398r7
390m7*L{383M12} 399r7
392m7*Reserved_24_31{1|53M9} 400r7
404M12*SQR2_SQ_Element{1|45M9} 407r51
407A9*SQR2_SQ_Field_Array(404M12)<integer> 420r19
411R9*SQR2_SQ_Field 412d7 423e6 425r8 433r24
412b7*As_Array{boolean} 414r12 433m42
417m13*Val{1|93M9} 426r7 433m61
420a13*Arr{407A9} 427r7
431R9*SQR2_Register 437e6 440r8 746r23
433r7*SQ{411R9} 441r7
435m7*Reserved_30_31{1|39M9} 442r7
446M12*SQR3_SQ_Element{1|45M9} 449r50
449A9*SQR3_SQ_Field_Array(446M12)<integer> 462r19
453R9*SQR3_SQ_Field 454d7 465e6 467r8 475r24
454b7*As_Array{boolean} 456r12 475m42
459m13*Val{1|93M9} 468r7 475m61
462a13*Arr{449A9} 469r7
473R9*SQR3_Register 479e6 482r8 748r23
475r7*SQ{453R9} 483r7
477m7*Reserved_30_31{1|39M9} 484r7
488M12*JSQR_JSQ_Element{1|45M9} 491r51
491A9*JSQR_JSQ_Field_Array(488M12)<integer> 504r19
495R9*JSQR_JSQ_Field 496d7 507e6 509r8 519r24
496b7*As_Array{boolean} 498r12 519m43
501m13*Val{1|73M9} 510r7 519m62
504a13*Arr{491A9} 511r7
514M12*JSQR_JL_Field{1|39M9} 521r24
517R9*JSQR_Register 525e6 528r8 750r23
519r7*JSQ{495R9} 529r7
521m7*JL{514M12} 530r7
523m7*Reserved_22_31{1|54M9} 531r7
534M12*JDR_JDATA_Field{1|66M9} 539r24
537R9*JDR_Register 543e6 546r8 752r23 754r23 756r23 758r23
539m7*JDATA{534M12} 547r7
541m7*Reserved_16_31{1|66M9} 548r7
551M12*DR_DATA_Field{1|66M9} 556r24
554R9*DR_Register 560e6 563r8 760r23
556m7*DATA{551M12} 564r7
558m7*Reserved_16_31{1|66M9} 565r7
569R9*CSR_Register 613e6 616r8 802r21
571b7*AWD1{boolean} 617r7
573b7*EOC1{boolean} 618r7
575b7*JEOC1{boolean} 619r7
577b7*JSTRT1{boolean} 620r7
579b7*STRT1{boolean} 621r7
581b7*OVR1{boolean} 622r7
583m7*Reserved_6_7{1|39M9} 623r7
585b7*AWD2{boolean} 624r7
587b7*EOC2{boolean} 625r7
589b7*JEOC2{boolean} 626r7
591b7*JSTRT2{boolean} 627r7
593b7*STRT2{boolean} 628r7
595b7*OVR2{boolean} 629r7
597m7*Reserved_14_15{1|39M9} 630r7
599b7*AWD3{boolean} 631r7
601b7*EOC3{boolean} 632r7
603b7*JEOC3{boolean} 633r7
605b7*JSTRT3{boolean} 634r7
607b7*STRT3{boolean} 635r7
609b7*OVR3{boolean} 636r7
611m7*Reserved_22_31{1|54M9} 637r7
640M12*CCR_MULT_Field{1|45M9} 648r24
641M12*CCR_DELAY_Field{1|43M9} 652r24
642M12*CCR_DMA_Field{1|39M9} 658r24
643M12*CCR_ADCPRE_Field{1|39M9} 660r24
646R9*CCR_Register 670e6 673r8 804r21
648m7*MULT{640M12} 674r7
650m7*Reserved_5_7{1|41M9} 675r7
652m7*DELAY_k{641M12} 676r7
654m7*Reserved_12_12{1|37M9} 677r7
656b7*DDS{boolean} 678r7
658m7*DMA{642M12} 679r7
660m7*ADCPRE{643M12} 680r7
662m7*Reserved_18_21{1|43M9} 681r7
664b7*VBATE{boolean} 682r7
666b7*TSVREFE{boolean} 683r7
668m7*Reserved_24_31{1|53M9} 684r7
688M12*CDR_DATA_Element{1|66M9} 691r51
691A9*CDR_DATA_Field_Array(688M12)<integer> 704r19
695R9*CDR_Register 696d7 707e6 710r8 806r21
696b7*As_Array{boolean} 698r12
701m13*Val{1|97M9} 711r7
704a13*Arr{691A9} 712r7
720R9*ADC1_Peripheral 762e6 764r8 788r26 792r26 796r26
722r7*SR{18R9} 765r7
724r7*CR1{52R9} 766r7
726r7*CR2{114R9} 767r7
728r7*SMPR1{198R9} 768r7
730r7*SMPR2{240R9} 769r7
732r7*JOFR1{257R9} 770r7
734r7*JOFR2{274R9} 771r7
736r7*JOFR3{291R9} 772r7
738r7*JOFR4{308R9} 773r7
740r7*HTR{325R9} 774r7
742r7*LTR{342R9} 775r7
744r7*SQR1{386R9} 776r7
746r7*SQR2{431R9} 777r7
748r7*SQR3{473R9} 778r7
750r7*JSQR{517R9} 779r7
752r7*JDR1{537R9} 780r7
754r7*JDR2{537R9} 781r7
756r7*JDR3{537R9} 782r7
758r7*JDR4{537R9} 783r7
760r7*DR{554R9} 784r7
788r4*ADC1_Periph{720R9}
792r4*ADC2_Periph{720R9}
796r4*ADC3_Periph{720R9}
800R9*C_ADC_Peripheral 808e6 810r8 817r27
802r7*CSR{569R9} 811r7
804r7*CCR{646R9} 812r7
806r7*CDR{695R9} 813r7
817r4*C_ADC_Periph{800R9}
X 5 system.ads
50K9*System 4|8w6 35r24 87r24 149r24 205r24 247r24 264r24 281r24 298r24 315r24
. 332r24 349r24 395r24 438r24 480r24 526r24 544r24 561r24 614r24 671r24 708r24
. 789r30 793r30 797r30 818r30 5|164e11
80M9*Address 4|789r30 793r30 797r30 818r30
104n41*Low_Order_First{104E9} 4|35r31 87r31 149r31 205r31 247r31 264r31 281r31
. 298r31 315r31 332r31 349r31 395r31 438r31 480r31 526r31 544r31 561r31 614r31
. 671r31 708r31