From 815920c87f9bda6b3fb7ec24686154210c9e8774 Mon Sep 17 00:00:00 2001 From: Damien George Date: Fri, 14 Oct 2022 15:49:52 +1100 Subject: [PATCH 001/823] extmod/utime_mphal: Make ticks_add check for overflow of delta. Work done in collaboration with @jimmo. Signed-off-by: Damien George --- extmod/utime_mphal.c | 13 +++++++++++ tests/extmod/ticks_add.py | 42 +++++++++++++++++++++++++++++++++++ tests/extmod/ticks_add.py.exp | 36 ++++++++++++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 tests/extmod/ticks_add.py create mode 100644 tests/extmod/ticks_add.py.exp diff --git a/extmod/utime_mphal.c b/extmod/utime_mphal.c index 3d1cdfd82062..cd91c95530cb 100644 --- a/extmod/utime_mphal.c +++ b/extmod/utime_mphal.c @@ -95,6 +95,19 @@ STATIC mp_obj_t time_ticks_add(mp_obj_t ticks_in, mp_obj_t delta_in) { // we assume that first argument come from ticks_xx so is small int mp_uint_t ticks = MP_OBJ_SMALL_INT_VALUE(ticks_in); mp_uint_t delta = mp_obj_get_int(delta_in); + + // Check that delta does not overflow the range that ticks_diff can handle. + // This ensures the following: + // - ticks_diff(ticks_add(T, delta), T) == delta + // - ticks_diff(T, ticks_add(T, delta)) == -delta + // The latter requires excluding delta=-TICKS_PERIOD/2. + // + // This unsigned comparison is equivalent to a signed comparison of: + // delta <= TICKS_PERIOD/2 || delta >= TICKS_PERIOD/2 + if (delta + MICROPY_PY_UTIME_TICKS_PERIOD / 2 - 1 >= MICROPY_PY_UTIME_TICKS_PERIOD - 1) { + mp_raise_msg(&mp_type_OverflowError, MP_ERROR_TEXT("ticks interval overflow")); + } + return MP_OBJ_NEW_SMALL_INT((ticks + delta) & (MICROPY_PY_UTIME_TICKS_PERIOD - 1)); } MP_DEFINE_CONST_FUN_OBJ_2(mp_utime_ticks_add_obj, time_ticks_add); diff --git a/tests/extmod/ticks_add.py b/tests/extmod/ticks_add.py new file mode 100644 index 000000000000..2f1ba6c8109d --- /dev/null +++ b/tests/extmod/ticks_add.py @@ -0,0 +1,42 @@ +try: + from utime import ticks_diff, ticks_add +except ImportError: + print("SKIP") + raise SystemExit + +# Maximum value returned from ticks_add, ticks_ms, etc. +TICKS_MAX = ticks_add(0, -1) +# Maximum value returned from ticks_diff. +TICKS_INTERVAL_MAX = TICKS_MAX // 2 + +# Invariants: +# - ticks_diff(ticks_add(T, delta), T) == delta +# - ticks_diff(T, ticks_add(T, delta)) == -delta + +# Check actual values of ticks_add. +print(ticks_add(20, 12)) +print(ticks_add(20, -12)) + +# Check invariant. +print(ticks_diff(ticks_add(100, 123), 100)) +print(ticks_diff(ticks_add(100, -123), 100)) +print(ticks_diff(100, ticks_add(100, 123))) +print(ticks_diff(100, ticks_add(100, -123))) + +# Check limits. +for T in (0, 10, TICKS_MAX): + for delta in ( + -TICKS_INTERVAL_MAX - 1, + -TICKS_INTERVAL_MAX, + 0, + TICKS_INTERVAL_MAX, + TICKS_INTERVAL_MAX + 1, + ): + try: + print(ticks_diff(ticks_add(T, delta), T) == delta) + except OverflowError: + print("OverflowError") + try: + print(ticks_diff(T, ticks_add(T, delta)) == -delta) + except OverflowError: + print("OverflowError") diff --git a/tests/extmod/ticks_add.py.exp b/tests/extmod/ticks_add.py.exp new file mode 100644 index 000000000000..60dc6f5afda6 --- /dev/null +++ b/tests/extmod/ticks_add.py.exp @@ -0,0 +1,36 @@ +32 +8 +123 +-123 +-123 +123 +OverflowError +OverflowError +True +True +True +True +True +True +OverflowError +OverflowError +OverflowError +OverflowError +True +True +True +True +True +True +OverflowError +OverflowError +OverflowError +OverflowError +True +True +True +True +True +True +OverflowError +OverflowError From 965a87b53cd9da32a546b03cdd01042058080498 Mon Sep 17 00:00:00 2001 From: Damien George Date: Fri, 14 Oct 2022 16:10:38 +1100 Subject: [PATCH 002/823] tests/extmod: Add test for sleep_ms value that overflows ticks. Addresses #9516. Signed-off-by: Damien George --- tests/extmod/uasyncio_micropython.py | 6 ++++++ tests/extmod/uasyncio_micropython.py.exp | 1 + 2 files changed, 7 insertions(+) diff --git a/tests/extmod/uasyncio_micropython.py b/tests/extmod/uasyncio_micropython.py index 69e5fa3224df..a6b65bb2a84c 100644 --- a/tests/extmod/uasyncio_micropython.py +++ b/tests/extmod/uasyncio_micropython.py @@ -22,6 +22,12 @@ async def main(): await uasyncio.sleep_ms(1) print(utime.ticks_diff(utime.ticks_ms(), t0) < 100) + try: + # Sleep 1ms beyond maximum allowed sleep value + await uasyncio.sleep_ms(utime.ticks_add(0, -1) // 2 + 1) + except OverflowError: + print("OverflowError") + # When task finished before the timeout print(await uasyncio.wait_for_ms(task(1, 5), 50)) diff --git a/tests/extmod/uasyncio_micropython.py.exp b/tests/extmod/uasyncio_micropython.py.exp index f5be1dc75a25..4d1c6d681f2f 100644 --- a/tests/extmod/uasyncio_micropython.py.exp +++ b/tests/extmod/uasyncio_micropython.py.exp @@ -1,4 +1,5 @@ True +OverflowError task start 1 task end 1 2 From af4ba6d1b4558e0ce1c81b8acd975f0bcbe83072 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 19:48:07 +0200 Subject: [PATCH 003/823] stm32: Rename machine I2C and SPI types consistently across ports. This renames: - machine_hard_i2c_type -> machine_i2c_type - machine_hard_spi_type -> machine_spi_type --- ports/stm32/machine_i2c.c | 18 +++++++++--------- ports/stm32/machine_spi.c | 14 +++++++------- ports/stm32/modmachine.c | 4 ++-- ports/stm32/modmachine.h | 4 +++- ports/stm32/spi.c | 4 ++-- ports/stm32/spi.h | 2 +- 6 files changed, 24 insertions(+), 22 deletions(-) diff --git a/ports/stm32/machine_i2c.c b/ports/stm32/machine_i2c.c index 9a2d338f5498..7718d1bfe038 100644 --- a/ports/stm32/machine_i2c.c +++ b/ports/stm32/machine_i2c.c @@ -49,16 +49,16 @@ typedef struct _machine_hard_i2c_obj_t { STATIC const machine_hard_i2c_obj_t machine_hard_i2c_obj[MICROPY_HW_MAX_I2C] = { #if defined(MICROPY_HW_I2C1_SCL) - [0] = {{&machine_hard_i2c_type}, I2C1, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA}, + [0] = {{&machine_i2c_type}, I2C1, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA}, #endif #if defined(MICROPY_HW_I2C2_SCL) - [1] = {{&machine_hard_i2c_type}, I2C2, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA}, + [1] = {{&machine_i2c_type}, I2C2, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA}, #endif #if defined(MICROPY_HW_I2C3_SCL) - [2] = {{&machine_hard_i2c_type}, I2C3, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA}, + [2] = {{&machine_i2c_type}, I2C3, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA}, #endif #if defined(MICROPY_HW_I2C4_SCL) - [3] = {{&machine_hard_i2c_type}, I2C4, MICROPY_HW_I2C4_SCL, MICROPY_HW_I2C4_SDA}, + [3] = {{&machine_i2c_type}, I2C4, MICROPY_HW_I2C4_SCL, MICROPY_HW_I2C4_SDA}, #endif }; @@ -140,16 +140,16 @@ typedef mp_machine_soft_i2c_obj_t machine_hard_i2c_obj_t; STATIC machine_hard_i2c_obj_t machine_hard_i2c_obj[MICROPY_HW_MAX_I2C] = { #if defined(MICROPY_HW_I2C1_SCL) - [0] = {{&machine_hard_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA}, + [0] = {{&machine_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA}, #endif #if defined(MICROPY_HW_I2C2_SCL) - [1] = {{&machine_hard_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA}, + [1] = {{&machine_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C2_SCL, MICROPY_HW_I2C2_SDA}, #endif #if defined(MICROPY_HW_I2C3_SCL) - [2] = {{&machine_hard_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA}, + [2] = {{&machine_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C3_SCL, MICROPY_HW_I2C3_SDA}, #endif #if defined(MICROPY_HW_I2C4_SCL) - [3] = {{&machine_hard_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C4_SCL, MICROPY_HW_I2C4_SDA}, + [3] = {{&machine_i2c_type}, 1, I2C_POLL_DEFAULT_TIMEOUT_US, MICROPY_HW_I2C4_SCL, MICROPY_HW_I2C4_SDA}, #endif }; @@ -237,7 +237,7 @@ STATIC const mp_machine_i2c_p_t machine_hard_i2c_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_i2c_type, + machine_i2c_type, MP_QSTR_I2C, MP_TYPE_FLAG_NONE, make_new, machine_hard_i2c_make_new, diff --git a/ports/stm32/machine_spi.c b/ports/stm32/machine_spi.c index 718ae1af5e5a..7ccff75f1ccf 100644 --- a/ports/stm32/machine_spi.c +++ b/ports/stm32/machine_spi.c @@ -32,12 +32,12 @@ // Implementation of hard SPI for machine module STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = { - {{&machine_hard_spi_type}, &spi_obj[0]}, - {{&machine_hard_spi_type}, &spi_obj[1]}, - {{&machine_hard_spi_type}, &spi_obj[2]}, - {{&machine_hard_spi_type}, &spi_obj[3]}, - {{&machine_hard_spi_type}, &spi_obj[4]}, - {{&machine_hard_spi_type}, &spi_obj[5]}, + {{&machine_spi_type}, &spi_obj[0]}, + {{&machine_spi_type}, &spi_obj[1]}, + {{&machine_spi_type}, &spi_obj[2]}, + {{&machine_spi_type}, &spi_obj[3]}, + {{&machine_spi_type}, &spi_obj[4]}, + {{&machine_spi_type}, &spi_obj[5]}, }; STATIC void machine_hard_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { @@ -136,7 +136,7 @@ STATIC const mp_machine_spi_p_t machine_hard_spi_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_spi_type, + machine_spi_type, MP_QSTR_SPI, MP_TYPE_FLAG_NONE, make_new, machine_hard_spi_make_new, diff --git a/ports/stm32/modmachine.c b/ports/stm32/modmachine.c index e1796d1cf025..06fdd0e2c1bd 100644 --- a/ports/stm32/modmachine.c +++ b/ports/stm32/modmachine.c @@ -424,14 +424,14 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) }, #if MICROPY_PY_MACHINE_I2C #if MICROPY_HW_ENABLE_HW_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hard_i2c_type) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, #else { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, #endif { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, #endif #if MICROPY_PY_MACHINE_SPI - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) }, { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) }, #endif #if MICROPY_HW_ENABLE_I2S diff --git a/ports/stm32/modmachine.h b/ports/stm32/modmachine.h index 9fa7851582e1..0c776280b416 100644 --- a/ports/stm32/modmachine.h +++ b/ports/stm32/modmachine.h @@ -30,8 +30,10 @@ extern const mp_obj_type_t machine_adc_type; extern const mp_obj_type_t machine_timer_type; -extern const mp_obj_type_t machine_hard_i2c_type; +extern const mp_obj_type_t machine_i2c_type; extern const mp_obj_type_t machine_i2s_type; +extern const mp_obj_type_t machine_spi_type; +extern const mp_obj_type_t machine_timer_type; void machine_init(void); void machine_deinit(void); diff --git a/ports/stm32/spi.c b/ports/stm32/spi.c index 9c031cad2e28..e21ebcd02b9d 100644 --- a/ports/stm32/spi.c +++ b/ports/stm32/spi.c @@ -678,7 +678,7 @@ const spi_t *spi_from_mp_obj(mp_obj_t o) { if (mp_obj_is_type(o, &pyb_spi_type)) { pyb_spi_obj_t *self = MP_OBJ_TO_PTR(o); return self->spi; - } else if (mp_obj_is_type(o, &machine_hard_spi_type)) { + } else if (mp_obj_is_type(o, &machine_spi_type)) { machine_hard_spi_obj_t *self = MP_OBJ_TO_PTR(o); return self->spi; } else { @@ -687,7 +687,7 @@ const spi_t *spi_from_mp_obj(mp_obj_t o) { } mp_obj_base_t *mp_hal_get_spi_obj(mp_obj_t o) { - if (mp_obj_is_type(o, &machine_hard_spi_type)) { + if (mp_obj_is_type(o, &machine_spi_type)) { return MP_OBJ_TO_PTR(o); } #if MICROPY_PY_MACHINE_SOFTSPI diff --git a/ports/stm32/spi.h b/ports/stm32/spi.h index 17f1bf6c4ab9..ef3d718cddfd 100644 --- a/ports/stm32/spi.h +++ b/ports/stm32/spi.h @@ -65,7 +65,7 @@ extern const spi_t spi_obj[6]; extern const mp_spi_proto_t spi_proto; extern const mp_obj_type_t pyb_spi_type; -extern const mp_obj_type_t machine_hard_spi_type; +extern const mp_obj_type_t machine_spi_type; // A transfer of "len" bytes should take len*8*1000/baudrate milliseconds. // To simplify the calculation we assume the baudrate is never less than 8kHz From 427670c21047585fb9295ddf35cdbdaa8265fbe1 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 20:20:03 +0200 Subject: [PATCH 004/823] esp32: Rename machine I2C and SPI types consistently across ports. This renames: - machine_hw_i2c_type -> machine_i2c_type - machine_hw_spi_type -> machine_spi_type --- ports/esp32/machine_hw_spi.c | 4 ++-- ports/esp32/machine_i2c.c | 4 ++-- ports/esp32/modmachine.c | 4 ++-- ports/esp32/modmachine.h | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/ports/esp32/machine_hw_spi.c b/ports/esp32/machine_hw_spi.c index 647874e17f64..35ecc397b339 100644 --- a/ports/esp32/machine_hw_spi.c +++ b/ports/esp32/machine_hw_spi.c @@ -490,7 +490,7 @@ mp_obj_t machine_hw_spi_make_new(const mp_obj_type_t *type, size_t n_args, size_ self = &machine_hw_spi_obj[1]; default_pins = &machine_hw_spi_default_pins[1]; } - self->base.type = &machine_hw_spi_type; + self->base.type = &machine_spi_type; int8_t sck, mosi, miso; @@ -540,7 +540,7 @@ STATIC const mp_machine_spi_p_t machine_hw_spi_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hw_spi_type, + machine_spi_type, MP_QSTR_SPI, MP_TYPE_FLAG_NONE, make_new, machine_hw_spi_make_new, diff --git a/ports/esp32/machine_i2c.c b/ports/esp32/machine_i2c.c index 9244343dcf61..17e98ffc5bb4 100644 --- a/ports/esp32/machine_i2c.c +++ b/ports/esp32/machine_i2c.c @@ -161,7 +161,7 @@ mp_obj_t machine_hw_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_ bool first_init = false; if (self->base.type == NULL) { // Created for the first time, set default pins - self->base.type = &machine_hw_i2c_type; + self->base.type = &machine_i2c_type; self->port = i2c_id; if (self->port == I2C_NUM_0) { self->scl = MICROPY_HW_I2C0_SCL; @@ -193,7 +193,7 @@ STATIC const mp_machine_i2c_p_t machine_hw_i2c_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hw_i2c_type, + machine_i2c_type, MP_QSTR_I2C, MP_TYPE_FLAG_NONE, make_new, machine_hw_i2c_make_new, diff --git a/ports/esp32/modmachine.c b/ports/esp32/modmachine.c index a70f2fbedb59..e24afd040350 100644 --- a/ports/esp32/modmachine.c +++ b/ports/esp32/modmachine.c @@ -315,14 +315,14 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { #if MICROPY_PY_MACHINE_DAC { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) }, #endif - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hw_i2c_type) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, #if MICROPY_PY_MACHINE_I2S { MP_ROM_QSTR(MP_QSTR_I2S), MP_ROM_PTR(&machine_i2s_type) }, #endif { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) }, { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) }, - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hw_spi_type) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) }, { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) }, diff --git a/ports/esp32/modmachine.h b/ports/esp32/modmachine.h index 4d2ab9020d16..138a89e9c33d 100644 --- a/ports/esp32/modmachine.h +++ b/ports/esp32/modmachine.h @@ -16,8 +16,8 @@ extern const mp_obj_type_t machine_touchpad_type; extern const mp_obj_type_t machine_adc_type; extern const mp_obj_type_t machine_adcblock_type; extern const mp_obj_type_t machine_dac_type; -extern const mp_obj_type_t machine_hw_i2c_type; -extern const mp_obj_type_t machine_hw_spi_type; +extern const mp_obj_type_t machine_i2c_type; +extern const mp_obj_type_t machine_spi_type; extern const mp_obj_type_t machine_i2s_type; extern const mp_obj_type_t machine_uart_type; extern const mp_obj_type_t machine_rtc_type; From 22ad45fda649b754916883f246139e35ff20e126 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 20:21:51 +0200 Subject: [PATCH 005/823] rp2: Rename machine I2C type consistently across ports. This renames: - machine_hw_i2c_type -> machine_i2c_type --- ports/rp2/machine_i2c.c | 6 +++--- ports/rp2/modmachine.c | 2 +- ports/rp2/modmachine.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/ports/rp2/machine_i2c.c b/ports/rp2/machine_i2c.c index 00dc36a4e0cb..85d12c771368 100644 --- a/ports/rp2/machine_i2c.c +++ b/ports/rp2/machine_i2c.c @@ -68,8 +68,8 @@ typedef struct _machine_i2c_obj_t { } machine_i2c_obj_t; STATIC machine_i2c_obj_t machine_i2c_obj[] = { - {{&machine_hw_i2c_type}, i2c0, 0, MICROPY_HW_I2C0_SCL, MICROPY_HW_I2C0_SDA, 0}, - {{&machine_hw_i2c_type}, i2c1, 1, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA, 0}, + {{&machine_i2c_type}, i2c0, 0, MICROPY_HW_I2C0_SCL, MICROPY_HW_I2C0_SDA, 0}, + {{&machine_i2c_type}, i2c1, 1, MICROPY_HW_I2C1_SCL, MICROPY_HW_I2C1_SDA, 0}, }; STATIC void machine_i2c_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { @@ -177,7 +177,7 @@ STATIC const mp_machine_i2c_p_t machine_i2c_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hw_i2c_type, + machine_i2c_type, MP_QSTR_I2C, MP_TYPE_FLAG_NONE, make_new, machine_i2c_make_new, diff --git a/ports/rp2/modmachine.c b/ports/rp2/modmachine.c index 3c8922c41721..8058189a92b6 100644 --- a/ports/rp2/modmachine.c +++ b/ports/rp2/modmachine.c @@ -239,7 +239,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hw_i2c_type) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, { MP_ROM_QSTR(MP_QSTR_I2S), MP_ROM_PTR(&machine_i2s_type) }, { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, diff --git a/ports/rp2/modmachine.h b/ports/rp2/modmachine.h index 503c1ca86c8a..6ea4def91d97 100644 --- a/ports/rp2/modmachine.h +++ b/ports/rp2/modmachine.h @@ -4,7 +4,7 @@ #include "py/obj.h" extern const mp_obj_type_t machine_adc_type; -extern const mp_obj_type_t machine_hw_i2c_type; +extern const mp_obj_type_t machine_i2c_type; extern const mp_obj_type_t machine_i2s_type; extern const mp_obj_type_t machine_pin_type; extern const mp_obj_type_t machine_rtc_type; From e275a58ac12c72d8d8e99f8c558f6e4a1f6637c1 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 20:22:57 +0200 Subject: [PATCH 006/823] samd: Rename machine I2C type consistently across ports. This renames: - machine_hw_i2c_type -> machine_i2c_type --- ports/samd/machine_i2c.c | 4 ++-- ports/samd/modmachine.c | 2 +- ports/samd/modmachine.h | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/ports/samd/machine_i2c.c b/ports/samd/machine_i2c.c index 25dfa99340ff..0a8f5b94db08 100644 --- a/ports/samd/machine_i2c.c +++ b/ports/samd/machine_i2c.c @@ -144,7 +144,7 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n } // Get the peripheral object. - machine_i2c_obj_t *self = mp_obj_malloc(machine_i2c_obj_t, &machine_hw_i2c_type); + machine_i2c_obj_t *self = mp_obj_malloc(machine_i2c_obj_t, &machine_i2c_type); self->id = id; self->instance = sercom_instance[self->id]; @@ -260,7 +260,7 @@ STATIC const mp_machine_i2c_p_t machine_i2c_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hw_i2c_type, + machine_i2c_type, MP_QSTR_I2C, MP_TYPE_FLAG_NONE, make_new, machine_i2c_make_new, diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index f6cf7f8155c9..b9de026ed425 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -157,7 +157,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) }, { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hw_i2c_type) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) }, { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) }, { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h index 6a745da0675a..e99ca990fbba 100644 --- a/ports/samd/modmachine.h +++ b/ports/samd/modmachine.h @@ -30,7 +30,7 @@ extern const mp_obj_type_t machine_adc_type; extern const mp_obj_type_t machine_dac_type; -extern const mp_obj_type_t machine_hw_i2c_type; +extern const mp_obj_type_t machine_i2c_type; extern const mp_obj_type_t machine_led_type; extern const mp_obj_type_t machine_pin_type; extern const mp_obj_type_t machine_pwm_type; From bfa6f34404374bb7c7d892ca6cb32175e8dd19f6 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 20:25:34 +0200 Subject: [PATCH 007/823] renesas-ra: Rename machine SPI type consistently across ports. This renames: - machine_hard_spi_type -> machine_spi_type --- ports/renesas-ra/machine_spi.c | 6 +++--- ports/renesas-ra/modmachine.c | 2 +- ports/renesas-ra/modmachine.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/ports/renesas-ra/machine_spi.c b/ports/renesas-ra/machine_spi.c index b9f5b1ad1b4e..2c71c83b666c 100644 --- a/ports/renesas-ra/machine_spi.c +++ b/ports/renesas-ra/machine_spi.c @@ -70,7 +70,7 @@ typedef struct _machine_hard_spi_obj_t { STATIC machine_hard_spi_obj_t machine_hard_spi_obj[] = { #if defined(MICROPY_HW_SPI0_RSPCK) { - {&machine_hard_spi_type}, 0, + {&machine_spi_type}, 0, DEFAULT_SPI_POLARITY, DEFAULT_SPI_PHASE, DEFAULT_SPI_BITS, DEFAULT_SPI_FIRSTBIT, DEFAULT_SPI_BAUDRATE, MICROPY_HW_SPI0_RSPCK, MICROPY_HW_SPI0_MOSI, MICROPY_HW_SPI0_MISO, @@ -78,7 +78,7 @@ STATIC machine_hard_spi_obj_t machine_hard_spi_obj[] = { #endif #if defined(MICROPY_HW_SPI1_RSPCK) { - {&machine_hard_spi_type}, 1, + {&machine_spi_type}, 1, DEFAULT_SPI_POLARITY, DEFAULT_SPI_PHASE, DEFAULT_SPI_BITS, DEFAULT_SPI_FIRSTBIT, DEFAULT_SPI_BAUDRATE, MICROPY_HW_SPI1_RSPCK, MICROPY_HW_SPI1_MOSI, MICROPY_HW_SPI1_MISO, @@ -298,7 +298,7 @@ STATIC const mp_machine_spi_p_t machine_hard_spi_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_spi_type, + machine_spi_type, MP_QSTR_SPI, MP_TYPE_FLAG_NONE, make_new, machine_hard_spi_make_new, diff --git a/ports/renesas-ra/modmachine.c b/ports/renesas-ra/modmachine.c index e6f78747fdba..7db36298db4a 100644 --- a/ports/renesas-ra/modmachine.c +++ b/ports/renesas-ra/modmachine.c @@ -286,7 +286,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, #endif #if MICROPY_PY_MACHINE_SPI - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) }, { MP_ROM_QSTR(MP_QSTR_SoftSPI), MP_ROM_PTR(&mp_machine_soft_spi_type) }, #endif { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) }, diff --git a/ports/renesas-ra/modmachine.h b/ports/renesas-ra/modmachine.h index de421c5db81f..5dbda6bda8ae 100644 --- a/ports/renesas-ra/modmachine.h +++ b/ports/renesas-ra/modmachine.h @@ -37,7 +37,7 @@ extern const mp_obj_type_t machine_adc_type; extern const mp_obj_type_t machine_adcblock_type; extern const mp_obj_type_t machine_dac_type; extern const mp_obj_type_t machine_i2c_type; -extern const mp_obj_type_t machine_hard_spi_type; +extern const mp_obj_type_t machine_spi_type; extern const mp_obj_type_t machine_i2s_type; extern const mp_obj_type_t machine_uart_type; extern const mp_obj_type_t machine_rtc_type; From 5e90ec233139e90b5dc022932b15b3bc9fd7865c Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 20:28:31 +0200 Subject: [PATCH 008/823] zephyr: Rename machine I2C and SPI types consistently across ports. This renames: - machine_hard_i2c_type -> machine_i2c_type - machine_hard_spi_type -> machine_spi_type --- ports/zephyr/machine_i2c.c | 4 ++-- ports/zephyr/machine_spi.c | 4 ++-- ports/zephyr/modmachine.c | 4 ++-- ports/zephyr/modmachine.h | 4 ++-- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/ports/zephyr/machine_i2c.c b/ports/zephyr/machine_i2c.c index 8f0f25257ba5..c261ffad0d25 100644 --- a/ports/zephyr/machine_i2c.c +++ b/ports/zephyr/machine_i2c.c @@ -84,7 +84,7 @@ mp_obj_t machine_hard_i2c_make_new(const mp_obj_type_t *type, size_t n_args, siz mp_raise_NotImplementedError(MP_ERROR_TEXT("explicit choice of timeout is not implemented")); } - machine_hard_i2c_obj_t *self = mp_obj_malloc(machine_hard_i2c_obj_t, &machine_hard_i2c_type); + machine_hard_i2c_obj_t *self = mp_obj_malloc(machine_hard_i2c_obj_t, &machine_i2c_type); self->dev = dev; self->restart = false; @@ -127,7 +127,7 @@ STATIC const mp_machine_i2c_p_t machine_hard_i2c_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_i2c_type, + machine_i2c_type, MP_QSTR_I2C, MP_TYPE_FLAG_NONE, make_new, machine_hard_i2c_make_new, diff --git a/ports/zephyr/machine_spi.c b/ports/zephyr/machine_spi.c index 19d4ae6dee68..507d839c6644 100644 --- a/ports/zephyr/machine_spi.c +++ b/ports/zephyr/machine_spi.c @@ -106,7 +106,7 @@ mp_obj_t machine_hard_spi_make_new(const mp_obj_type_t *type, size_t n_args, siz .cs = NULL }; - machine_hard_spi_obj_t *self = mp_obj_malloc(machine_hard_spi_obj_t, &machine_hard_spi_type); + machine_hard_spi_obj_t *self = mp_obj_malloc(machine_hard_spi_obj_t, &machine_spi_type); self->dev = dev; self->config = cfg; @@ -198,7 +198,7 @@ STATIC const mp_machine_spi_p_t machine_hard_spi_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_spi_type, + machine_spi_type, MP_QSTR_SPI, MP_TYPE_FLAG_NONE, make_new, machine_hard_spi_make_new, diff --git a/ports/zephyr/modmachine.c b/ports/zephyr/modmachine.c index 63bd3369897d..95a66c51199b 100644 --- a/ports/zephyr/modmachine.c +++ b/ports/zephyr/modmachine.c @@ -69,10 +69,10 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, #if MICROPY_PY_MACHINE_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hard_i2c_type) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, #endif #if MICROPY_PY_MACHINE_SPI - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) }, #endif { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) }, { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, diff --git a/ports/zephyr/modmachine.h b/ports/zephyr/modmachine.h index a3cdd2b30fe6..a605ada0de76 100644 --- a/ports/zephyr/modmachine.h +++ b/ports/zephyr/modmachine.h @@ -4,8 +4,8 @@ #include "py/obj.h" extern const mp_obj_type_t machine_pin_type; -extern const mp_obj_type_t machine_hard_i2c_type; -extern const mp_obj_type_t machine_hard_spi_type; +extern const mp_obj_type_t machine_i2c_type; +extern const mp_obj_type_t machine_spi_type; extern const mp_obj_type_t machine_uart_type; MP_DECLARE_CONST_FUN_OBJ_0(machine_info_obj); From 93f3910fe7e43de5661ff0d6f961c6eccb8537e5 Mon Sep 17 00:00:00 2001 From: iabdalkader Date: Thu, 6 Oct 2022 20:27:09 +0200 Subject: [PATCH 009/823] nrf: Rename machine I2C, PWM, SPI, UART types consistently across ports. This renames: - machine_hard_i2c_type -> machine_i2c_type - machine_hard_pwm_type -> machine_pwm_type - machine_hard_spi_type -> machine_spi_type - machine_hard_uart_type -> machine_uart_type --- ports/nrf/main.c | 2 +- ports/nrf/modules/machine/i2c.c | 6 +++--- ports/nrf/modules/machine/i2c.h | 2 +- ports/nrf/modules/machine/modmachine.c | 8 ++++---- ports/nrf/modules/machine/pwm.c | 16 ++++++++-------- ports/nrf/modules/machine/pwm.h | 2 +- ports/nrf/modules/machine/spi.c | 14 +++++++------- ports/nrf/modules/machine/spi.h | 2 +- ports/nrf/modules/machine/uart.c | 4 ++-- ports/nrf/modules/machine/uart.h | 2 +- ports/nrf/modules/uos/moduos.c | 2 +- 11 files changed, 30 insertions(+), 30 deletions(-) diff --git a/ports/nrf/main.c b/ports/nrf/main.c index bcfaafd39c7e..989db58b3fa8 100644 --- a/ports/nrf/main.c +++ b/ports/nrf/main.c @@ -170,7 +170,7 @@ int main(int argc, char **argv) { MP_OBJ_NEW_SMALL_INT(0), MP_OBJ_NEW_SMALL_INT(115200), }; - MP_STATE_PORT(board_stdio_uart) = MP_OBJ_TYPE_GET_SLOT(&machine_hard_uart_type, make_new)((mp_obj_t)&machine_hard_uart_type, MP_ARRAY_SIZE(args), 0, args); + MP_STATE_PORT(board_stdio_uart) = MP_OBJ_TYPE_GET_SLOT(&machine_uart_type, make_new)((mp_obj_t)&machine_uart_type, MP_ARRAY_SIZE(args), 0, args); } #endif diff --git a/ports/nrf/modules/machine/i2c.c b/ports/nrf/modules/machine/i2c.c index c16c3669ec57..ac331b8d7af6 100644 --- a/ports/nrf/modules/machine/i2c.c +++ b/ports/nrf/modules/machine/i2c.c @@ -69,8 +69,8 @@ typedef struct _machine_hard_i2c_obj_t { } machine_hard_i2c_obj_t; STATIC const machine_hard_i2c_obj_t machine_hard_i2c_obj[] = { - {{&machine_hard_i2c_type}, .p_twi = NRFX_TWI_INSTANCE(0)}, - {{&machine_hard_i2c_type}, .p_twi = NRFX_TWI_INSTANCE(1)}, + {{&machine_i2c_type}, .p_twi = NRFX_TWI_INSTANCE(0)}, + {{&machine_i2c_type}, .p_twi = NRFX_TWI_INSTANCE(1)}, }; void i2c_init0(void) { @@ -162,7 +162,7 @@ STATIC const mp_machine_i2c_p_t machine_hard_i2c_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_i2c_type, + machine_i2c_type, MP_QSTR_I2C, MP_TYPE_FLAG_NONE, make_new, machine_hard_i2c_make_new, diff --git a/ports/nrf/modules/machine/i2c.h b/ports/nrf/modules/machine/i2c.h index 1dfb1f077a44..5c5befc28535 100644 --- a/ports/nrf/modules/machine/i2c.h +++ b/ports/nrf/modules/machine/i2c.h @@ -29,7 +29,7 @@ #include "extmod/machine_i2c.h" -extern const mp_obj_type_t machine_hard_i2c_type; +extern const mp_obj_type_t machine_i2c_type; void i2c_init0(void); diff --git a/ports/nrf/modules/machine/modmachine.c b/ports/nrf/modules/machine/modmachine.c index d322e450671f..d315582ae6fd 100644 --- a/ports/nrf/modules/machine/modmachine.c +++ b/ports/nrf/modules/machine/modmachine.c @@ -217,13 +217,13 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_mem32), MP_ROM_PTR(&machine_mem32_obj) }, #if MICROPY_PY_MACHINE_UART - { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_hard_uart_type) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) }, #endif #if MICROPY_PY_MACHINE_HW_SPI - { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_hard_spi_type) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&machine_spi_type) }, #endif #if MICROPY_PY_MACHINE_I2C - { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_hard_i2c_type) }, + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, #endif #if MICROPY_PY_MACHINE_ADC @@ -236,7 +236,7 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, #endif #if MICROPY_PY_MACHINE_HW_PWM - { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_hard_pwm_type) }, + { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) }, #endif #if MICROPY_PY_MACHINE_TEMP { MP_ROM_QSTR(MP_QSTR_Temp), MP_ROM_PTR(&machine_temp_type) }, diff --git a/ports/nrf/modules/machine/pwm.c b/ports/nrf/modules/machine/pwm.c index 862e1907cbf3..7c84a8c885f9 100644 --- a/ports/nrf/modules/machine/pwm.c +++ b/ports/nrf/modules/machine/pwm.c @@ -77,11 +77,11 @@ STATIC machine_pwm_config_t hard_configs[MP_ARRAY_SIZE(machine_hard_pwm_instance STATIC const machine_hard_pwm_obj_t machine_hard_pwm_obj[] = { #if defined(NRF52_SERIES) - {{&machine_hard_pwm_type}, .p_pwm = &machine_hard_pwm_instances[0], .p_config = &hard_configs[0]}, - {{&machine_hard_pwm_type}, .p_pwm = &machine_hard_pwm_instances[1], .p_config = &hard_configs[1]}, - {{&machine_hard_pwm_type}, .p_pwm = &machine_hard_pwm_instances[2], .p_config = &hard_configs[2]}, + {{&machine_pwm_type}, .p_pwm = &machine_hard_pwm_instances[0], .p_config = &hard_configs[0]}, + {{&machine_pwm_type}, .p_pwm = &machine_hard_pwm_instances[1], .p_config = &hard_configs[1]}, + {{&machine_pwm_type}, .p_pwm = &machine_hard_pwm_instances[2], .p_config = &hard_configs[2]}, #if NRF52840 - {{&machine_hard_pwm_type}, .p_pwm = &machine_hard_pwm_instances[3], .p_config = &hard_configs[3]}, + {{&machine_pwm_type}, .p_pwm = &machine_hard_pwm_instances[3], .p_config = &hard_configs[3]}, #endif #endif }; @@ -155,7 +155,7 @@ STATIC mp_obj_t machine_pwm_init(size_t n_args, const mp_obj_t *pos_args, mp_map mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_pwm_type) { + if (mp_obj_get_type(self) == &machine_pwm_type) { machine_hard_pwm_init(self, args); } @@ -165,7 +165,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_pwm_init_obj, 1, machine_pwm_init); STATIC mp_obj_t machine_pwm_deinit(mp_obj_t self) { // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_pwm_type) { + if (mp_obj_get_type(self) == &machine_pwm_type) { machine_hard_pwm_deinit(self); } return mp_const_none; @@ -182,7 +182,7 @@ STATIC mp_obj_t machine_pwm_freq(size_t n_args, const mp_obj_t *pos_args, mp_map mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); - if (mp_obj_get_type(self) == &machine_hard_pwm_type) { + if (mp_obj_get_type(self) == &machine_pwm_type) { machine_hard_pwm_freq(self, args); } else { // soft pwm @@ -340,7 +340,7 @@ STATIC mp_obj_t machine_hard_pwm_freq(mp_obj_t self_in, mp_arg_val_t *args) { } MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_pwm_type, + machine_pwm_type, MP_QSTR_PWM, MP_TYPE_FLAG_NONE, make_new, machine_pwm_make_new, diff --git a/ports/nrf/modules/machine/pwm.h b/ports/nrf/modules/machine/pwm.h index 7a5b72e0e84f..ab2d927fa4e5 100644 --- a/ports/nrf/modules/machine/pwm.h +++ b/ports/nrf/modules/machine/pwm.h @@ -26,4 +26,4 @@ void pwm_init0(void); -extern const mp_obj_type_t machine_hard_pwm_type; +extern const mp_obj_type_t machine_pwm_type; diff --git a/ports/nrf/modules/machine/spi.c b/ports/nrf/modules/machine/spi.c index fd7f7bb5bcce..0dee20027b2d 100644 --- a/ports/nrf/modules/machine/spi.c +++ b/ports/nrf/modules/machine/spi.c @@ -117,12 +117,12 @@ STATIC const nrfx_spi_t machine_spi_instances[] = { STATIC nrfx_spi_config_t configs[MP_ARRAY_SIZE(machine_spi_instances)]; STATIC const machine_hard_spi_obj_t machine_hard_spi_obj[] = { - {{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[0], .p_config = &configs[0]}, - {{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[1], .p_config = &configs[1]}, + {{&machine_spi_type}, .p_spi = &machine_spi_instances[0], .p_config = &configs[0]}, + {{&machine_spi_type}, .p_spi = &machine_spi_instances[1], .p_config = &configs[1]}, #if defined(NRF52_SERIES) - {{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[2], .p_config = &configs[2]}, + {{&machine_spi_type}, .p_spi = &machine_spi_instances[2], .p_config = &configs[2]}, #if defined(NRF52840_XXAA) && NRFX_SPIM_ENABLED - {{&machine_hard_spi_type}, .p_spi = &machine_spi_instances[3], .p_config = &configs[3]}, + {{&machine_spi_type}, .p_spi = &machine_spi_instances[3], .p_config = &configs[3]}, #endif // NRF52840_XXAA && NRFX_SPIM_ENABLED #endif // NRF52_SERIES }; @@ -235,7 +235,7 @@ STATIC mp_obj_t machine_spi_init(size_t n_args, const mp_obj_t *pos_args, mp_map mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_spi_type) { + if (mp_obj_get_type(self) == &machine_spi_type) { machine_hard_spi_init(self, args); } @@ -245,7 +245,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_KW(machine_spi_init_obj, 1, machine_spi_init); STATIC mp_obj_t machine_spi_deinit(mp_obj_t self) { // dispatch to specific implementation - if (mp_obj_get_type(self) == &machine_hard_spi_type) { + if (mp_obj_get_type(self) == &machine_spi_type) { machine_hard_spi_deinit(self); } return mp_const_none; @@ -428,7 +428,7 @@ STATIC const mp_machine_spi_p_t machine_hard_spi_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_spi_type, + machine_spi_type, MP_QSTR_SPI, MP_TYPE_FLAG_NONE, make_new, machine_spi_make_new, diff --git a/ports/nrf/modules/machine/spi.h b/ports/nrf/modules/machine/spi.h index c6f64a19da2a..e1505781ac38 100644 --- a/ports/nrf/modules/machine/spi.h +++ b/ports/nrf/modules/machine/spi.h @@ -27,7 +27,7 @@ #include "py/obj.h" typedef struct _machine_hard_spi_obj_t machine_hard_spi_obj_t; -extern const mp_obj_type_t machine_hard_spi_type; +extern const mp_obj_type_t machine_spi_type; void spi_init0(void); void spi_transfer(const machine_hard_spi_obj_t * self, diff --git a/ports/nrf/modules/machine/uart.c b/ports/nrf/modules/machine/uart.c index 035a30df9c01..eee5b8b79eac 100644 --- a/ports/nrf/modules/machine/uart.c +++ b/ports/nrf/modules/machine/uart.c @@ -106,7 +106,7 @@ static const nrfx_uart_t instance0 = NRFX_UART_INSTANCE(0); STATIC machine_hard_uart_buf_t machine_hard_uart_buf[1]; STATIC const machine_hard_uart_obj_t machine_hard_uart_obj[] = { - {{&machine_hard_uart_type}, .p_uart = &instance0, .buf = &machine_hard_uart_buf[0]}, + {{&machine_uart_type}, .p_uart = &instance0, .buf = &machine_hard_uart_buf[0]}, }; void uart_init0(void) { @@ -371,7 +371,7 @@ STATIC const mp_stream_p_t uart_stream_p = { }; MP_DEFINE_CONST_OBJ_TYPE( - machine_hard_uart_type, + machine_uart_type, MP_QSTR_UART, MP_TYPE_FLAG_ITER_IS_STREAM, make_new, machine_hard_uart_make_new, diff --git a/ports/nrf/modules/machine/uart.h b/ports/nrf/modules/machine/uart.h index 121f83cd39b3..d3e23645b902 100644 --- a/ports/nrf/modules/machine/uart.h +++ b/ports/nrf/modules/machine/uart.h @@ -32,7 +32,7 @@ #include "genhdr/pins.h" typedef struct _machine_hard_uart_obj_t machine_hard_uart_obj_t; -extern const mp_obj_type_t machine_hard_uart_type; +extern const mp_obj_type_t machine_uart_type; void uart_init0(void); void uart_deinit(void); diff --git a/ports/nrf/modules/uos/moduos.c b/ports/nrf/modules/uos/moduos.c index 3fdd8eb19ec1..402096aacd78 100644 --- a/ports/nrf/modules/uos/moduos.c +++ b/ports/nrf/modules/uos/moduos.c @@ -126,7 +126,7 @@ STATIC mp_obj_t os_dupterm(mp_uint_t n_args, const mp_obj_t *args) { } else { if (args[0] == mp_const_none) { MP_STATE_PORT(board_stdio_uart) = NULL; - } else if (mp_obj_get_type(args[0]) == &machine_hard_uart_type) { + } else if (mp_obj_get_type(args[0]) == &machine_uart_type) { MP_STATE_PORT(board_stdio_uart) = args[0]; } else { mp_raise_ValueError(MP_ERROR_TEXT("need a UART object")); From 4f946ba963b452cb79524225e0a88134921f2ebb Mon Sep 17 00:00:00 2001 From: Damien George Date: Thu, 8 Sep 2022 12:51:10 +1000 Subject: [PATCH 010/823] lib/btstack: Update to v1.5.3. Signed-off-by: Damien George --- lib/btstack | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/btstack b/lib/btstack index c8b9823f68c6..87087689bb0c 160000 --- a/lib/btstack +++ b/lib/btstack @@ -1 +1 @@ -Subproject commit c8b9823f68c6af0fa52e2c4e009aba4dbf257232 +Subproject commit 87087689bb0c37ff4b9b3e3ba670b7019c306ebd From 67f98ba10c3d894e737f275f0a508b7ccf4f1807 Mon Sep 17 00:00:00 2001 From: Damien George Date: Thu, 8 Sep 2022 12:51:19 +1000 Subject: [PATCH 011/823] extmod/btstack: Update BTstack bindings to work with latest BTstack. The following multi-tests pass (eg with PYBD_SF6+LEGO_HUB_NO6): ble_gap_advertise.py ble_gap_connect.py ble_gap_device_name.py ble_gattc_discover_services.py ble_gatt_data_transfer.py perf_gatt_char_write.py perf_gatt_notify.py stress_log_filesystem.py These are the same tests that passed prior to this BTstack update. Also tested on the unix port using H4 transport. Signed-off-by: Damien George --- extmod/btstack/btstack_config.h | 2 +- extmod/btstack/btstack_hci_uart.c | 6 ++++++ extmod/btstack/btstack_hci_uart.h | 2 +- extmod/btstack/modbluetooth_btstack.c | 28 ++++++++++++++++++++++----- ports/stm32/mpbtstackport.c | 11 +++-------- ports/unix/mpbtstackport_common.c | 8 +------- ports/unix/mpbtstackport_h4.c | 14 ++++++++------ ports/unix/mpbtstackport_usb.c | 1 + 8 files changed, 44 insertions(+), 28 deletions(-) diff --git a/extmod/btstack/btstack_config.h b/extmod/btstack/btstack_config.h index e56a84f94a16..7de938cb6f7e 100644 --- a/extmod/btstack/btstack_config.h +++ b/extmod/btstack/btstack_config.h @@ -6,7 +6,7 @@ #define ENABLE_LE_PERIPHERAL #define ENABLE_LE_CENTRAL // #define ENABLE_CLASSIC -#define ENABLE_LE_DATA_CHANNELS +#define ENABLE_L2CAP_LE_CREDIT_BASED_FLOW_CONTROL_MODE // #define ENABLE_LOG_INFO // #define ENABLE_LOG_DEBUG #define ENABLE_LOG_ERROR diff --git a/extmod/btstack/btstack_hci_uart.c b/extmod/btstack/btstack_hci_uart.c index 83e865b71d2d..f945efc762cb 100644 --- a/extmod/btstack/btstack_hci_uart.c +++ b/extmod/btstack/btstack_hci_uart.c @@ -159,6 +159,12 @@ const btstack_uart_block_t mp_bluetooth_btstack_hci_uart_block = { &btstack_uart_get_supported_sleep_modes, &btstack_uart_set_sleep, &btstack_uart_set_wakeup_handler, + + // The following are needed for H5 mode only. + NULL, // set_frame_received + NULL, // set_frame_sent, + NULL, // receive_frame, + NULL, // send_frame, }; void mp_bluetooth_btstack_hci_uart_process(void) { diff --git a/extmod/btstack/btstack_hci_uart.h b/extmod/btstack/btstack_hci_uart.h index 8011e587dee3..74983808ec28 100644 --- a/extmod/btstack/btstack_hci_uart.h +++ b/extmod/btstack/btstack_hci_uart.h @@ -28,7 +28,7 @@ #ifndef MICROPY_INCLUDED_EXTMOD_BTSTACK_HCI_UART_H #define MICROPY_INCLUDED_EXTMOD_BTSTACK_HCI_UART_H -#include "lib/btstack/src/btstack.h" +#include "lib/btstack/src/btstack_uart_block.h" // --- Used by the port to create the HCI transport --------------------------- extern const btstack_uart_block_t mp_bluetooth_btstack_hci_uart_block; diff --git a/extmod/btstack/modbluetooth_btstack.c b/extmod/btstack/modbluetooth_btstack.c index b58be78a9942..e9c0037394b2 100644 --- a/extmod/btstack/modbluetooth_btstack.c +++ b/extmod/btstack/modbluetooth_btstack.c @@ -368,7 +368,7 @@ STATIC void btstack_packet_handler(uint8_t packet_type, uint8_t *packet, uint8_t event_type == SM_EVENT_PAIRING_COMPLETE || // event_type == GAP_EVENT_DEDICATED_BONDING_COMPLETED || // No conn_handle event_type == HCI_EVENT_ENCRYPTION_CHANGE) { - DEBUG_printf(" --> enc/auth/pair/bond change\n", ); + DEBUG_printf(" --> enc/auth/pair/bond change\n"); #if MICROPY_PY_BLUETOOTH_ENABLE_PAIRING_BONDING uint16_t conn_handle; switch (event_type) { @@ -420,6 +420,11 @@ STATIC void btstack_packet_handler(uint8_t packet_type, uint8_t *packet, uint8_t mp_bluetooth_gap_on_scan_result(address_type, address, adv_event_type, rssi, data, length); #endif // MICROPY_PY_BLUETOOTH_ENABLE_CENTRAL_MODE #if MICROPY_PY_BLUETOOTH_ENABLE_GATT_CLIENT + } else if (event_type == GATT_EVENT_MTU) { + // This is triggered in client mode. + uint16_t conn_handle = gatt_event_mtu_get_handle(packet); + uint16_t mtu = gatt_event_mtu_get_MTU(packet); + mp_bluetooth_gatts_on_mtu_exchanged(conn_handle, mtu); } else if (event_type == GATT_EVENT_QUERY_COMPLETE) { uint16_t conn_handle = gatt_event_query_complete_get_handle(packet); uint16_t status = gatt_event_query_complete_get_att_status(packet); @@ -625,6 +630,19 @@ STATIC void set_random_address(void) { DEBUG_printf("set_random_address: Address loaded by controller\n"); } +STATIC void deinit_stack(void) { + mp_bluetooth_btstack_state = MP_BLUETOOTH_BTSTACK_STATE_OFF; + + // Deinitialise BTstack components. + sm_deinit(); + l2cap_deinit(); + hci_deinit(); + btstack_memory_deinit(); + btstack_run_loop_deinit(); + + MP_STATE_PORT(bluetooth_btstack_root_pointers) = NULL; +} + int mp_bluetooth_init(void) { DEBUG_printf("mp_bluetooth_init\n"); @@ -702,8 +720,8 @@ int mp_bluetooth_init(void) { // Attempt a shutdown (may not do anything). mp_bluetooth_btstack_port_deinit(); - // Clean up. - MP_STATE_PORT(bluetooth_btstack_root_pointers) = NULL; + // Clean up BTstack. + deinit_stack(); return timeout ? MP_ETIMEDOUT : MP_EINVAL; } @@ -757,8 +775,8 @@ void mp_bluetooth_deinit(void) { } btstack_run_loop_remove_timer(&btstack_init_deinit_timeout); - mp_bluetooth_btstack_state = MP_BLUETOOTH_BTSTACK_STATE_OFF; - MP_STATE_PORT(bluetooth_btstack_root_pointers) = NULL; + // Clean up BTstack. + deinit_stack(); DEBUG_printf("mp_bluetooth_deinit: complete\n"); } diff --git a/ports/stm32/mpbtstackport.c b/ports/stm32/mpbtstackport.c index 795534042eae..301ac30e2060 100644 --- a/ports/stm32/mpbtstackport.c +++ b/ports/stm32/mpbtstackport.c @@ -31,6 +31,7 @@ #if MICROPY_PY_BLUETOOTH && MICROPY_BLUETOOTH_BTSTACK #include "lib/btstack/src/btstack.h" +#include "lib/btstack/src/hci_transport_h4.h" #include "extmod/mpbthci.h" #include "extmod/btstack/btstack_hci_uart.h" #include "extmod/btstack/modbluetooth_btstack.h" @@ -137,16 +138,10 @@ void mp_bluetooth_hci_poll(void) { } void mp_bluetooth_btstack_port_init(void) { - static bool run_loop_init = false; - if (!run_loop_init) { - run_loop_init = true; - btstack_run_loop_init(&mp_btstack_runloop_stm32); - } else { - mp_btstack_runloop_stm32.init(); - } + btstack_run_loop_init(&mp_btstack_runloop_stm32); // hci_dump_open(NULL, HCI_DUMP_STDOUT); - const hci_transport_t *transport = hci_transport_h4_instance(&mp_bluetooth_btstack_hci_uart_block); + const hci_transport_t *transport = hci_transport_h4_instance_for_uart(&mp_bluetooth_btstack_hci_uart_block); hci_init(transport, &hci_transport_config_uart); #ifdef MICROPY_HW_BLE_BTSTACK_CHIPSET_INSTANCE diff --git a/ports/unix/mpbtstackport_common.c b/ports/unix/mpbtstackport_common.c index ec40db65bc3a..66a3a0536aed 100644 --- a/ports/unix/mpbtstackport_common.c +++ b/ports/unix/mpbtstackport_common.c @@ -79,13 +79,7 @@ uint32_t hal_time_ms(void) { } void mp_bluetooth_btstack_port_init(void) { - static bool run_loop_init = false; - if (!run_loop_init) { - run_loop_init = true; - btstack_run_loop_init(btstack_run_loop_embedded_get_instance()); - } else { - btstack_run_loop_embedded_get_instance()->init(); - } + btstack_run_loop_init(btstack_run_loop_embedded_get_instance()); // hci_dump_open(NULL, HCI_DUMP_STDOUT); diff --git a/ports/unix/mpbtstackport_h4.c b/ports/unix/mpbtstackport_h4.c index 4fdc20c22b69..dacfff9a498a 100644 --- a/ports/unix/mpbtstackport_h4.c +++ b/ports/unix/mpbtstackport_h4.c @@ -32,6 +32,7 @@ #if MICROPY_PY_BLUETOOTH && MICROPY_BLUETOOTH_BTSTACK && MICROPY_BLUETOOTH_BTSTACK_H4 +#include "lib/btstack/src/hci_transport_h4.h" #include "lib/btstack/chipset/zephyr/btstack_chipset_zephyr.h" #include "extmod/btstack/btstack_hci_uart.h" @@ -42,11 +43,12 @@ #define DEBUG_printf(...) // printf(__VA_ARGS__) STATIC hci_transport_config_uart_t hci_transport_config_uart = { - HCI_TRANSPORT_CONFIG_UART, - 1000000, // initial baudrate - 0, // main baudrate - 1, // flow control - NULL, // device name + .type = HCI_TRANSPORT_CONFIG_UART, + .baudrate_init = 1000000, + .baudrate_main = 0, + .flowcontrol = 1, + .device_name = NULL, + .parity = BTSTACK_UART_PARITY_OFF, }; void mp_bluetooth_hci_poll_h4(void) { @@ -58,7 +60,7 @@ void mp_bluetooth_hci_poll_h4(void) { void mp_bluetooth_btstack_port_init_h4(void) { DEBUG_printf("mp_bluetooth_btstack_port_init_h4\n"); - const hci_transport_t *transport = hci_transport_h4_instance(&mp_bluetooth_btstack_hci_uart_block); + const hci_transport_t *transport = hci_transport_h4_instance_for_uart(&mp_bluetooth_btstack_hci_uart_block); hci_init(transport, &hci_transport_config_uart); hci_set_chipset(btstack_chipset_zephyr_instance()); diff --git a/ports/unix/mpbtstackport_usb.c b/ports/unix/mpbtstackport_usb.c index 28d2c8c543f7..b8c7b758d93e 100644 --- a/ports/unix/mpbtstackport_usb.c +++ b/ports/unix/mpbtstackport_usb.c @@ -34,6 +34,7 @@ #if MICROPY_PY_BLUETOOTH && MICROPY_BLUETOOTH_BTSTACK && MICROPY_BLUETOOTH_BTSTACK_USB #include "lib/btstack/src/btstack.h" +#include "lib/btstack/src/hci_transport_usb.h" #include "lib/btstack/platform/embedded/btstack_run_loop_embedded.h" #include "lib/btstack/platform/embedded/hal_cpu.h" #include "lib/btstack/platform/embedded/hal_time_ms.h" From b33767896430a36f163c0f9bb7020e688ccb9c5b Mon Sep 17 00:00:00 2001 From: Damien George Date: Wed, 5 Oct 2022 10:46:11 +1100 Subject: [PATCH 012/823] extmod/mbedtls: Add common configuration file, and use it in all ports. This is a no-op change. Signed-off-by: Damien George --- extmod/mbedtls/mbedtls_config_common.h | 110 +++++++++++++++++++++++++ ports/mimxrt/mbedtls/mbedtls_config.h | 69 +--------------- ports/rp2/mbedtls/mbedtls_config.h | 73 ++-------------- ports/stm32/mbedtls/mbedtls_config.h | 69 +--------------- ports/unix/mbedtls/mbedtls_config.h | 58 +------------ 5 files changed, 125 insertions(+), 254 deletions(-) create mode 100644 extmod/mbedtls/mbedtls_config_common.h diff --git a/extmod/mbedtls/mbedtls_config_common.h b/extmod/mbedtls/mbedtls_config_common.h new file mode 100644 index 000000000000..6c9385dea5f7 --- /dev/null +++ b/extmod/mbedtls/mbedtls_config_common.h @@ -0,0 +1,110 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2018-2022 Damien P. George + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ +#ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_COMMON_H +#define MICROPY_INCLUDED_MBEDTLS_CONFIG_COMMON_H + +// If you want to debug MBEDTLS uncomment the following and +// pass "3" to mbedtls_debug_set_threshold in socket_new. +// #define MBEDTLS_DEBUG_C + +// Set mbedtls configuration. +#define MBEDTLS_DEPRECATED_REMOVED +#define MBEDTLS_AES_ROM_TABLES +#define MBEDTLS_CIPHER_MODE_CBC +#define MBEDTLS_ECP_DP_SECP192R1_ENABLED +#define MBEDTLS_ECP_DP_SECP224R1_ENABLED +#define MBEDTLS_ECP_DP_SECP256R1_ENABLED +#define MBEDTLS_ECP_DP_SECP384R1_ENABLED +#define MBEDTLS_ECP_DP_SECP521R1_ENABLED +#define MBEDTLS_ECP_DP_SECP192K1_ENABLED +#define MBEDTLS_ECP_DP_SECP224K1_ENABLED +#define MBEDTLS_ECP_DP_SECP256K1_ENABLED +#define MBEDTLS_ECP_DP_BP256R1_ENABLED +#define MBEDTLS_ECP_DP_BP384R1_ENABLED +#define MBEDTLS_ECP_DP_BP512R1_ENABLED +#define MBEDTLS_ECP_DP_CURVE25519_ENABLED +#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED +#define MBEDTLS_NO_PLATFORM_ENTROPY +#define MBEDTLS_PKCS1_V15 +#define MBEDTLS_SHA256_SMALLER +#define MBEDTLS_SSL_PROTO_TLS1 +#define MBEDTLS_SSL_PROTO_TLS1_1 +#define MBEDTLS_SSL_PROTO_TLS1_2 +#define MBEDTLS_SSL_SERVER_NAME_INDICATION + +// Use a smaller output buffer to reduce size of SSL context. +#define MBEDTLS_SSL_MAX_CONTENT_LEN (16384) +#define MBEDTLS_SSL_IN_CONTENT_LEN (MBEDTLS_SSL_MAX_CONTENT_LEN) +#define MBEDTLS_SSL_OUT_CONTENT_LEN (4096) + +// Enable mbedtls modules. +#define MBEDTLS_AES_C +#define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_BIGNUM_C +#define MBEDTLS_CIPHER_C +#define MBEDTLS_CTR_DRBG_C +#define MBEDTLS_ENTROPY_C +#define MBEDTLS_ERROR_C +#define MBEDTLS_MD_C +#define MBEDTLS_MD5_C +#define MBEDTLS_OID_C +#define MBEDTLS_PKCS5_C +#define MBEDTLS_PK_C +#define MBEDTLS_PK_PARSE_C +#define MBEDTLS_PLATFORM_C +#define MBEDTLS_RSA_C +#define MBEDTLS_SHA1_C +#define MBEDTLS_SHA256_C +#define MBEDTLS_SHA512_C +#define MBEDTLS_SSL_CLI_C +#define MBEDTLS_SSL_SRV_C +#define MBEDTLS_SSL_TLS_C +#define MBEDTLS_X509_CRT_PARSE_C +#define MBEDTLS_X509_USE_C + +// A port may enable this option to select additional bare-metal configuration. +#if MICROPY_MBEDTLS_CONFIG_BARE_METAL + +// Bare-metal mbedtls configuration. +#define MBEDTLS_PLATFORM_MEMORY +#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS +#define MBEDTLS_ENTROPY_HARDWARE_ALT + +// Bare-metal memory allocation hooks. +#include +#include +void *m_tracked_calloc(size_t nmemb, size_t size); +void m_tracked_free(void *ptr); +#define MBEDTLS_PLATFORM_STD_CALLOC m_tracked_calloc +#define MBEDTLS_PLATFORM_STD_FREE m_tracked_free +#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf + +#endif + +// Include mbedtls configuration checker. +#include "mbedtls/check_config.h" + +#endif // MICROPY_INCLUDED_MBEDTLS_CONFIG_COMMON_H diff --git a/ports/mimxrt/mbedtls/mbedtls_config.h b/ports/mimxrt/mbedtls/mbedtls_config.h index 8e054ed51713..cc71aa7ec113 100644 --- a/ports/mimxrt/mbedtls/mbedtls_config.h +++ b/ports/mimxrt/mbedtls/mbedtls_config.h @@ -26,74 +26,13 @@ #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H -// Set mbedtls configuration -#define MBEDTLS_PLATFORM_MEMORY -#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS -#define MBEDTLS_DEPRECATED_REMOVED -#define MBEDTLS_ENTROPY_HARDWARE_ALT -#define MBEDTLS_AES_ROM_TABLES -#define MBEDTLS_CIPHER_MODE_CBC -#define MBEDTLS_ECP_DP_SECP192R1_ENABLED -#define MBEDTLS_ECP_DP_SECP224R1_ENABLED -#define MBEDTLS_ECP_DP_SECP256R1_ENABLED -#define MBEDTLS_ECP_DP_SECP384R1_ENABLED -#define MBEDTLS_ECP_DP_SECP521R1_ENABLED -#define MBEDTLS_ECP_DP_SECP192K1_ENABLED -#define MBEDTLS_ECP_DP_SECP224K1_ENABLED -#define MBEDTLS_ECP_DP_SECP256K1_ENABLED -#define MBEDTLS_ECP_DP_BP256R1_ENABLED -#define MBEDTLS_ECP_DP_BP384R1_ENABLED -#define MBEDTLS_ECP_DP_BP512R1_ENABLED -#define MBEDTLS_ECP_DP_CURVE25519_ENABLED -#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED -#define MBEDTLS_NO_PLATFORM_ENTROPY -#define MBEDTLS_PKCS1_V15 -#define MBEDTLS_SHA256_SMALLER -#define MBEDTLS_SSL_PROTO_TLS1 -#define MBEDTLS_SSL_PROTO_TLS1_1 -#define MBEDTLS_SSL_PROTO_TLS1_2 -#define MBEDTLS_SSL_SERVER_NAME_INDICATION - -// Use a smaller output buffer to reduce size of SSL context -#define MBEDTLS_SSL_MAX_CONTENT_LEN (16384) -#define MBEDTLS_SSL_IN_CONTENT_LEN (MBEDTLS_SSL_MAX_CONTENT_LEN) -#define MBEDTLS_SSL_OUT_CONTENT_LEN (4096) - // Enable mbedtls modules -#define MBEDTLS_AES_C -#define MBEDTLS_ASN1_PARSE_C -#define MBEDTLS_BIGNUM_C -#define MBEDTLS_CIPHER_C -#define MBEDTLS_CTR_DRBG_C // #define MBEDTLS_ECP_C -#define MBEDTLS_ENTROPY_C -#define MBEDTLS_ERROR_C -#define MBEDTLS_MD_C -#define MBEDTLS_MD5_C -#define MBEDTLS_OID_C -#define MBEDTLS_PKCS5_C -#define MBEDTLS_PK_C -#define MBEDTLS_PK_PARSE_C -#define MBEDTLS_PLATFORM_C -#define MBEDTLS_RSA_C -#define MBEDTLS_SHA1_C -#define MBEDTLS_SHA256_C -#define MBEDTLS_SHA512_C -#define MBEDTLS_SSL_CLI_C -#define MBEDTLS_SSL_SRV_C -#define MBEDTLS_SSL_TLS_C -#define MBEDTLS_X509_CRT_PARSE_C -#define MBEDTLS_X509_USE_C -// Memory allocation hooks -#include -#include -void *m_tracked_calloc(size_t nmemb, size_t size); -void m_tracked_free(void *ptr); -#define MBEDTLS_PLATFORM_STD_CALLOC m_tracked_calloc -#define MBEDTLS_PLATFORM_STD_FREE m_tracked_free -#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf +// Set MicroPython-specific options. +#define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1) -#include "mbedtls/check_config.h" +// Include common mbedtls configuration. +#include "extmod/mbedtls/mbedtls_config_common.h" #endif /* MICROPY_INCLUDED_MBEDTLS_CONFIG_H */ diff --git a/ports/rp2/mbedtls/mbedtls_config.h b/ports/rp2/mbedtls/mbedtls_config.h index c80aa5bc18c2..61f622295ffa 100644 --- a/ports/rp2/mbedtls/mbedtls_config.h +++ b/ports/rp2/mbedtls/mbedtls_config.h @@ -26,90 +26,27 @@ #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H -// If you want to debug MBEDTLS uncomment the following and -// Pass 3 to mbedtls_debug_set_threshold in socket_new -// #define MBEDTLS_DEBUG_C - // Set mbedtls configuration -#define MBEDTLS_PLATFORM_MEMORY -#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS -#define MBEDTLS_DEPRECATED_REMOVED -#define MBEDTLS_ENTROPY_HARDWARE_ALT -#define MBEDTLS_AES_ROM_TABLES -#define MBEDTLS_CIPHER_MODE_CBC -#define MBEDTLS_ECP_DP_SECP192R1_ENABLED -#define MBEDTLS_ECP_DP_SECP224R1_ENABLED -#define MBEDTLS_ECP_DP_SECP256R1_ENABLED -#define MBEDTLS_ECP_DP_SECP384R1_ENABLED -#define MBEDTLS_ECP_DP_SECP521R1_ENABLED -#define MBEDTLS_ECP_DP_SECP192K1_ENABLED -#define MBEDTLS_ECP_DP_SECP224K1_ENABLED -#define MBEDTLS_ECP_DP_SECP256K1_ENABLED -#define MBEDTLS_ECP_DP_BP256R1_ENABLED -#define MBEDTLS_ECP_DP_BP384R1_ENABLED -#define MBEDTLS_ECP_DP_BP512R1_ENABLED -#define MBEDTLS_ECP_DP_CURVE25519_ENABLED #define MBEDTLS_ECP_NIST_OPTIM #define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED -#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED -#define MBEDTLS_NO_PLATFORM_ENTROPY -#define MBEDTLS_PKCS1_V15 -#define MBEDTLS_SHA256_SMALLER -#define MBEDTLS_SSL_PROTO_TLS1 -#define MBEDTLS_SSL_PROTO_TLS1_1 -#define MBEDTLS_SSL_PROTO_TLS1_2 -#define MBEDTLS_SSL_SERVER_NAME_INDICATION - -// Use a smaller output buffer to reduce size of SSL context -#define MBEDTLS_SSL_MAX_CONTENT_LEN (16384) -#define MBEDTLS_SSL_IN_CONTENT_LEN (MBEDTLS_SSL_MAX_CONTENT_LEN) -#define MBEDTLS_SSL_OUT_CONTENT_LEN (4096) // Enable mbedtls modules -#define MBEDTLS_AES_C -#define MBEDTLS_ASN1_PARSE_C -#define MBEDTLS_BIGNUM_C -#define MBEDTLS_CIPHER_C -#define MBEDTLS_CTR_DRBG_C #define MBEDTLS_ECDH_C #define MBEDTLS_ECP_C -#define MBEDTLS_ENTROPY_C -#define MBEDTLS_ERROR_C #define MBEDTLS_GCM_C -#define MBEDTLS_MD_C -#define MBEDTLS_MD5_C -#define MBEDTLS_OID_C -#define MBEDTLS_PKCS5_C -#define MBEDTLS_PK_C -#define MBEDTLS_PK_PARSE_C -#define MBEDTLS_PLATFORM_C -#define MBEDTLS_RSA_C -#define MBEDTLS_SHA1_C -#define MBEDTLS_SHA256_C -#define MBEDTLS_SHA512_C -#define MBEDTLS_SSL_CLI_C -#define MBEDTLS_SSL_SRV_C -#define MBEDTLS_SSL_TLS_C #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE -#define MBEDTLS_X509_CRT_PARSE_C -#define MBEDTLS_X509_USE_C #define MBEDTLS_HAVE_TIME #define MBEDTLS_HAVE_TIME_DATE -// Memory allocation hooks -#include -#include -void *m_tracked_calloc(size_t nmemb, size_t size); -void m_tracked_free(void *ptr); -#define MBEDTLS_PLATFORM_STD_CALLOC m_tracked_calloc -#define MBEDTLS_PLATFORM_STD_FREE m_tracked_free -#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf - // Time hook #include time_t rp2_rtctime_seconds(time_t *timer); #define MBEDTLS_PLATFORM_TIME_MACRO rp2_rtctime_seconds -#include "mbedtls/check_config.h" +// Set MicroPython-specific options. +#define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1) + +// Include common mbedtls configuration. +#include "extmod/mbedtls/mbedtls_config_common.h" #endif /* MICROPY_INCLUDED_MBEDTLS_CONFIG_H */ diff --git a/ports/stm32/mbedtls/mbedtls_config.h b/ports/stm32/mbedtls/mbedtls_config.h index 2e0cb7651a48..b8548866f168 100644 --- a/ports/stm32/mbedtls/mbedtls_config.h +++ b/ports/stm32/mbedtls/mbedtls_config.h @@ -26,75 +26,14 @@ #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H -// Set mbedtls configuration -#define MBEDTLS_PLATFORM_MEMORY -#define MBEDTLS_PLATFORM_NO_STD_FUNCTIONS -#define MBEDTLS_DEPRECATED_REMOVED -#define MBEDTLS_ENTROPY_HARDWARE_ALT -#define MBEDTLS_AES_ROM_TABLES -#define MBEDTLS_CIPHER_MODE_CBC -#define MBEDTLS_ECP_DP_SECP192R1_ENABLED -#define MBEDTLS_ECP_DP_SECP224R1_ENABLED -#define MBEDTLS_ECP_DP_SECP256R1_ENABLED -#define MBEDTLS_ECP_DP_SECP384R1_ENABLED -#define MBEDTLS_ECP_DP_SECP521R1_ENABLED -#define MBEDTLS_ECP_DP_SECP192K1_ENABLED -#define MBEDTLS_ECP_DP_SECP224K1_ENABLED -#define MBEDTLS_ECP_DP_SECP256K1_ENABLED -#define MBEDTLS_ECP_DP_BP256R1_ENABLED -#define MBEDTLS_ECP_DP_BP384R1_ENABLED -#define MBEDTLS_ECP_DP_BP512R1_ENABLED -#define MBEDTLS_ECP_DP_CURVE25519_ENABLED -#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED -#define MBEDTLS_NO_PLATFORM_ENTROPY -#define MBEDTLS_PKCS1_V15 -#define MBEDTLS_SHA256_SMALLER -#define MBEDTLS_SSL_PROTO_TLS1 -#define MBEDTLS_SSL_PROTO_TLS1_1 -#define MBEDTLS_SSL_PROTO_TLS1_2 -#define MBEDTLS_SSL_SERVER_NAME_INDICATION - -// Use a smaller output buffer to reduce size of SSL context -#define MBEDTLS_SSL_MAX_CONTENT_LEN (16384) -#define MBEDTLS_SSL_IN_CONTENT_LEN (MBEDTLS_SSL_MAX_CONTENT_LEN) -#define MBEDTLS_SSL_OUT_CONTENT_LEN (4096) - // Enable mbedtls modules -#define MBEDTLS_AES_C -#define MBEDTLS_ASN1_PARSE_C -#define MBEDTLS_BIGNUM_C -#define MBEDTLS_CIPHER_C -#define MBEDTLS_CTR_DRBG_C // #define MBEDTLS_ECP_C -#define MBEDTLS_ENTROPY_C -#define MBEDTLS_ERROR_C -#define MBEDTLS_MD_C -#define MBEDTLS_MD5_C -#define MBEDTLS_OID_C -#define MBEDTLS_PKCS5_C -#define MBEDTLS_PK_C -#define MBEDTLS_PK_PARSE_C -#define MBEDTLS_PLATFORM_C -#define MBEDTLS_RSA_C -#define MBEDTLS_SHA1_C -#define MBEDTLS_SHA256_C -#define MBEDTLS_SHA512_C -#define MBEDTLS_SSL_CLI_C -#define MBEDTLS_SSL_SRV_C -#define MBEDTLS_SSL_TLS_C #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE -#define MBEDTLS_X509_CRT_PARSE_C -#define MBEDTLS_X509_USE_C -// Memory allocation hooks -#include -#include -void *m_tracked_calloc(size_t nmemb, size_t size); -void m_tracked_free(void *ptr); -#define MBEDTLS_PLATFORM_STD_CALLOC m_tracked_calloc -#define MBEDTLS_PLATFORM_STD_FREE m_tracked_free -#define MBEDTLS_PLATFORM_SNPRINTF_MACRO snprintf +// Set MicroPython-specific options. +#define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1) -#include "mbedtls/check_config.h" +// Include common mbedtls configuration. +#include "extmod/mbedtls/mbedtls_config_common.h" #endif /* MICROPY_INCLUDED_MBEDTLS_CONFIG_H */ diff --git a/ports/unix/mbedtls/mbedtls_config.h b/ports/unix/mbedtls/mbedtls_config.h index b119d09092f0..c83f1c86f3dd 100644 --- a/ports/unix/mbedtls/mbedtls_config.h +++ b/ports/unix/mbedtls/mbedtls_config.h @@ -26,69 +26,15 @@ #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H -// If you want to debug MBEDTLS uncomment the following and -// Pass 3 to mbedtls_debug_set_threshold in socket_new -// #define MBEDTLS_DEBUG_C - // Set mbedtls configuration -#define MBEDTLS_DEPRECATED_REMOVED -#define MBEDTLS_AES_ROM_TABLES -#define MBEDTLS_CIPHER_MODE_CBC #define MBEDTLS_CIPHER_MODE_CTR // needed for MICROPY_PY_UCRYPTOLIB_CTR -#define MBEDTLS_ECP_DP_SECP192R1_ENABLED -#define MBEDTLS_ECP_DP_SECP224R1_ENABLED -#define MBEDTLS_ECP_DP_SECP256R1_ENABLED -#define MBEDTLS_ECP_DP_SECP384R1_ENABLED -#define MBEDTLS_ECP_DP_SECP521R1_ENABLED -#define MBEDTLS_ECP_DP_SECP192K1_ENABLED -#define MBEDTLS_ECP_DP_SECP224K1_ENABLED -#define MBEDTLS_ECP_DP_SECP256K1_ENABLED -#define MBEDTLS_ECP_DP_BP256R1_ENABLED -#define MBEDTLS_ECP_DP_BP384R1_ENABLED -#define MBEDTLS_ECP_DP_BP512R1_ENABLED -#define MBEDTLS_ECP_DP_CURVE25519_ENABLED -#define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED -#define MBEDTLS_NO_PLATFORM_ENTROPY -#define MBEDTLS_PKCS1_V15 -#define MBEDTLS_SHA256_SMALLER -#define MBEDTLS_SSL_PROTO_TLS1 -#define MBEDTLS_SSL_PROTO_TLS1_1 -#define MBEDTLS_SSL_PROTO_TLS1_2 -#define MBEDTLS_SSL_SERVER_NAME_INDICATION - -// Use a smaller output buffer to reduce size of SSL context -#define MBEDTLS_SSL_MAX_CONTENT_LEN (16384) -#define MBEDTLS_SSL_IN_CONTENT_LEN (MBEDTLS_SSL_MAX_CONTENT_LEN) -#define MBEDTLS_SSL_OUT_CONTENT_LEN (4096) // Enable mbedtls modules -#define MBEDTLS_AES_C -#define MBEDTLS_ASN1_PARSE_C -#define MBEDTLS_BIGNUM_C -#define MBEDTLS_CIPHER_C -#define MBEDTLS_CTR_DRBG_C -#define MBEDTLS_ENTROPY_C -#define MBEDTLS_ERROR_C #define MBEDTLS_HAVEGE_C -#define MBEDTLS_MD_C -#define MBEDTLS_MD5_C -#define MBEDTLS_OID_C -#define MBEDTLS_PKCS5_C -#define MBEDTLS_PK_C -#define MBEDTLS_PK_PARSE_C -#define MBEDTLS_PLATFORM_C -#define MBEDTLS_RSA_C -#define MBEDTLS_SHA1_C -#define MBEDTLS_SHA256_C -#define MBEDTLS_SHA512_C -#define MBEDTLS_SSL_CLI_C -#define MBEDTLS_SSL_SRV_C -#define MBEDTLS_SSL_TLS_C #define MBEDTLS_TIMING_C #define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE -#define MBEDTLS_X509_CRT_PARSE_C -#define MBEDTLS_X509_USE_C -#include "mbedtls/check_config.h" +// Include common mbedtls configuration. +#include "extmod/mbedtls/mbedtls_config_common.h" #endif /* MICROPY_INCLUDED_MBEDTLS_CONFIG_H */ From 9347545f9ee66210a835cb2f1e9860949feb139f Mon Sep 17 00:00:00 2001 From: Damien George Date: Wed, 5 Oct 2022 10:48:31 +1100 Subject: [PATCH 013/823] extmod/mbedtls: Enable MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE. This was already enabled on all ports except mimxrt. Now it's enabled on all of them. Signed-off-by: Damien George --- extmod/mbedtls/mbedtls_config_common.h | 1 + ports/rp2/mbedtls/mbedtls_config.h | 1 - ports/stm32/mbedtls/mbedtls_config.h | 1 - ports/unix/mbedtls/mbedtls_config.h | 1 - 4 files changed, 1 insertion(+), 3 deletions(-) diff --git a/extmod/mbedtls/mbedtls_config_common.h b/extmod/mbedtls/mbedtls_config_common.h index 6c9385dea5f7..4c2be6228af0 100644 --- a/extmod/mbedtls/mbedtls_config_common.h +++ b/extmod/mbedtls/mbedtls_config_common.h @@ -82,6 +82,7 @@ #define MBEDTLS_SSL_CLI_C #define MBEDTLS_SSL_SRV_C #define MBEDTLS_SSL_TLS_C +#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE #define MBEDTLS_X509_CRT_PARSE_C #define MBEDTLS_X509_USE_C diff --git a/ports/rp2/mbedtls/mbedtls_config.h b/ports/rp2/mbedtls/mbedtls_config.h index 61f622295ffa..9c930b7d9c49 100644 --- a/ports/rp2/mbedtls/mbedtls_config.h +++ b/ports/rp2/mbedtls/mbedtls_config.h @@ -34,7 +34,6 @@ #define MBEDTLS_ECDH_C #define MBEDTLS_ECP_C #define MBEDTLS_GCM_C -#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE #define MBEDTLS_HAVE_TIME #define MBEDTLS_HAVE_TIME_DATE diff --git a/ports/stm32/mbedtls/mbedtls_config.h b/ports/stm32/mbedtls/mbedtls_config.h index b8548866f168..cc71aa7ec113 100644 --- a/ports/stm32/mbedtls/mbedtls_config.h +++ b/ports/stm32/mbedtls/mbedtls_config.h @@ -28,7 +28,6 @@ // Enable mbedtls modules // #define MBEDTLS_ECP_C -#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE // Set MicroPython-specific options. #define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1) diff --git a/ports/unix/mbedtls/mbedtls_config.h b/ports/unix/mbedtls/mbedtls_config.h index c83f1c86f3dd..c8ffab0832a1 100644 --- a/ports/unix/mbedtls/mbedtls_config.h +++ b/ports/unix/mbedtls/mbedtls_config.h @@ -32,7 +32,6 @@ // Enable mbedtls modules #define MBEDTLS_HAVEGE_C #define MBEDTLS_TIMING_C -#define MBEDTLS_TLS_DEFAULT_ALLOW_SHA1_IN_KEY_EXCHANGE // Include common mbedtls configuration. #include "extmod/mbedtls/mbedtls_config_common.h" From 8874a09119e74bb0edf73a63495b559d983767b7 Mon Sep 17 00:00:00 2001 From: Damien George Date: Wed, 5 Oct 2022 11:02:47 +1100 Subject: [PATCH 014/823] extmod/mbedtls: Enable elliptic curve DH and DSA cryptography. This is necessary to access sites that only support these protocols. The rp2 port already has ECDH enabled, so this just adds ECDSA there. The other ports now gain both ECDH and ECDSA. The code size increase is: - rp2 (PICO_W): +2916 bytes flash, +24 bytes BSS - stm32 (PYBD_SF6): +20480 bytes flash, +32 bytes data, +48 bytes BSS - mimxrt (TEENSY41): +20708 bytes flash, +32 bytes data, +48 bytes BSS - unix (standard x86-64): +39344 executable, +1744 bytes data, +96 BSS This is obviously a large increase in code size. But there doesn't seem to be any other option because without elliptic curve cryptography devices are partially cut off from the internet. For use cases that require small firmware size, they'll need to build custom firmware with a custom mbedtls config. Signed-off-by: Damien George --- extmod/mbedtls/mbedtls_config_common.h | 6 ++++++ ports/mimxrt/mbedtls/mbedtls_config.h | 3 --- ports/rp2/mbedtls/mbedtls_config.h | 2 -- ports/stm32/mbedtls/mbedtls_config.h | 3 --- 4 files changed, 6 insertions(+), 8 deletions(-) diff --git a/extmod/mbedtls/mbedtls_config_common.h b/extmod/mbedtls/mbedtls_config_common.h index 4c2be6228af0..252f293e0337 100644 --- a/extmod/mbedtls/mbedtls_config_common.h +++ b/extmod/mbedtls/mbedtls_config_common.h @@ -47,6 +47,8 @@ #define MBEDTLS_ECP_DP_BP512R1_ENABLED #define MBEDTLS_ECP_DP_CURVE25519_ENABLED #define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED +// #define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED // enabling this currently breaks ssl_data.py test +#define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED #define MBEDTLS_NO_PLATFORM_ENTROPY #define MBEDTLS_PKCS1_V15 #define MBEDTLS_SHA256_SMALLER @@ -63,9 +65,13 @@ // Enable mbedtls modules. #define MBEDTLS_AES_C #define MBEDTLS_ASN1_PARSE_C +#define MBEDTLS_ASN1_WRITE_C #define MBEDTLS_BIGNUM_C #define MBEDTLS_CIPHER_C #define MBEDTLS_CTR_DRBG_C +#define MBEDTLS_ECDH_C +#define MBEDTLS_ECDSA_C +#define MBEDTLS_ECP_C #define MBEDTLS_ENTROPY_C #define MBEDTLS_ERROR_C #define MBEDTLS_MD_C diff --git a/ports/mimxrt/mbedtls/mbedtls_config.h b/ports/mimxrt/mbedtls/mbedtls_config.h index cc71aa7ec113..4140bb514555 100644 --- a/ports/mimxrt/mbedtls/mbedtls_config.h +++ b/ports/mimxrt/mbedtls/mbedtls_config.h @@ -26,9 +26,6 @@ #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H -// Enable mbedtls modules -// #define MBEDTLS_ECP_C - // Set MicroPython-specific options. #define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1) diff --git a/ports/rp2/mbedtls/mbedtls_config.h b/ports/rp2/mbedtls/mbedtls_config.h index 9c930b7d9c49..1b6d3dd43a65 100644 --- a/ports/rp2/mbedtls/mbedtls_config.h +++ b/ports/rp2/mbedtls/mbedtls_config.h @@ -31,8 +31,6 @@ #define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED // Enable mbedtls modules -#define MBEDTLS_ECDH_C -#define MBEDTLS_ECP_C #define MBEDTLS_GCM_C #define MBEDTLS_HAVE_TIME #define MBEDTLS_HAVE_TIME_DATE diff --git a/ports/stm32/mbedtls/mbedtls_config.h b/ports/stm32/mbedtls/mbedtls_config.h index cc71aa7ec113..4140bb514555 100644 --- a/ports/stm32/mbedtls/mbedtls_config.h +++ b/ports/stm32/mbedtls/mbedtls_config.h @@ -26,9 +26,6 @@ #ifndef MICROPY_INCLUDED_MBEDTLS_CONFIG_H #define MICROPY_INCLUDED_MBEDTLS_CONFIG_H -// Enable mbedtls modules -// #define MBEDTLS_ECP_C - // Set MicroPython-specific options. #define MICROPY_MBEDTLS_CONFIG_BARE_METAL (1) From e24159dec9588d83fc532aa6fcc2f418aae9df85 Mon Sep 17 00:00:00 2001 From: Damien George Date: Tue, 11 Oct 2022 19:22:48 +1100 Subject: [PATCH 015/823] extmod/mbedtls: Remove MBEDTLS_ECP_DP_CURVE25519_ENABLED config. Curve25519 arithmetic is supported in mbedtls, but it's not used for TLS. So there's no need to have this option enabled. Reduces rp2 PICO_W firmware by 2440 bytes. Thanks to @Carglglz for the information. Signed-off-by: Damien George --- extmod/mbedtls/mbedtls_config_common.h | 1 - 1 file changed, 1 deletion(-) diff --git a/extmod/mbedtls/mbedtls_config_common.h b/extmod/mbedtls/mbedtls_config_common.h index 252f293e0337..9ec2af85537f 100644 --- a/extmod/mbedtls/mbedtls_config_common.h +++ b/extmod/mbedtls/mbedtls_config_common.h @@ -45,7 +45,6 @@ #define MBEDTLS_ECP_DP_BP256R1_ENABLED #define MBEDTLS_ECP_DP_BP384R1_ENABLED #define MBEDTLS_ECP_DP_BP512R1_ENABLED -#define MBEDTLS_ECP_DP_CURVE25519_ENABLED #define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED // #define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED // enabling this currently breaks ssl_data.py test #define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED From 68f166dae9ad6dfd94038d5f4394defbb44238af Mon Sep 17 00:00:00 2001 From: Damien George Date: Tue, 11 Oct 2022 19:25:05 +1100 Subject: [PATCH 016/823] extmod/mbedtls: Remove brainpool curves from config. They are much slower than NIST (SECP) curves and shouldn't be needed. Reduces rp2 PICO_W firmware by 1328 bytes. Thanks to @Carglglz for the information. Signed-off-by: Damien George --- extmod/mbedtls/mbedtls_config_common.h | 3 --- 1 file changed, 3 deletions(-) diff --git a/extmod/mbedtls/mbedtls_config_common.h b/extmod/mbedtls/mbedtls_config_common.h index 9ec2af85537f..bfbc6f7ba298 100644 --- a/extmod/mbedtls/mbedtls_config_common.h +++ b/extmod/mbedtls/mbedtls_config_common.h @@ -42,9 +42,6 @@ #define MBEDTLS_ECP_DP_SECP192K1_ENABLED #define MBEDTLS_ECP_DP_SECP224K1_ENABLED #define MBEDTLS_ECP_DP_SECP256K1_ENABLED -#define MBEDTLS_ECP_DP_BP256R1_ENABLED -#define MBEDTLS_ECP_DP_BP384R1_ENABLED -#define MBEDTLS_ECP_DP_BP512R1_ENABLED #define MBEDTLS_KEY_EXCHANGE_RSA_ENABLED // #define MBEDTLS_KEY_EXCHANGE_ECDHE_RSA_ENABLED // enabling this currently breaks ssl_data.py test #define MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA_ENABLED From b161abc574b8e4fb2b00ef76be2b9c8967e18584 Mon Sep 17 00:00:00 2001 From: Jim Mussared Date: Tue, 18 Oct 2022 00:18:54 +1100 Subject: [PATCH 017/823] py/obj: Verify floating point type is correct for repr C. Prevents double-precision floats being enabled on 32-bit architectures where they will not fit into the mp_obj_t encoding. Signed-off-by: Jim Mussared --- py/obj.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/py/obj.h b/py/obj.h index 8aa5b0a8e667..8d62dd4f3cf0 100644 --- a/py/obj.h +++ b/py/obj.h @@ -173,6 +173,10 @@ static inline bool mp_obj_is_obj(mp_const_obj_t o) { #elif MICROPY_OBJ_REPR == MICROPY_OBJ_REPR_C +#if MICROPY_FLOAT_IMPL == MICROPY_FLOAT_IMPL_NONE +#error "MICROPY_OBJ_REPR_C requires float to be enabled." +#endif + static inline bool mp_obj_is_small_int(mp_const_obj_t o) { return (((mp_int_t)(o)) & 1) != 0; } @@ -189,6 +193,9 @@ static inline bool mp_obj_is_small_int(mp_const_obj_t o) { #endif static inline bool mp_obj_is_float(mp_const_obj_t o) { + // Ensure that 32-bit arch can only use single precision. + MP_STATIC_ASSERT(sizeof(mp_float_t) <= sizeof(mp_obj_t)); + return (((mp_uint_t)(o)) & 3) == 2 && (((mp_uint_t)(o)) & 0xff800007) != 0x00000006; } static inline mp_float_t mp_obj_float_get(mp_const_obj_t o) { From 5ee1cb27711d3747747db3ecd7b761c2a064addf Mon Sep 17 00:00:00 2001 From: Jim Mussared Date: Tue, 18 Oct 2022 00:22:53 +1100 Subject: [PATCH 018/823] stm32/boards/ARDUINO_PORTENTA_H7: Revert to single-precision float. Using repr C is incompatible with double-precision floats on 32-bit arch. Signed-off-by: Jim Mussared --- ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk index e5b48d0644f0..7151a5abc5d7 100644 --- a/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk +++ b/ports/stm32/boards/ARDUINO_PORTENTA_H7/mpconfigboard.mk @@ -10,7 +10,7 @@ BOOTLOADER_DFU_USB_PID = 0x035b # MCU settings MCU_SERIES = h7 CMSIS_MCU = STM32H747xx -MICROPY_FLOAT_IMPL = double +MICROPY_FLOAT_IMPL = single AF_FILE = boards/stm32h743_af.csv LD_FILES = boards/ARDUINO_PORTENTA_H7/stm32h747.ld TEXT0_ADDR = 0x08040000 From 1ba0e8ff96334af986d2b7d90f6d86af27595d28 Mon Sep 17 00:00:00 2001 From: Jim Mussared Date: Thu, 20 Oct 2022 13:14:25 +1100 Subject: [PATCH 019/823] py/persistentcode: Only emit sub-version if generated code has native. In order for v1.19.1 to load a .mpy, the formerly-feature-flags which are now used for the sub-version must be zero. The sub-version is only used to indicate a native version change, so it should be zero when emitting bytecode-only .mpy files. This work was funded through GitHub Sponsors. Signed-off-by: Jim Mussared --- py/persistentcode.c | 7 ++----- tools/mpy-tool.py | 2 +- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/py/persistentcode.c b/py/persistentcode.c index 67c8f327f002..5408f756cf8f 100644 --- a/py/persistentcode.c +++ b/py/persistentcode.c @@ -591,21 +591,18 @@ void mp_raw_code_save(mp_compiled_module_t *cm, mp_print_t *print) { // header contains: // byte 'M' // byte version - // byte feature flags + // byte native arch (and sub-version if native) // byte number of bits in a small int byte header[4] = { 'M', MPY_VERSION, - MPY_FEATURE_ENCODE_SUB_VERSION(MPY_SUB_VERSION), + cm->has_native ? MPY_FEATURE_ENCODE_SUB_VERSION(MPY_SUB_VERSION) | MPY_FEATURE_ENCODE_ARCH(MPY_FEATURE_ARCH_DYNAMIC) : 0, #if MICROPY_DYNAMIC_COMPILER mp_dynamic_compiler.small_int_bits, #else MP_SMALL_INT_BITS, #endif }; - if (cm->has_native) { - header[2] |= MPY_FEATURE_ENCODE_ARCH(MPY_FEATURE_ARCH_DYNAMIC); - } mp_print_bytes(print, header, sizeof(header)); // Number of entries in constant table. diff --git a/tools/mpy-tool.py b/tools/mpy-tool.py index 8b644c137f4c..0b8a0403ca28 100755 --- a/tools/mpy-tool.py +++ b/tools/mpy-tool.py @@ -1676,7 +1676,7 @@ def merge_mpy(compiled_modules, output_file): header = bytearray(4) header[0] = ord("M") header[1] = config.MPY_VERSION - header[2] = config.native_arch << 2 | config.MPY_SUB_VERSION + header[2] = config.native_arch << 2 | config.MPY_SUB_VERSION if config.native_arch else 0 header[3] = config.mp_small_int_bits merged_mpy.extend(header) From edc3f3d0d3c4099dc6bce5371df0e1c3c5a4aecb Mon Sep 17 00:00:00 2001 From: robert-hh Date: Wed, 29 Jun 2022 15:31:21 +0200 Subject: [PATCH 020/823] samd/clock_config: Extend the range of machine.freq(). The value given for machine.freq(f) is extend to the range of 1_000_000 to 200_000_000. Frequencies below 48 MHz will be forced to an integer fraction of 48 MHz. At frequencies below 8 MHz USB is switched off. The power consumption e.g. of ADAFRUIT_ITSYBITSY_M4_EXPRESS drops to about 1.5 mA at 1 MHz. Since the peripheral frequency is dropped as well, timing e.g. of PWM, UART, I2C and SPI is affected and frequency/baud rate has to set again after a frequency change below 48 MHz. --- ports/samd/mcu/samd51/clock_config.c | 72 ++++++++++++++++++++-------- ports/samd/modmachine.c | 4 +- ports/samd/samd_soc.c | 2 +- 3 files changed, 54 insertions(+), 24 deletions(-) diff --git a/ports/samd/mcu/samd51/clock_config.c b/ports/samd/mcu/samd51/clock_config.c index 31c8f5a8654c..9fb48705adcb 100644 --- a/ports/samd/mcu/samd51/clock_config.c +++ b/ports/samd/mcu/samd51/clock_config.c @@ -54,35 +54,63 @@ uint32_t get_peripheral_freq(void) { } void set_cpu_freq(uint32_t cpu_freq_arg) { - cpu_freq = cpu_freq_arg; // Setup GCLK0 for 48MHz as default state to keep the MCU running during config change. GCLK->GENCTRL[0].reg = GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; while (GCLK->SYNCBUSY.bit.GENCTRL0) { } - // Setup DPLL0 for 120 MHz // first: disable DPLL0 in case it is running OSCCTRL->Dpll[0].DPLLCTRLA.bit.ENABLE = 0; while (OSCCTRL->Dpll[0].DPLLSYNCBUSY.bit.ENABLE == 1) { } - // Now configure the registers - OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(1) | OSCCTRL_DPLLCTRLB_LBYPASS | - OSCCTRL_DPLLCTRLB_REFCLK(0) | OSCCTRL_DPLLCTRLB_WUF | OSCCTRL_DPLLCTRLB_FILTER(0x01); - - uint32_t div = cpu_freq / DPLLx_REF_FREQ; - uint32_t frac = (cpu_freq - div * DPLLx_REF_FREQ) / (DPLLx_REF_FREQ / 32); - OSCCTRL->Dpll[0].DPLLRATIO.reg = (frac << 16) + div - 1; - // enable it again - OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_ENABLE | OSCCTRL_DPLLCTRLA_RUNSTDBY; - - // Per errata 2.13.1 - while (!(OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY == 1)) { + if (cpu_freq_arg > DFLL48M_FREQ) { + + cpu_freq = cpu_freq_arg; + peripheral_freq = DFLL48M_FREQ; + // Now configure the registers + OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(1) | OSCCTRL_DPLLCTRLB_LBYPASS | + OSCCTRL_DPLLCTRLB_REFCLK(0) | OSCCTRL_DPLLCTRLB_WUF | OSCCTRL_DPLLCTRLB_FILTER(0x01); + + uint32_t div = cpu_freq / DPLLx_REF_FREQ; + uint32_t frac = (cpu_freq - div * DPLLx_REF_FREQ) / (DPLLx_REF_FREQ / 32); + OSCCTRL->Dpll[0].DPLLRATIO.reg = (frac << 16) + div - 1; + // enable it again + OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_ENABLE | OSCCTRL_DPLLCTRLA_RUNSTDBY; + + // Per errata 2.13.1 + while (!(OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY == 1)) { + } + // Setup GCLK0 for DPLL0 output (48 or 48-200MHz) + GCLK->GENCTRL[0].reg = GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DPLL0; + while (GCLK->SYNCBUSY.bit.GENCTRL0) { + } + // Set GCLK 2 back to 48 MHz + GCLK->GENCTRL[2].reg = GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; + while (GCLK->SYNCBUSY.bit.GENCTRL2) { + } + } else { + int div = DFLL48M_FREQ / cpu_freq_arg; + // Setup GCLK1 for the low freq + GCLK->GENCTRL[2].reg = GCLK_GENCTRL_DIV(div) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; + while (GCLK->SYNCBUSY.bit.GENCTRL2) { + } + GCLK->GENCTRL[0].reg = GCLK_GENCTRL_DIV(div) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; + while (GCLK->SYNCBUSY.bit.GENCTRL0) { + } + peripheral_freq = DFLL48M_FREQ / div; + cpu_freq = DFLL48M_FREQ / div; } - - // Setup GCLK0 for DPLL0 output (48 or 48-200MHz) - GCLK->GENCTRL[0].reg = GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DPLL0; - while (GCLK->SYNCBUSY.bit.GENCTRL0) { + if (cpu_freq >= 8000000) { + // Setup GCLK5 for DFLL48M output (48 MHz) + GCLK->GENCTRL[5].reg = GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; + while (GCLK->SYNCBUSY.bit.GENCTRL5) { + } + } else { + // Setup GCLK5 off if CPU Clk < 8 MHz + GCLK->GENCTRL[5].reg = 0; + while (GCLK->SYNCBUSY.bit.GENCTRL5) { + } } } @@ -120,9 +148,10 @@ void init_clocks(uint32_t cpu_freq) { // SAMD51 clock settings // GCLK0: 48MHz from DFLL48M or 48 - 200 MHz from DPLL0 (SAMD51) // GCLK1: 32768 Hz from 32KULP or DFLL48M - // GCLK2: 48MHz from DFLL48M for Peripheral devices - // GCLK3: 16Mhz for the us-counter (TC0/TC1) + // GCLK2: 8-48MHz from DFLL48M for Peripheral devices + // GCLK3: 8Mhz for the us-counter (TC0/TC1) // GCLK4: 32kHz from crystal, if present + // GCLK5: 48MHz from DFLL48M for USB // DPLL0: 48 - 200 MHz // Steps to set up clocks: @@ -136,6 +165,7 @@ void init_clocks(uint32_t cpu_freq) { // Setup GCLK2 to 48MHz for Peripherals // Setup GCLK3 to 8MHz for TC0/TC1 // Setup GCLK4 to 32kHz crystal, if present + // Setup GCLK5 to 48 MHz // Setup GCLK0 for 48MHz as default state to keep the MCU running during config change. GCLK->GENCTRL[0].reg = GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; @@ -238,7 +268,7 @@ void init_clocks(uint32_t cpu_freq) { peripheral_freq = DFLL48M_FREQ; // To be changed if CPU_FREQ < 48M - // Setup GCLK2 for DPLL1 output (48 MHz) + // Setup GCLK2 for DFLL48M output (48 MHz), may be scaled down later by calls to set_cpu_freq GCLK->GENCTRL[2].reg = GCLK_GENCTRL_DIV(1) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; while (GCLK->SYNCBUSY.bit.GENCTRL2) { } diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index b9de026ed425..d16b660645f3 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -69,9 +69,9 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { } else { #if defined(MCU_SAMD51) uint32_t freq = mp_obj_get_int(args[0]); - if (freq >= 48000000 && freq <= 200000000) { + if (freq >= 1000000 && freq <= 200000000) { set_cpu_freq(freq); - SysTick_Config(freq / 1000); + SysTick_Config(get_cpu_freq() / 1000); } #endif return mp_const_none; diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c index f4a27f3df740..113529aeea36 100644 --- a/ports/samd/samd_soc.c +++ b/ports/samd/samd_soc.c @@ -46,7 +46,7 @@ static void usb_init(void) { PM->APBBMASK.bit.USB_ = 1; uint8_t alt = 6; // alt G, USB #elif defined(MCU_SAMD51) - GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK2; + GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK5; while (GCLK->PCHCTRL[USB_GCLK_ID].bit.CHEN == 0) { } MCLK->AHBMASK.bit.USB_ = 1; From 1c32cec7f11864a9bc67f988e39e7dfc7c33188e Mon Sep 17 00:00:00 2001 From: robert-hh Date: Wed, 29 Jun 2022 17:22:20 +0200 Subject: [PATCH 021/823] samd/clock_config: Support changing machine.freq() for SAMD21. The range is 1MHz - 48 MHz. Note that below 8 MHz there is no USB support. The frequency will be set to an integer fraction of 48 MHz. And after changing the frequency, the peripherals like PWM, UART, I2C, SPI have to be reconfigured. Current consumption e.g. of the Seeed Xiao board at 1 MHz is about 1.5 mA, mostly caused by the on-board LED (green LED with 1k resistor at 3.3V). --- ports/samd/mcu/samd21/clock_config.c | 43 +++++++++++++++++++++------- ports/samd/mcu/samd21/mpconfigmcu.h | 1 + ports/samd/mcu/samd51/mpconfigmcu.h | 1 + ports/samd/modmachine.c | 4 +-- ports/samd/samd_soc.c | 2 +- 5 files changed, 36 insertions(+), 15 deletions(-) diff --git a/ports/samd/mcu/samd21/clock_config.c b/ports/samd/mcu/samd21/clock_config.c index 2402ed2e3107..204a5294f257 100644 --- a/ports/samd/mcu/samd21/clock_config.c +++ b/ports/samd/mcu/samd21/clock_config.c @@ -51,7 +51,36 @@ uint32_t get_peripheral_freq(void) { } void set_cpu_freq(uint32_t cpu_freq_arg) { - cpu_freq = cpu_freq_arg; + + // Set 1 waitstate to be safe + NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_MANW | NVMCTRL_CTRLB_RWS(1); + + int div = DFLL48M_FREQ / cpu_freq_arg; + peripheral_freq = cpu_freq = DFLL48M_FREQ / div; + + // Enable GCLK output: 48M on both CCLK0 and GCLK2 + GCLK->GENDIV.reg = GCLK_GENDIV_ID(0) | GCLK_GENDIV_DIV(div); + GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(0); + while (GCLK->STATUS.bit.SYNCBUSY) { + } + GCLK->GENDIV.reg = GCLK_GENDIV_ID(2) | GCLK_GENDIV_DIV(div); + GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(2); + while (GCLK->STATUS.bit.SYNCBUSY) { + } + if (cpu_freq >= 8000000) { + // Enable GCLK output: 48MHz on GCLK5 for USB + GCLK->GENDIV.reg = GCLK_GENDIV_ID(5) | GCLK_GENDIV_DIV(1); + GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(5); + while (GCLK->STATUS.bit.SYNCBUSY) { + } + } else { + // Disable GCLK output on GCLK5 for USB, since USB is not reliable below 8 Mhz. + GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(5); + while (GCLK->STATUS.bit.SYNCBUSY) { + } + } + // Set 0 waitstates for slower CPU clock + NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_MANW | NVMCTRL_CTRLB_RWS(cpu_freq > 24000000 ? 1 : 0); } void check_usb_recovery_mode(void) { @@ -76,6 +105,7 @@ void init_clocks(uint32_t cpu_freq) { // GCLK2: 48MHz from DFLL for Peripherals // GCLK3: 1Mhz for the us-counter (TC4/TC5) // GCLK4: 32kHz from crystal, if present + // GCLK5: 48MHz from DFLL for USB // GCLK8: 1kHz clock for WDT NVMCTRL->CTRLB.bit.MANW = 1; // errata "Spurious Writes" @@ -180,15 +210,7 @@ void init_clocks(uint32_t cpu_freq) { #endif // MICROPY_HW_XOSC32K - // Enable GCLK output: 48M on both CCLK0 and GCLK2 - GCLK->GENDIV.reg = GCLK_GENDIV_ID(0) | GCLK_GENDIV_DIV(1); - GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(0); - while (GCLK->STATUS.bit.SYNCBUSY) { - } - GCLK->GENDIV.reg = GCLK_GENDIV_ID(2) | GCLK_GENDIV_DIV(1); - GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(2); - while (GCLK->STATUS.bit.SYNCBUSY) { - } + set_cpu_freq(cpu_freq); // Enable GCLK output: 1MHz on GCLK3 for TC4 GCLK->GENDIV.reg = GCLK_GENDIV_ID(3) | GCLK_GENDIV_DIV(48); @@ -200,7 +222,6 @@ void init_clocks(uint32_t cpu_freq) { GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_OSCULP32K | GCLK_GENCTRL_ID(8); while (GCLK->STATUS.bit.SYNCBUSY) { } - } void enable_sercom_clock(int id) { diff --git a/ports/samd/mcu/samd21/mpconfigmcu.h b/ports/samd/mcu/samd21/mpconfigmcu.h index a84b31276b42..e0af60552b02 100644 --- a/ports/samd/mcu/samd21/mpconfigmcu.h +++ b/ports/samd/mcu/samd21/mpconfigmcu.h @@ -19,6 +19,7 @@ #define CPU_FREQ (48000000) #define DFLL48M_FREQ (48000000) +#define MAX_CPU_FREQ (48000000) #define IRQ_PRI_PENDSV ((1 << __NVIC_PRIO_BITS) - 1) diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index 19193992f058..819bc1bb11b7 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -26,6 +26,7 @@ unsigned long trng_random_u32(void); #define CPU_FREQ (120000000) #define DFLL48M_FREQ (48000000) +#define MAX_CPU_FREQ (200000000) #define DPLLx_REF_FREQ (32768) #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index d16b660645f3..21d700ac31ca 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -67,13 +67,11 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { if (n_args == 0) { return MP_OBJ_NEW_SMALL_INT(get_cpu_freq()); } else { - #if defined(MCU_SAMD51) uint32_t freq = mp_obj_get_int(args[0]); - if (freq >= 1000000 && freq <= 200000000) { + if (freq >= 1000000 && freq <= MAX_CPU_FREQ) { set_cpu_freq(freq); SysTick_Config(get_cpu_freq() / 1000); } - #endif return mp_const_none; } } diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c index 113529aeea36..6d8348ebcd83 100644 --- a/ports/samd/samd_soc.c +++ b/ports/samd/samd_soc.c @@ -41,7 +41,7 @@ static void usb_init(void) { // Init USB clock #if defined(MCU_SAMD21) - GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID_USB; + GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK5 | GCLK_CLKCTRL_ID_USB; PM->AHBMASK.bit.USB_ = 1; PM->APBBMASK.bit.USB_ = 1; uint8_t alt = 6; // alt G, USB From 64e3c351de0959660d1a6b691ee7dbf2de565fbe Mon Sep 17 00:00:00 2001 From: robert-hh Date: Wed, 29 Jun 2022 14:09:57 +0200 Subject: [PATCH 022/823] samd/modmachine: Add machine.reset_cause(). --- ports/samd/modmachine.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index 21d700ac31ca..db3f159cc2c3 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -139,6 +139,17 @@ STATIC mp_obj_t machine_enable_irq(mp_obj_t state_in) { } MP_DEFINE_CONST_FUN_OBJ_1(machine_enable_irq_obj, machine_enable_irq); +STATIC mp_obj_t machine_reset_cause(void) { + #if defined(MCU_SAMD21) + return MP_OBJ_NEW_SMALL_INT(PM->RCAUSE.reg); + #elif defined(MCU_SAMD51) + return MP_OBJ_NEW_SMALL_INT(RSTC->RCAUSE.reg); + #else + return MP_OBJ_NEW_SMALL_INT(0); + #endif +} +MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); + STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, @@ -165,8 +176,18 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, + { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) }, + + // Class constants. + // Use numerical constants instead of the symbolic names, + // since the names differ between SAMD21 and SAMD51. + { MP_ROM_QSTR(MP_QSTR_PWRON_RESET), MP_ROM_INT(0x01) }, + { MP_ROM_QSTR(MP_QSTR_HARD_RESET), MP_ROM_INT(0x10) }, + { MP_ROM_QSTR(MP_QSTR_WDT_RESET), MP_ROM_INT(0x20) }, + { MP_ROM_QSTR(MP_QSTR_SOFT_RESET), MP_ROM_INT(0x40) }, + { MP_ROM_QSTR(MP_QSTR_DEEPSLEEP_RESET), MP_ROM_INT(0x80) }, }; STATIC MP_DEFINE_CONST_DICT(machine_module_globals, machine_module_globals_table); From 0d3f0d7470586f9c328a047ac3043420df16d4ab Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 2 Jul 2022 18:12:55 +0200 Subject: [PATCH 023/823] samd/boards/SPARKFUN_SAMD51_THING_PLUS: Add board files for Thing Plus. That device uses an SAMD51J20 MCU with 256k RAM and 1024k flash. --- .../SPARKFUN_SAMD51_THING_PLUS/board.json | 21 ++++++++++ .../mpconfigboard.h | 4 ++ .../mpconfigboard.mk | 8 ++++ .../SPARKFUN_SAMD51_THING_PLUS/pins.csv | 42 +++++++++++++++++++ ports/samd/boards/samd51x20a.ld | 20 +++++++++ 5 files changed, 95 insertions(+) create mode 100644 ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json create mode 100644 ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h create mode 100644 ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.mk create mode 100644 ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv create mode 100644 ports/samd/boards/samd51x20a.ld diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json new file mode 100644 index 000000000000..af643f5c5f3c --- /dev/null +++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/board.json @@ -0,0 +1,21 @@ +{ + "deploy": [ + "../deploy.md" + ], + "docs": "", + "features": [ + "Battery Charging", + "Breadboard Friendly", + "Micro USB", + "QWIIC", + "SPI Flash" + ], + "images": [ + "sparkfun_samd51_thing_plus.jpg" + ], + "mcu": "samd51", + "product": "Sparkfun SAMD51 Thing Plus", + "thumbnail": "", + "url": "https://www.sparkfun.com/products/14713", + "vendor": "Sparkfun" +} diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h new file mode 100644 index 000000000000..e797ccca9da1 --- /dev/null +++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h @@ -0,0 +1,4 @@ +#define MICROPY_HW_BOARD_NAME "Sparkfun SAMD51 Thing Plus" +#define MICROPY_HW_MCU_NAME "SAMD51J20A" + +#define MICROPY_HW_XOSC32K (1) diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.mk b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.mk new file mode 100644 index 000000000000..9e5cf887dfce --- /dev/null +++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.mk @@ -0,0 +1,8 @@ +MCU_SERIES = SAMD51 +CMSIS_MCU = SAMD51J20A +LD_FILES = boards/samd51x20a.ld sections.ld +TEXT0 = 0x4000 + +# The ?='s allow overriding in mpconfigboard.mk. +# MicroPython settings +MICROPY_VFS_LFS1 ?= 1 diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv new file mode 100644 index 000000000000..b60fb909714e --- /dev/null +++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv @@ -0,0 +1,42 @@ +# Pin rows contain Pin number and pin name. +# Pin rows start with PIN_ +# LED rows start with LED_ +# If the pin name is omitted, the pin number is added as name. +# Rows for empty entries have to start with '-' +# Empty lines and lines not starting with PIN_ or LED_ are ignored + +PIN_PA13,D0 +PIN_PA12,D1 +PIN_PB23,RXD +PIN_PB22,TXD +PIN_PA06,D4 +PIN_PA15,D5 +PIN_PA20,D6 +PIN_PA21,D7 +- +PIN_PA07,D9 +PIN_PA18,D10 +PIN_PA16,D11 +PIN_PA19,D12 +PIN_PA17,D13 +PIN_PA02,A0 +PIN_PB08,A1 +PIN_PB09,A2 +PIN_PA04,A3 +PIN_PA05,A4 +PIN_PB02,A5 +PIN_PA22,SDA +PIN_PA23,SCL +PIN_PB12,MOSI +PIN_PB11,MISO +PIN_PB13,SCK +PIN_PA08,FLASH_MOSI +PIN_PA09,FLASH_SCK +PIN_PA10,FLASH_CS +PIN_PA11,FLASH_MISO +PIN_PA30,SWDCLK +PIN_PA31,SWDIO + +LED_PA17,LED +LED_PB03,RXLED +LED_PA27,TXLED diff --git a/ports/samd/boards/samd51x20a.ld b/ports/samd/boards/samd51x20a.ld new file mode 100644 index 000000000000..f0d5e5c6aeb6 --- /dev/null +++ b/ports/samd/boards/samd51x20a.ld @@ -0,0 +1,20 @@ +/* + GNU linker script for SAMD51x20 +*/ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00004000, LENGTH = 1024K - 16K + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 256K +} + +/* Top end of the stack, with room for double-tap variable */ +_estack = ORIGIN(RAM) + LENGTH(RAM) - 8; +_sstack = _estack - 16K; + +_oflash_fs = ORIGIN(FLASH) + 384K - 16K; +_sflash_fs = LENGTH(FLASH) - 384K + 16K - 1; + +_sheap = _ebss; +_eheap = _sstack; From a7113e95d78583a47f8074965e17d1e0499e0494 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 7 Jul 2022 09:49:51 +0200 Subject: [PATCH 024/823] samd/modmachine: Add machine.dht_readinto and enable on SAMD51. --- ports/samd/mcu/samd51/mpconfigmcu.h | 1 + ports/samd/mcu/samd51/mpconfigmcu.mk | 2 ++ ports/samd/modmachine.c | 4 ++++ ports/samd/mphalport.h | 3 +++ 4 files changed, 10 insertions(+) diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index 819bc1bb11b7..a266adf93cad 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -13,6 +13,7 @@ #define MP_NEED_LOG2 (1) #define MICROPY_PY_CMATH (0) +#define MICROPY_PY_MACHINE_DHT_READINTO (1) #define MICROPY_PY_UOS_URANDOM (1) #define MICROPY_PY_URANDOM_SEED_INIT_FUNC (trng_random_u32()) unsigned long trng_random_u32(void); diff --git a/ports/samd/mcu/samd51/mpconfigmcu.mk b/ports/samd/mcu/samd51/mpconfigmcu.mk index f8ed02f841d9..ed4df82c6912 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.mk +++ b/ports/samd/mcu/samd51/mpconfigmcu.mk @@ -2,6 +2,8 @@ MICROPY_VFS_LFS2 ?= 1 SRC_S += shared/runtime/gchelper_m3.s +SRC_C += drivers/dht/dht.c \ + LIBM_SRC_C += $(addprefix lib/libm/,\ acoshf.c \ asinfacosf.c \ diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index db3f159cc2c3..14baf279d549 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -30,6 +30,7 @@ #include "extmod/machine_pulse.h" #include "extmod/machine_i2c.h" #include "extmod/machine_spi.h" +#include "drivers/dht/dht.h" #include "modmachine.h" #include "samd_soc.h" @@ -179,6 +180,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) }, + #if MICROPY_PY_MACHINE_DHT_READINTO + { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) }, + #endif // Class constants. // Use numerical constants instead of the symbolic names, diff --git a/ports/samd/mphalport.h b/ports/samd/mphalport.h index 6f4f838cfba2..3879240f9a6a 100644 --- a/ports/samd/mphalport.h +++ b/ports/samd/mphalport.h @@ -99,6 +99,9 @@ static inline uint64_t mp_hal_time_ns(void) { #define MP_HAL_PIN_FMT "%u" #define mp_hal_pin_obj_t uint +#define mp_hal_quiet_timing_enter() MICROPY_BEGIN_ATOMIC_SECTION() +#define mp_hal_quiet_timing_exit(irq_state) MICROPY_END_ATOMIC_SECTION(irq_state) + extern uint32_t machine_pin_open_drain_mask[]; mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t pin_in); From fe31fca462011785cf78b4730bf34bb552e9a707 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Tue, 21 Jun 2022 14:27:20 +0200 Subject: [PATCH 025/823] samd/mcu/samd51: Enable onewire support for SAMD51. --- ports/samd/mcu/samd51/mpconfigmcu.h | 1 + 1 file changed, 1 insertion(+) diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index a266adf93cad..5735f512b5a7 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -14,6 +14,7 @@ #define MICROPY_PY_CMATH (0) #define MICROPY_PY_MACHINE_DHT_READINTO (1) +#define MICROPY_PY_ONEWIRE (1) #define MICROPY_PY_UOS_URANDOM (1) #define MICROPY_PY_URANDOM_SEED_INIT_FUNC (trng_random_u32()) unsigned long trng_random_u32(void); From 4c9e4c3310faff5ec05b183454df88d0f33f9e78 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sun, 10 Jul 2022 12:04:14 +0200 Subject: [PATCH 026/823] samd/mcu/samd51: Enable FAT support for SAMD51. Tested with a SD card connected to a SAMD51 board. The SEEED WIO terminal has a SD-Card reader built-in. Also a side change to remove a few obsolete lines from Makefile. --- ports/samd/Makefile | 4 --- ports/samd/fatfs_port.c | 41 ++++++++++++++++++++++++++++ ports/samd/mcu/samd51/mpconfigmcu.h | 6 ++++ ports/samd/mcu/samd51/mpconfigmcu.mk | 5 +++- ports/samd/modutime.c | 2 +- 5 files changed, 52 insertions(+), 6 deletions(-) create mode 100644 ports/samd/fatfs_port.c diff --git a/ports/samd/Makefile b/ports/samd/Makefile index 2f97b1993e99..abec4e83a553 100644 --- a/ports/samd/Makefile +++ b/ports/samd/Makefile @@ -61,7 +61,6 @@ CFLAGS_MCU_SAMD51 = -mtune=cortex-m4 -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-a CFLAGS += $(INC) -Wall -Werror -std=c99 -nostdlib -mthumb $(CFLAGS_MCU_$(MCU_SERIES)) -fsingle-precision-constant -Wdouble-promotion CFLAGS += -DMCU_$(MCU_SERIES) -D__$(CMSIS_MCU)__ CFLAGS += $(CFLAGS_EXTRA) -CFLAGS += -DMPCONFIG_MCU_H='' LDFLAGS += -nostdlib $(addprefix -T,$(LD_FILES)) -Map=$@.map --cref @@ -169,9 +168,6 @@ CFLAGS += -DMICROPY_MODULE_FROZEN_STR CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool endif -# Workaround for bug in older gcc, warning on "static usbd_device_t _usbd_dev = { 0 };" -$(BUILD)/lib/tinyusb/src/device/usbd.o: CFLAGS += -Wno-missing-braces - all: $(BUILD)/firmware.uf2 $(BUILD)/firmware.elf: $(OBJ) diff --git a/ports/samd/fatfs_port.c b/ports/samd/fatfs_port.c new file mode 100644 index 000000000000..9ee1764ebc0a --- /dev/null +++ b/ports/samd/fatfs_port.c @@ -0,0 +1,41 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2013, 2014 Damien P. George + * Copyright (c) 2021 Robert Hammelrath + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "mphalport.h" +#include "py/runtime.h" +#include "shared/timeutils/timeutils.h" +#include "lib/oofatfs/ff.h" + +extern uint32_t time_offset; + +MP_WEAK DWORD get_fattime(void) { + timeutils_struct_time_t tm; + + timeutils_seconds_since_epoch_to_struct_time(mp_hal_ticks_ms_64() / 1000 + time_offset, &tm); + return ((tm.tm_year - 1980) << 25) | ((tm.tm_mon) << 21) | ((tm.tm_mday) << 16) | + ((tm.tm_hour) << 11) | ((tm.tm_min) << 5) | (tm.tm_sec / 2); +} diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index 5735f512b5a7..686cfd6104df 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -22,6 +22,12 @@ unsigned long trng_random_u32(void); // Due to a limitation in the TC counter for us, the ticks period is 2**29 #define MICROPY_PY_UTIME_TICKS_PERIOD (0x20000000) +// fatfs configuration used in ffconf.h +#define MICROPY_FATFS_ENABLE_LFN (1) +#define MICROPY_FATFS_RPATH (2) +#define MICROPY_FATFS_MAX_SS (4096) +#define MICROPY_FATFS_LFN_CODE_PAGE 437 /* 1=SFN/ANSI 437=LFN/U.S.(OEM) */ + #define VFS_BLOCK_SIZE_BYTES (1536) // #define MICROPY_HW_UART_TXBUF (1) diff --git a/ports/samd/mcu/samd51/mpconfigmcu.mk b/ports/samd/mcu/samd51/mpconfigmcu.mk index ed4df82c6912..305e780b8787 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.mk +++ b/ports/samd/mcu/samd51/mpconfigmcu.mk @@ -1,8 +1,11 @@ MICROPY_VFS_LFS2 ?= 1 +MICROPY_VFS_FAT ?= 1 SRC_S += shared/runtime/gchelper_m3.s -SRC_C += drivers/dht/dht.c \ +SRC_C += \ + fatfs_port.c \ + drivers/dht/dht.c \ LIBM_SRC_C += $(addprefix lib/libm/,\ acoshf.c \ diff --git a/ports/samd/modutime.c b/ports/samd/modutime.c index a54544e62c6c..4169c15d9117 100644 --- a/ports/samd/modutime.c +++ b/ports/samd/modutime.c @@ -29,7 +29,7 @@ #include "shared/timeutils/timeutils.h" #include "mphalport.h" -static uint32_t time_offset = 0; +uint32_t time_offset = 0; // localtime([secs]) STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { From 03075a68399a6450fd0e238dd75314805f8365b7 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Mon, 1 Aug 2022 17:23:11 +0200 Subject: [PATCH 027/823] samd/modmachine: Implement machine.lightsleep(). Which just sets the CPU clock to 200kHz and switches the peripheral clock off. There are two modes: machine.lightsleep(duration_ms) and machine.lightsleep() In any mode any configured pin.irq() event will terminate the sleep. Current consumption in lightsleep for some boards: - 1.5 - 2.5 mA when supplied trough an active USB (Seeed XIAO w/o power LED, Adafruit ItsyBitsy) - 0.8 - 2 mA when supplied through Gnd/+5V (Vusb) (Seeed XIAO w/o power LED, Adafruit ItsyBitsy) - < 1 mA for SAMD51 when supplied trough a battery connector (Sparkfun Thing SAMD51 plus) Related change: move the calls to SysTick_Config() into set_cpu_freq(). It is required after each CPU freq change to have ticks_ms run at the proper rate. --- ports/samd/machine_pin.c | 3 ++ ports/samd/mcu/samd21/clock_config.c | 1 + ports/samd/mcu/samd51/clock_config.c | 1 + ports/samd/modmachine.c | 61 +++++++++++++++++++++++++++- ports/samd/samd_soc.c | 1 - 5 files changed, 65 insertions(+), 2 deletions(-) diff --git a/ports/samd/machine_pin.c b/ports/samd/machine_pin.c index fc72c8f7569f..2dc10f9b4634 100644 --- a/ports/samd/machine_pin.c +++ b/ports/samd/machine_pin.c @@ -57,6 +57,8 @@ typedef struct _machine_pin_irq_obj_t { STATIC const mp_irq_methods_t machine_pin_irq_methods; +bool EIC_occured; + uint32_t machine_pin_open_drain_mask[4]; // Open drain behaviour is simulated. @@ -410,6 +412,7 @@ void EIC_Handler() { for (int eic_id = 0; eic_id < 16; eic_id++, mask <<= 1) { // Did the ISR fire? if (isr & mask) { + EIC_occured = true; EIC->INTFLAG.reg |= mask; // clear the ISR flag machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]); if (irq != NULL) { diff --git a/ports/samd/mcu/samd21/clock_config.c b/ports/samd/mcu/samd21/clock_config.c index 204a5294f257..a4011c05cbbc 100644 --- a/ports/samd/mcu/samd21/clock_config.c +++ b/ports/samd/mcu/samd21/clock_config.c @@ -81,6 +81,7 @@ void set_cpu_freq(uint32_t cpu_freq_arg) { } // Set 0 waitstates for slower CPU clock NVMCTRL->CTRLB.reg = NVMCTRL_CTRLB_MANW | NVMCTRL_CTRLB_RWS(cpu_freq > 24000000 ? 1 : 0); + SysTick_Config(cpu_freq / 1000); } void check_usb_recovery_mode(void) { diff --git a/ports/samd/mcu/samd51/clock_config.c b/ports/samd/mcu/samd51/clock_config.c index 9fb48705adcb..f67d297e8eb1 100644 --- a/ports/samd/mcu/samd51/clock_config.c +++ b/ports/samd/mcu/samd51/clock_config.c @@ -112,6 +112,7 @@ void set_cpu_freq(uint32_t cpu_freq_arg) { while (GCLK->SYNCBUSY.bit.GENCTRL5) { } } + SysTick_Config(cpu_freq / 1000); } void check_usb_recovery_mode(void) { diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index 14baf279d549..2a8e34a966a8 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -50,6 +50,10 @@ #define DBL_TAP_MAGIC_LOADER 0xf01669ef #define DBL_TAP_MAGIC_RESET 0xf02669ef +#define LIGHTSLEEP_CPU_FREQ 200000 + +extern bool EIC_occured; + STATIC mp_obj_t machine_reset(void) { *DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET; NVIC_SystemReset(); @@ -71,7 +75,6 @@ STATIC mp_obj_t machine_freq(size_t n_args, const mp_obj_t *args) { uint32_t freq = mp_obj_get_int(args[0]); if (freq >= 1000000 && freq <= MAX_CPU_FREQ) { set_cpu_freq(freq); - SysTick_Config(get_cpu_freq() / 1000); } return mp_const_none; } @@ -151,6 +154,60 @@ STATIC mp_obj_t machine_reset_cause(void) { } MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_cause_obj, machine_reset_cause); +STATIC mp_obj_t machine_lightsleep(size_t n_args, const mp_obj_t *args) { + int32_t duration = -1; + uint32_t freq = get_cpu_freq(); + if (n_args > 0) { + duration = mp_obj_get_int(args[0]); + } + EIC_occured = false; + // Slow down + set_cpu_freq(LIGHTSLEEP_CPU_FREQ); + #if defined(MCU_SAMD21) + // Switch the peripheral clock off + GCLK->GENCTRL.reg = GCLK_GENCTRL_ID(2); + while (GCLK->STATUS.bit.SYNCBUSY) { + } + // Switch the EIC temporarily to GCLK3, since GCLK2 is off + GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | EIC_GCLK_ID; + if (duration > 0) { + uint32_t t0 = systick_ms; + while ((systick_ms - t0 < duration) && (EIC_occured == false)) { + __WFI(); + } + } else { + while (EIC_occured == false) { + __WFI(); + } + } + GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK2 | EIC_GCLK_ID; + + #elif defined(MCU_SAMD51) + // Switch the peripheral clock off + GCLK->GENCTRL[2].reg = 0; + while (GCLK->SYNCBUSY.bit.GENCTRL2) { + } + // Switch the EIC temporarily to GCLK3, since GCLK2 is off + GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK3; + if (duration > 0) { + uint32_t t0 = systick_ms; + while ((systick_ms - t0 < duration) && (EIC_occured == false)) { + __WFI(); + } + } else { + while (EIC_occured == false) { + __WFI(); + } + } + GCLK->PCHCTRL[EIC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK2; + + #endif + // Speed up again + set_cpu_freq(freq); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine_lightsleep); + STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, @@ -179,6 +236,8 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_enable_irq), MP_ROM_PTR(&machine_enable_irq_obj) }, { MP_ROM_QSTR(MP_QSTR_reset_cause), MP_ROM_PTR(&machine_reset_cause_obj) }, { MP_ROM_QSTR(MP_QSTR_time_pulse_us), MP_ROM_PTR(&machine_time_pulse_us_obj) }, + { MP_ROM_QSTR(MP_QSTR_lightsleep), MP_ROM_PTR(&machine_lightsleep_obj) }, + { MP_ROM_QSTR(MP_QSTR_bitstream), MP_ROM_PTR(&machine_bitstream_obj) }, #if MICROPY_PY_MACHINE_DHT_READINTO { MP_ROM_QSTR(MP_QSTR_dht_readinto), MP_ROM_PTR(&dht_readinto_obj) }, diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c index 6d8348ebcd83..3608306e8719 100644 --- a/ports/samd/samd_soc.c +++ b/ports/samd/samd_soc.c @@ -108,7 +108,6 @@ void init_us_counter(void) { void samd_init(void) { init_clocks(get_cpu_freq()); - SysTick_Config(get_cpu_freq() / 1000); init_us_counter(); usb_init(); check_usb_recovery_mode(); From f0399d35e4f7ad4e48b22f02b80a7ee506c9ec64 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 11 Aug 2022 11:22:58 +0200 Subject: [PATCH 028/823] samd/modmachine: Get the bootloader magic address from the lib. Instead of being hard-coded, and then it works for all MCUs. That fits except for a Sparkfun SAMD51 Thing Plus (known) bug, which uses 192k - 4 as magic address. Therefore, that address is set as well to avoid a problem when this bug is fixed by Sparkfun. --- .../SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h | 6 ++++++ ports/samd/modmachine.c | 14 +++++++++++--- 2 files changed, 17 insertions(+), 3 deletions(-) diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h index e797ccca9da1..a51b71c363e1 100644 --- a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h +++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/mpconfigboard.h @@ -2,3 +2,9 @@ #define MICROPY_HW_MCU_NAME "SAMD51J20A" #define MICROPY_HW_XOSC32K (1) + +// There seems to be an inconsistency in the SAMD51 Thing bootloader in that +// the bootloader magic address is at the end of a 192k RAM area, instead of +// 256k. Since the SAMD51x20A has 256k RAM, the loader symbol is at that address +// and so there is a fix here using the previous definition. +#define DBL_TAP_ADDR_ALT ((volatile uint32_t *)(HSRAM_ADDR + HSRAM_SIZE - 0x10000 - 4)) diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index 2a8e34a966a8..ce5fef76f753 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -41,21 +41,26 @@ #include "hpl_pm_base.h" #if MICROPY_PY_MACHINE - #if defined(MCU_SAMD21) -#define DBL_TAP_ADDR ((volatile uint32_t *)(0x20000000 + 32 * 1024 - 4)) +#define DBL_TAP_ADDR ((volatile uint32_t *)(HMCRAMC0_ADDR + HMCRAMC0_SIZE - 4)) #elif defined(MCU_SAMD51) -#define DBL_TAP_ADDR ((volatile uint32_t *)(0x20000000 + 192 * 1024 - 4)) +#define DBL_TAP_ADDR ((volatile uint32_t *)(HSRAM_ADDR + HSRAM_SIZE - 4)) #endif +// A board may define a DPL_TAP_ADDR_ALT, which will be set as well +// Needed at the moment for Sparkfun SAMD51 Thing Plus #define DBL_TAP_MAGIC_LOADER 0xf01669ef #define DBL_TAP_MAGIC_RESET 0xf02669ef #define LIGHTSLEEP_CPU_FREQ 200000 extern bool EIC_occured; +extern uint32_t _dbl_tap_addr; STATIC mp_obj_t machine_reset(void) { *DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET; + #ifdef DBL_TAP_ADDR_ALT + *DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_RESET; + #endif NVIC_SystemReset(); return mp_const_none; } @@ -63,6 +68,9 @@ MP_DEFINE_CONST_FUN_OBJ_0(machine_reset_obj, machine_reset); STATIC mp_obj_t machine_bootloader(void) { *DBL_TAP_ADDR = DBL_TAP_MAGIC_LOADER; + #ifdef DBL_TAP_ADDR_ALT + *DBL_TAP_ADDR_ALT = DBL_TAP_MAGIC_LOADER; + #endif NVIC_SystemReset(); return mp_const_none; } From ddd41b8bbf6823ea730e781d508babbecdd41304 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 13 Aug 2022 17:33:04 +0200 Subject: [PATCH 029/823] samd/clock_config: Document the #defines use in init_clocks(). Which may be set in the respective mpconfigboard.h files. --- ports/samd/mcu/samd21/clock_config.c | 34 +++++++++++++++++++++++ ports/samd/mcu/samd51/clock_config.c | 40 ++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) diff --git a/ports/samd/mcu/samd21/clock_config.c b/ports/samd/mcu/samd21/clock_config.c index a4011c05cbbc..a195cb692053 100644 --- a/ports/samd/mcu/samd21/clock_config.c +++ b/ports/samd/mcu/samd21/clock_config.c @@ -96,6 +96,40 @@ void check_usb_recovery_mode(void) { #endif // MICROPY_HW_XOSC32K } +// Purpose of the #defines for the clock configuration. +// +// Both CPU and periperal devices are clocked by the DFLL48M clock. +// DFLL48M is either free running, or controlled by the 32kHz crystal, or +// Synchronized with the USB clock. +// +// #define MICROPY_HW_XOSC32K (0 | 1) +// +// If MICROPY_HW_XOSC32K = 1, the 32kHz crystal is used as input for GCLK 1, which +// serves as refernce clock source for the DFLL48M oscillator, +// The crystal is used, unless MICROPY_HW_MCU_OSC32KULP is set. +// In that case GCLK1 (and the CPU clock) is driven by the 32K Low power oscillator. +// The reason for offering this option is a design flaw of the Adafruit +// Feather boards, where the RGB Led and Debug signals interfere with the +// crystal, causing the CPU to fail if it is driven by the crystal. +// +// If MICROPY_HW_XOSC32K = 0, the 32kHz signal for GCLK1 (and the CPU) is +// created by dividing the 48MHz clock of DFLL48M, but not used otherwise. +// +// If MICROPY_HW_DFLL_USB_SYNC = 0, the DFLL48M oscillator is free running using +// the pre-configured trim values. In that mode, the peripheral clock is +// not exactly 48Mhz and has a substantional temperature drift. +// +// If MICROPY_HW_DFLL_USB_SYNC = 1, the DFLL48 is synchronized with the 1 kHz USB sync +// signal. If after boot there is no USB sync withing 500ms, the configuratuion falls +// back to a free running 48Mhz oscillator. +// +// In all modes, the 48MHz signal has a substantial jitter, largest when +// MICROPY_HW_DFLL_USB_SYNC is active. That is caused by the repective +// reference frequencies of 32kHz or 1 kHz being low. That affects most +// PWM. Std Dev at 1kHz 0.156Hz (w. Crystal) up to 0.4 Hz (with USB sync). +// +// If none of the mentioned defines is set, the device uses the internal oscillators. + void init_clocks(uint32_t cpu_freq) { dfll48m_calibration = 0; // please the compiler diff --git a/ports/samd/mcu/samd51/clock_config.c b/ports/samd/mcu/samd51/clock_config.c index f67d297e8eb1..3bc4616de9e9 100644 --- a/ports/samd/mcu/samd51/clock_config.c +++ b/ports/samd/mcu/samd51/clock_config.c @@ -142,6 +142,46 @@ void check_usb_recovery_mode(void) { #endif // MICROPY_HW_XOSC32K } +// Purpose of the #defines for the clock configuration. +// +// The CPU clock is generated by DPLL0, which takes 32768 Hz as reference frequency, +// supplied through GCLK1. +// +// DFLL48M is used for the peripheral clock, e.g. for PWM, UART, SPI, I2C. +// DFLL48M is either free running, or controlled by the 32kHz crystal, or +// Synchronized with the USB clock. +// +// GCLK1 takes it's input either from the 32kHz crystal, the internal low power +// RC oscillator or from DFLL48M. +// +// #define MICROPY_HW_XOSC32K (0 | 1) +// +// If MICROPY_HW_XOSC32K = 1, the 32kHz crystal is used for the DFLL48M oscillator +// and for GCLK1, feeding the CPU, unless MICROPY_HW_MCU_OSC32KULP is set. +// In that case GCLK1 (and the CPU clock) is driven by the 32K Low power oscillator. +// The reason for offering this option is a design flaw of the Adafruit +// Feather boards, where the RGB Led and Debug signals interfere with the +// crystal, causing the CPU to fail if it is driven by the crystal. The +// peripheral devices are affected as well, but continue it's operation. +// +// If MICROPY_HW_XOSC32K = 0, the 32kHz signal for GCLK1 (and the CPU) is +// created by dividing the 48MHz clock of DFLL48M. +// +// If MICROPY_HW_DFLL_USB_SYNC = 0, the DFLL48M oscillator is free running using +// the pre-configured trim values. In that mode, the peripheral clock is +// not exactly 48Mhz and has a substantional temperature drift. +// +// If MICROPY_HW_DFLL_USB_SYNC = 1, the DFLL48 is synchronized with the 1 kHz USB sync +// signal. If after boot there is no USB sync withing 500ms, the configuratuion falls +// back to a free running 48Mhz oscillator. +// +// In all modes, the 48MHz signal has a substantial jitter, largest when +// MICROPY_HW_DFLL_USB_SYNC is active. That is caused by the repective +// reference frequencies of 32kHz or 1 kHz being low. That affects most +// PWM. Std Dev at 1kHz 0.156Hz (w. Crystal) up to 0.4 Hz (with USB sync). +// +// If none of the mentioned defines is set, the device uses the internal oscillators. + void init_clocks(uint32_t cpu_freq) { dfll48m_calibration = 0; // please the compiler From 2251cb774b7b7db12323a32b339903fa27ff7b08 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 18 Aug 2022 11:58:09 +0200 Subject: [PATCH 030/823] samd/machine_uart: Implement uart.txdone() and uart.flush(). Using the stream method for uart.flush(). uart.txdone() returns True, if the uart not busy, False otherwise. uart.flush() waits until all bytes have been transmitted or a timeout triggers. The timeout is determined by the buffer size and the baud rate. Also fix two inconsistencies when not using txbuf: - Report in ioctl as being writeable if there is room in the tx buffer, only if it is configured. - Print the txbuf size if configured. --- ports/samd/machine_uart.c | 53 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 49 insertions(+), 4 deletions(-) diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c index 1031f26c2648..76b564e874a6 100644 --- a/ports/samd/machine_uart.c +++ b/ports/samd/machine_uart.c @@ -116,9 +116,17 @@ void sercom_enable(Sercom *uart, int state) { STATIC void machine_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=%s, stop=%u, " - "timeout=%u, timeout_char=%u, rxbuf=%d)", + "timeout=%u, timeout_char=%u, rxbuf=%d" + #if MICROPY_HW_UART_TXBUF + ", txbuf=%d" + #endif + ")", self->id, self->baudrate, self->bits, _parity_name[self->parity], - self->stop + 1, self->timeout, self->timeout_char, self->read_buffer.size - 1); + self->stop + 1, self->timeout, self->timeout_char, self->read_buffer.size - 1 + #if MICROPY_HW_UART_TXBUF + , self->write_buffer.size - 1 + #endif + ); } STATIC mp_obj_t machine_uart_init_helper(machine_uart_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { @@ -385,6 +393,22 @@ STATIC mp_obj_t machine_uart_sendbreak(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_sendbreak_obj, machine_uart_sendbreak); +STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) { + machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); + Sercom *uart = sercom_instance[self->id]; + + if (uart->USART.INTFLAG.bit.DRE + #if MICROPY_HW_UART_TXBUF + && ringbuf_avail(&self->write_buffer) == 0 + #endif + && uart->USART.INTFLAG.bit.TXC) { + return mp_const_true; + } else { + return mp_const_false; + } +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone); + void uart_deinit_all(void) { for (int i = 0; i < SERCOM_INST_NUM; i++) { if (uart_table[i] != NULL) { @@ -399,7 +423,9 @@ STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_any), MP_ROM_PTR(&machine_uart_any_obj) }, { MP_ROM_QSTR(MP_QSTR_sendbreak), MP_ROM_PTR(&machine_uart_sendbreak_obj) }, + { MP_ROM_QSTR(MP_QSTR_txdone), MP_ROM_PTR(&machine_uart_txdone_obj) }, + { MP_ROM_QSTR(MP_QSTR_flush), MP_ROM_PTR(&mp_stream_flush_obj) }, { MP_ROM_QSTR(MP_QSTR_read), MP_ROM_PTR(&mp_stream_read_obj) }, { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, @@ -414,7 +440,6 @@ STATIC mp_uint_t machine_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t siz uint8_t *dest = buf_in; Sercom *uart = sercom_instance[self->id]; - // t.b.d. Cater timeout for timer wrap after 50 days. for (size_t i = 0; i < size; i++) { // Wait for the first/next character while (ringbuf_avail(&self->read_buffer) == 0) { @@ -488,9 +513,29 @@ STATIC mp_uint_t machine_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint if ((flags & MP_STREAM_POLL_RD) && (uart->USART.INTFLAG.bit.RXC != 0 || ringbuf_avail(&self->read_buffer) > 0)) { ret |= MP_STREAM_POLL_RD; } - if ((flags & MP_STREAM_POLL_WR) && (uart->USART.INTFLAG.bit.DRE != 0)) { + if ((flags & MP_STREAM_POLL_WR) && (uart->USART.INTFLAG.bit.DRE != 0 + #if MICROPY_HW_UART_TXBUF + || ringbuf_avail(&self->write_buffer) > 0 + #endif + )) { ret |= MP_STREAM_POLL_WR; } + } else if (request == MP_STREAM_FLUSH) { + // The timeout is defined by the buffer size and the baudrate. + // Take the worst case assumtions at 13 bit symbol size times 2. + uint64_t timeout = mp_hal_ticks_ms_64() + (3 + #if MICROPY_HW_UART_TXBUF + + self->write_buffer.size + #endif + ) * 13000 * 2 / self->baudrate; + do { + if (machine_uart_txdone((mp_obj_t)self) == mp_const_true) { + return 0; + } + MICROPY_EVENT_POLL_HOOK + } while (mp_hal_ticks_ms_64() < timeout); + *errcode = MP_ETIMEDOUT; + ret = MP_STREAM_ERROR; } else { *errcode = MP_EINVAL; ret = MP_STREAM_ERROR; From be31fde012e0cf522ec9d70f50923a0a899f438c Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 8 Sep 2022 17:55:08 +0200 Subject: [PATCH 031/823] samd/mcu: Make some settings in mpconfigmcu.h conditional. And set the default for MICROPY_PY_MATH as 1 for both MCU types. --- ports/samd/mcu/samd21/mpconfigmcu.h | 13 ++++++++++++- ports/samd/mcu/samd21/mpconfigmcu.mk | 29 ++++++++++++++++++++++++++++ ports/samd/mcu/samd51/mpconfigmcu.h | 11 +++++++++++ 3 files changed, 52 insertions(+), 1 deletion(-) diff --git a/ports/samd/mcu/samd21/mpconfigmcu.h b/ports/samd/mcu/samd21/mpconfigmcu.h index e0af60552b02..8d155f93ab03 100644 --- a/ports/samd/mcu/samd21/mpconfigmcu.h +++ b/ports/samd/mcu/samd21/mpconfigmcu.h @@ -9,13 +9,24 @@ #define MICROPY_MODULE_BUILTIN_INIT (1) #define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) + +#ifndef MICROPY_PY_BUILTINS_COMPLEX #define MICROPY_PY_BUILTINS_COMPLEX (0) -#define MICROPY_PY_MATH (0) +#endif + +#ifndef MICROPY_PY_MATH +#define MICROPY_PY_MATH (1) +#endif + +#ifndef MICROPY_PY_CMATH #define MICROPY_PY_CMATH (0) +#endif #define VFS_BLOCK_SIZE_BYTES (1536) // 24x 64B flash pages; +#ifndef MICROPY_HW_UART_TXBUF #define MICROPY_HW_UART_TXBUF (1) +#endif #define CPU_FREQ (48000000) #define DFLL48M_FREQ (48000000) diff --git a/ports/samd/mcu/samd21/mpconfigmcu.mk b/ports/samd/mcu/samd21/mpconfigmcu.mk index cc435da8cc91..287d6d18be7b 100644 --- a/ports/samd/mcu/samd21/mpconfigmcu.mk +++ b/ports/samd/mcu/samd21/mpconfigmcu.mk @@ -1 +1,30 @@ SRC_S += shared/runtime/gchelper_m0.s + +LIBM_SRC_C += $(addprefix lib/libm/,\ + acoshf.c \ + asinfacosf.c \ + asinhf.c \ + atan2f.c \ + atanf.c \ + atanhf.c \ + ef_rem_pio2.c \ + erf_lgamma.c \ + fmodf.c \ + kf_cos.c \ + kf_rem_pio2.c \ + kf_sin.c \ + kf_tan.c \ + log1pf.c \ + math.c \ + nearbyintf.c \ + roundf.c \ + sf_cos.c \ + sf_erf.c \ + sf_frexp.c \ + sf_ldexp.c \ + sf_modf.c \ + sf_sin.c \ + sf_tan.c \ + wf_lgamma.c \ + wf_tgamma.c \ + ) diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index 686cfd6104df..666370c983b7 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -8,10 +8,19 @@ #define MICROPY_EMIT_INLINE_THUMB (1) #define MICROPY_FLOAT_IMPL (MICROPY_FLOAT_IMPL_FLOAT) + +#ifndef MICROPY_PY_BUILTINS_COMPLEX #define MICROPY_PY_BUILTINS_COMPLEX (0) +#endif + +#ifndef MICROPY_PY_MATH #define MICROPY_PY_MATH (1) #define MP_NEED_LOG2 (1) +#endif + +#ifndef MICROPY_PY_CMATH #define MICROPY_PY_CMATH (0) +#endif #define MICROPY_PY_MACHINE_DHT_READINTO (1) #define MICROPY_PY_ONEWIRE (1) @@ -30,7 +39,9 @@ unsigned long trng_random_u32(void); #define VFS_BLOCK_SIZE_BYTES (1536) // +#ifndef MICROPY_HW_UART_TXBUF #define MICROPY_HW_UART_TXBUF (1) +#endif #define CPU_FREQ (120000000) #define DFLL48M_FREQ (48000000) From fc9d66fac64422a6a6ea4a79bfd8b2460cc8e9e8 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 15 Sep 2022 15:58:54 +0200 Subject: [PATCH 032/823] samd/machine_rtc: Add the machine.RTC class. Methods implemented are: - rtc.init(date) - rtc.datetime([new_date]) - rtc.calibration(value) The presence of this class can be controlled by MICROPY_PY_MACHINE_RTC. If the RTC module is used, the time module uses the RTC as well. For boards without a 32kHz crystal, using RTC makes no sense, since it will then use the ULP32K oscillator, which is not precise at all. Therefore, it will by default only be enabled for boards using a crystal, but can be enabled in the respective mpconfigboard.h. --- ports/samd/Makefile | 1 + ports/samd/fatfs_port.c | 6 +- ports/samd/machine_rtc.c | 181 +++++++++++++++++++++++++++ ports/samd/mcu/samd21/clock_config.c | 17 ++- ports/samd/mcu/samd21/mpconfigmcu.h | 6 + ports/samd/mcu/samd51/clock_config.c | 20 +-- ports/samd/mcu/samd51/mpconfigmcu.h | 6 + ports/samd/modmachine.c | 3 + ports/samd/modmachine.h | 3 + ports/samd/modutime.c | 30 ++++- ports/samd/samd_soc.c | 7 ++ 11 files changed, 263 insertions(+), 17 deletions(-) create mode 100644 ports/samd/machine_rtc.c diff --git a/ports/samd/Makefile b/ports/samd/Makefile index abec4e83a553..e6e592a0352b 100644 --- a/ports/samd/Makefile +++ b/ports/samd/Makefile @@ -94,6 +94,7 @@ SRC_C += \ machine_i2c.c \ machine_led.c \ machine_pin.c \ + machine_rtc.c \ machine_spi.c \ machine_timer.c \ machine_uart.c \ diff --git a/ports/samd/fatfs_port.c b/ports/samd/fatfs_port.c index 9ee1764ebc0a..a3e3f1b67b3a 100644 --- a/ports/samd/fatfs_port.c +++ b/ports/samd/fatfs_port.c @@ -33,9 +33,13 @@ extern uint32_t time_offset; MP_WEAK DWORD get_fattime(void) { + #if MICROPY_PY_MACHINE_RTC + return (RTC->MODE2.CLOCK.reg >> 1) + (20 << 25); + #else + extern void rtc_gettime(timeutils_struct_time_t *tm); timeutils_struct_time_t tm; - timeutils_seconds_since_epoch_to_struct_time(mp_hal_ticks_ms_64() / 1000 + time_offset, &tm); return ((tm.tm_year - 1980) << 25) | ((tm.tm_mon) << 21) | ((tm.tm_mday) << 16) | ((tm.tm_hour) << 11) | ((tm.tm_min) << 5) | (tm.tm_sec / 2); + #endif } diff --git a/ports/samd/machine_rtc.c b/ports/samd/machine_rtc.c new file mode 100644 index 000000000000..57bfa998e583 --- /dev/null +++ b/ports/samd/machine_rtc.c @@ -0,0 +1,181 @@ +/* + * This file is part of the MicroPython project, http://micropython.org/ + * + * The MIT License (MIT) + * + * Copyright (c) 2021 Damien P. George + * Copyright (c) 2022 "Robert Hammelrath" + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "py/runtime.h" +#include "shared/timeutils/timeutils.h" +#include "modmachine.h" +#include "py/mphal.h" +#include "sam.h" + +#if MICROPY_PY_MACHINE_RTC + +typedef struct _machine_rtc_obj_t { + mp_obj_base_t base; + mp_obj_t callback; +} machine_rtc_obj_t; + +// Singleton RTC object. +STATIC const machine_rtc_obj_t machine_rtc_obj = {{&machine_rtc_type}}; + +// Start the RTC Timer. +void machine_rtc_start(bool force) { + #if defined(MCU_SAMD21) + + if (RTC->MODE2.CTRL.bit.ENABLE == 0 || force) { + // Enable the 1k Clock + GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK8 | GCLK_CLKCTRL_ID_RTC; + + RTC->MODE2.CTRL.reg = RTC_MODE2_CTRL_SWRST; + while (RTC->MODE2.STATUS.bit.SYNCBUSY) { + } + RTC->MODE2.CTRL.reg = + RTC_MODE2_CTRL_MODE_CLOCK | + RTC_MODE2_CTRL_PRESCALER_DIV1024 | + RTC_MODE2_CTRL_ENABLE; + while (RTC->MODE2.STATUS.bit.SYNCBUSY) { + } + } + + #elif defined(MCU_SAMD51) + + if (RTC->MODE2.CTRLA.bit.ENABLE == 0 || force) { + RTC->MODE2.CTRLA.reg = RTC_MODE2_CTRLA_SWRST; + while (RTC->MODE2.SYNCBUSY.bit.SWRST) { + } + RTC->MODE2.CTRLA.reg = + RTC_MODE2_CTRLA_MODE_CLOCK | + RTC_MODE2_CTRLA_CLOCKSYNC | + RTC_MODE2_CTRLA_PRESCALER_DIV1024 | + RTC_MODE2_CTRLA_ENABLE; + while (RTC->MODE2.SYNCBUSY.bit.ENABLE) { + } + } + #endif +} + +// Get the time from the RTC and put it into a tm struct. +void rtc_gettime(timeutils_struct_time_t *tm) { + tm->tm_year = RTC->MODE2.CLOCK.bit.YEAR + 2000; + tm->tm_mon = RTC->MODE2.CLOCK.bit.MONTH; + tm->tm_mday = RTC->MODE2.CLOCK.bit.DAY; + tm->tm_hour = RTC->MODE2.CLOCK.bit.HOUR; + tm->tm_min = RTC->MODE2.CLOCK.bit.MINUTE; + tm->tm_sec = RTC->MODE2.CLOCK.bit.SECOND; +} + +STATIC mp_obj_t machine_rtc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { + // Check arguments. + mp_arg_check_num(n_args, n_kw, 0, 0, false); + // RTC was already started at boot time. So nothing to do here. + // Return constant object. + return (mp_obj_t)&machine_rtc_obj; +} + +STATIC mp_obj_t machine_rtc_datetime_helper(size_t n_args, const mp_obj_t *args) { + // Rtc *rtc = RTC; + if (n_args == 1) { + // Get date and time. + timeutils_struct_time_t tm; + rtc_gettime(&tm); + + mp_obj_t tuple[8] = { + mp_obj_new_int(tm.tm_year), + mp_obj_new_int(tm.tm_mon), + mp_obj_new_int(tm.tm_mday), + mp_obj_new_int(timeutils_calc_weekday(tm.tm_year, tm.tm_mon, tm.tm_mday)), + mp_obj_new_int(tm.tm_hour), + mp_obj_new_int(tm.tm_min), + mp_obj_new_int(tm.tm_sec), + mp_obj_new_int(0), + }; + return mp_obj_new_tuple(8, tuple); + } else { + // Set date and time. + mp_obj_t *items; + mp_obj_get_array_fixed_n(args[1], 8, &items); + + uint32_t date = + RTC_MODE2_CLOCK_YEAR(mp_obj_get_int(items[0]) % 100) | + RTC_MODE2_CLOCK_MONTH(mp_obj_get_int(items[1])) | + RTC_MODE2_CLOCK_DAY(mp_obj_get_int(items[2])) | + RTC_MODE2_CLOCK_HOUR(mp_obj_get_int(items[4])) | + RTC_MODE2_CLOCK_MINUTE(mp_obj_get_int(items[5])) | + RTC_MODE2_CLOCK_SECOND(mp_obj_get_int(items[6])); + + RTC->MODE2.CLOCK.reg = date; + #if defined(MCU_SAMD21) + while (RTC->MODE2.STATUS.bit.SYNCBUSY) { + } + #elif defined(MCU_SAMD51) + while (RTC->MODE2.SYNCBUSY.bit.CLOCKSYNC) { + } + #endif + + return mp_const_none; + } +} + +STATIC mp_obj_t machine_rtc_datetime(mp_uint_t n_args, const mp_obj_t *args) { + return machine_rtc_datetime_helper(n_args, args); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_rtc_datetime_obj, 1, 2, machine_rtc_datetime); + +STATIC mp_obj_t machine_rtc_init(mp_obj_t self_in, mp_obj_t date) { + mp_obj_t args[2] = {self_in, date}; + machine_rtc_datetime_helper(2, args); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_rtc_init_obj, machine_rtc_init); + +// calibration(cal) +// When the argument is a number in the range [-16 to 15], set the calibration value. +STATIC mp_obj_t machine_rtc_calibration(mp_obj_t self_in, mp_obj_t cal_in) { + int8_t cal = 0; + // Make it negative for a "natural" behavior: + // value > 0: faster, value < 0: slower + cal = -mp_obj_get_int(cal_in); + RTC->MODE2.FREQCORR.reg = (uint8_t)cal; + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_2(machine_rtc_calibration_obj, machine_rtc_calibration); + +STATIC const mp_rom_map_elem_t machine_rtc_locals_dict_table[] = { + { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_rtc_init_obj) }, + { MP_ROM_QSTR(MP_QSTR_datetime), MP_ROM_PTR(&machine_rtc_datetime_obj) }, + { MP_ROM_QSTR(MP_QSTR_calibration), MP_ROM_PTR(&machine_rtc_calibration_obj) }, +}; +STATIC MP_DEFINE_CONST_DICT(machine_rtc_locals_dict, machine_rtc_locals_dict_table); + +MP_DEFINE_CONST_OBJ_TYPE( + machine_rtc_type, + MP_QSTR_RTC, + MP_TYPE_FLAG_NONE, + make_new, machine_rtc_make_new, + locals_dict, &machine_rtc_locals_dict + ); + +#endif // MICROPY_PY_MACHINE_RTC diff --git a/ports/samd/mcu/samd21/clock_config.c b/ports/samd/mcu/samd21/clock_config.c index a195cb692053..00f743cc49d1 100644 --- a/ports/samd/mcu/samd21/clock_config.c +++ b/ports/samd/mcu/samd21/clock_config.c @@ -141,7 +141,7 @@ void init_clocks(uint32_t cpu_freq) { // GCLK3: 1Mhz for the us-counter (TC4/TC5) // GCLK4: 32kHz from crystal, if present // GCLK5: 48MHz from DFLL for USB - // GCLK8: 1kHz clock for WDT + // GCLK8: 1kHz clock for WDT and RTC NVMCTRL->CTRLB.bit.MANW = 1; // errata "Spurious Writes" NVMCTRL->CTRLB.bit.RWS = 1; // 1 read wait state for 48MHz @@ -203,6 +203,11 @@ void init_clocks(uint32_t cpu_freq) { SYSCTRL_DFLLCTRL_BPLCKC | SYSCTRL_DFLLCTRL_ENABLE; while (SYSCTRL->PCLKSR.bit.DFLLLCKF == 0) { } + // Set GCLK8 to 1 kHz. + GCLK->GENDIV.reg = GCLK_GENDIV_ID(8) | GCLK_GENDIV_DIV(32); + GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_XOSC32K | GCLK_GENCTRL_ID(8); + while (GCLK->STATUS.bit.SYNCBUSY) { + } #else // MICROPY_HW_XOSC32K @@ -242,6 +247,11 @@ void init_clocks(uint32_t cpu_freq) { GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(1); while (GCLK->STATUS.bit.SYNCBUSY) { } + // Set GCLK8 to 1 kHz. + GCLK->GENDIV.reg = GCLK_GENDIV_ID(8) | GCLK_GENDIV_DIV(32); + GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_OSCULP32K | GCLK_GENCTRL_ID(8); + while (GCLK->STATUS.bit.SYNCBUSY) { + } #endif // MICROPY_HW_XOSC32K @@ -252,11 +262,6 @@ void init_clocks(uint32_t cpu_freq) { GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL48M | GCLK_GENCTRL_ID(3); while (GCLK->STATUS.bit.SYNCBUSY) { } - // Set GCLK8 to 1 kHz. - GCLK->GENDIV.reg = GCLK_GENDIV_ID(8) | GCLK_GENDIV_DIV(32); - GCLK->GENCTRL.reg = GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_OSCULP32K | GCLK_GENCTRL_ID(8); - while (GCLK->STATUS.bit.SYNCBUSY) { - } } void enable_sercom_clock(int id) { diff --git a/ports/samd/mcu/samd21/mpconfigmcu.h b/ports/samd/mcu/samd21/mpconfigmcu.h index 8d155f93ab03..331df8e2130a 100644 --- a/ports/samd/mcu/samd21/mpconfigmcu.h +++ b/ports/samd/mcu/samd21/mpconfigmcu.h @@ -28,6 +28,12 @@ #define MICROPY_HW_UART_TXBUF (1) #endif +#ifndef MICROPY_PY_MACHINE_RTC +#if MICROPY_HW_XOSC32K +#define MICROPY_PY_MACHINE_RTC (1) +#endif +#endif + #define CPU_FREQ (48000000) #define DFLL48M_FREQ (48000000) #define MAX_CPU_FREQ (48000000) diff --git a/ports/samd/mcu/samd51/clock_config.c b/ports/samd/mcu/samd51/clock_config.c index 3bc4616de9e9..c5f508cae8b6 100644 --- a/ports/samd/mcu/samd51/clock_config.c +++ b/ports/samd/mcu/samd51/clock_config.c @@ -215,16 +215,19 @@ void init_clocks(uint32_t cpu_freq) { #if MICROPY_HW_XOSC32K // OSCILLATOR CONTROL + // Enable the clock for RTC + OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_XOSC1K; // Setup XOSC32K OSC32KCTRL->INTFLAG.reg = OSC32KCTRL_INTFLAG_XOSC32KRDY | OSC32KCTRL_INTFLAG_XOSC32KFAIL; - OSC32KCTRL->XOSC32K.bit.CGM = OSC32KCTRL_XOSC32K_CGM_HS_Val; - OSC32KCTRL->XOSC32K.bit.XTALEN = 1; // 0: Generator 1: Crystal - OSC32KCTRL->XOSC32K.bit.EN32K = 1; - OSC32KCTRL->XOSC32K.bit.ONDEMAND = 0; - OSC32KCTRL->XOSC32K.bit.RUNSTDBY = 1; - OSC32KCTRL->XOSC32K.bit.STARTUP = 4; OSC32KCTRL->CFDCTRL.bit.CFDEN = 1; // Fall back to internal Osc on crystal fail - OSC32KCTRL->XOSC32K.bit.ENABLE = 1; + OSC32KCTRL->XOSC32K.reg = + OSC32KCTRL_XOSC32K_CGM_HS | + OSC32KCTRL_XOSC32K_XTALEN | + OSC32KCTRL_XOSC32K_EN32K | + OSC32KCTRL_XOSC32K_EN1K | + OSC32KCTRL_XOSC32K_RUNSTDBY | + OSC32KCTRL_XOSC32K_STARTUP(4) | + OSC32KCTRL_XOSC32K_ENABLE; // make sure osc32kcrtl is ready while (OSC32KCTRL->STATUS.bit.XOSC32KRDY == 0) { } @@ -270,6 +273,9 @@ void init_clocks(uint32_t cpu_freq) { #else // MICROPY_HW_XOSC32K + // Enable the clock for RTC + OSC32KCTRL->RTCCTRL.reg = OSC32KCTRL_RTCCTRL_RTCSEL_ULP1K; + // Derive GCLK1 from DFLL48M at DPLL0_REF_FREQ as defined in mpconfigboard.h (e.g. 32768 Hz) GCLK->GENCTRL[1].reg = ((DFLL48M_FREQ + DPLLx_REF_FREQ / 2) / DPLLx_REF_FREQ) << GCLK_GENCTRL_DIV_Pos | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index 666370c983b7..541fba9009f3 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -28,6 +28,12 @@ #define MICROPY_PY_URANDOM_SEED_INIT_FUNC (trng_random_u32()) unsigned long trng_random_u32(void); +#ifndef MICROPY_PY_MACHINE_RTC +#if MICROPY_HW_XOSC32K +#define MICROPY_PY_MACHINE_RTC (1) +#endif +#endif + // Due to a limitation in the TC counter for us, the ticks period is 2**29 #define MICROPY_PY_UTIME_TICKS_PERIOD (0x20000000) diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index ce5fef76f753..12e9f7c34134 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -238,6 +238,9 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_Timer), MP_ROM_PTR(&machine_timer_type) }, { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&machine_uart_type) }, { MP_ROM_QSTR(MP_QSTR_WDT), MP_ROM_PTR(&machine_wdt_type) }, + #if MICROPY_PY_MACHINE_RTC + { MP_ROM_QSTR(MP_QSTR_RTC), MP_ROM_PTR(&machine_rtc_type) }, + #endif { MP_ROM_QSTR(MP_QSTR_idle), MP_ROM_PTR(&machine_idle_obj) }, { MP_ROM_QSTR(MP_QSTR_disable_irq), MP_ROM_PTR(&machine_disable_irq_obj) }, diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h index e99ca990fbba..8f85e149896f 100644 --- a/ports/samd/modmachine.h +++ b/ports/samd/modmachine.h @@ -38,5 +38,8 @@ extern const mp_obj_type_t machine_spi_type; extern const mp_obj_type_t machine_timer_type; extern const mp_obj_type_t machine_uart_type; extern const mp_obj_type_t machine_wdt_type; +#if MICROPY_PY_MACHINE_RTC +extern const mp_obj_type_t machine_rtc_type; +#endif #endif // MICROPY_INCLUDED_SAMD_MODMACHINE_H diff --git a/ports/samd/modutime.c b/ports/samd/modutime.c index 4169c15d9117..6b04134497fb 100644 --- a/ports/samd/modutime.c +++ b/ports/samd/modutime.c @@ -29,20 +29,34 @@ #include "shared/timeutils/timeutils.h" #include "mphalport.h" +#if !MICROPY_PY_MACHINE_RTC uint32_t time_offset = 0; +#endif // !MICROPY_PY_MACHINE_RTC // localtime([secs]) STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { timeutils_struct_time_t tm; mp_int_t seconds; + + #if MICROPY_PY_MACHINE_RTC + extern void rtc_gettime(timeutils_struct_time_t *tm); + if (n_args == 0 || args[0] == mp_const_none) { + rtc_gettime(&tm); + } else { + seconds = mp_obj_get_int(args[0]); + timeutils_seconds_since_epoch_to_struct_time(seconds, &tm); + } + + #else if (n_args == 0 || args[0] == mp_const_none) { - // seconds = pyb_rtc_get_us_since_epoch() / 1000 / 1000; seconds = mp_hal_ticks_ms_64() / 1000 + time_offset; } else { seconds = mp_obj_get_int(args[0]); time_offset = seconds - mp_hal_ticks_ms_64() / 1000; } timeutils_seconds_since_epoch_to_struct_time(seconds, &tm); + + #endif // MICROPY_PY_MACHINE_RTC mp_obj_t tuple[8] = { tuple[0] = mp_obj_new_int(tm.tm_year), tuple[1] = mp_obj_new_int(tm.tm_mon), @@ -50,8 +64,8 @@ STATIC mp_obj_t time_localtime(size_t n_args, const mp_obj_t *args) { tuple[3] = mp_obj_new_int(tm.tm_hour), tuple[4] = mp_obj_new_int(tm.tm_min), tuple[5] = mp_obj_new_int(tm.tm_sec), - tuple[6] = mp_obj_new_int(tm.tm_wday), - tuple[7] = mp_obj_new_int(tm.tm_yday), + tuple[6] = mp_obj_new_int(timeutils_calc_weekday(tm.tm_year, tm.tm_mon, tm.tm_mday)), + tuple[7] = mp_obj_new_int(timeutils_year_day(tm.tm_year, tm.tm_mon, tm.tm_mday)), }; return mp_obj_new_tuple(8, tuple); } @@ -76,7 +90,17 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(time_mktime_obj, time_mktime); // time() STATIC mp_obj_t time_time(void) { + #if MICROPY_PY_MACHINE_RTC + extern void rtc_gettime(timeutils_struct_time_t *tm); + timeutils_struct_time_t tm; + rtc_gettime(&tm); + return mp_obj_new_int_from_uint(timeutils_mktime( + tm.tm_year, tm.tm_mon, tm.tm_mday, tm.tm_hour, tm.tm_min, tm.tm_sec)); + + #else return mp_obj_new_int_from_uint(mp_hal_ticks_ms_64() / 1000 + time_offset); + + #endif // MICROPY_PY_MACHINE_RTC } STATIC MP_DEFINE_CONST_FUN_OBJ_0(time_time_obj, time_time); diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c index 3608306e8719..bd3eea536fdb 100644 --- a/ports/samd/samd_soc.c +++ b/ports/samd/samd_soc.c @@ -38,6 +38,10 @@ #include "tusb.h" #include "mphalport.h" +#if MICROPY_PY_MACHINE_RTC +extern void machine_rtc_start(bool force); +#endif + static void usb_init(void) { // Init USB clock #if defined(MCU_SAMD21) @@ -114,4 +118,7 @@ void samd_init(void) { #if defined(MCU_SAMD51) mp_hal_ticks_cpu_enable(); #endif + #if MICROPY_PY_MACHINE_RTC + machine_rtc_start(false); + #endif } From e33db80a5958772095a16b0b3753ed3aa72d07b2 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 29 Sep 2022 16:13:23 +0200 Subject: [PATCH 033/823] samd/clock_config: Extend the SAMD51 us-counter to 60 bit. This removes the difference in the time.ticks_us() range between SAMD21 and SAMD51. The function mp_hal_ticks_us_64() is added and used for: - SAMD51's mp_hal_ticks_us and mp_hal_delay_us(). For SAMD21, keep the previous methods, which are faster. - mp_hal_ticks_ms() and mp_hal_tick_ms_64(), which saves some bytes and removes a potential race condition every 50 days. Also set the us-counter for SAMD51 to 16 MHz for a faster reading of the microsecond value. Note: With SAMD51, mp_hal_ticks_us_64() has a 60 bit range only, which is still a long time (~36000 years). --- ports/samd/mcu/samd51/clock_config.c | 8 +++--- ports/samd/mcu/samd51/mpconfigmcu.h | 3 --- ports/samd/mphalport.c | 40 ++++++++++++++++++++++++---- ports/samd/mphalport.h | 23 +++++----------- ports/samd/samd_isr.c | 24 ++++++++++++----- ports/samd/samd_soc.c | 8 +++++- 6 files changed, 71 insertions(+), 35 deletions(-) diff --git a/ports/samd/mcu/samd51/clock_config.c b/ports/samd/mcu/samd51/clock_config.c index c5f508cae8b6..b55419d24b67 100644 --- a/ports/samd/mcu/samd51/clock_config.c +++ b/ports/samd/mcu/samd51/clock_config.c @@ -190,7 +190,7 @@ void init_clocks(uint32_t cpu_freq) { // GCLK0: 48MHz from DFLL48M or 48 - 200 MHz from DPLL0 (SAMD51) // GCLK1: 32768 Hz from 32KULP or DFLL48M // GCLK2: 8-48MHz from DFLL48M for Peripheral devices - // GCLK3: 8Mhz for the us-counter (TC0/TC1) + // GCLK3: 16Mhz for the us-counter (TC0/TC1) // GCLK4: 32kHz from crystal, if present // GCLK5: 48MHz from DFLL48M for USB // DPLL0: 48 - 200 MHz @@ -204,7 +204,7 @@ void init_clocks(uint32_t cpu_freq) { // Setup DPLL0 to 120MHz // Setup GCLK0 to 120MHz // Setup GCLK2 to 48MHz for Peripherals - // Setup GCLK3 to 8MHz for TC0/TC1 + // Setup GCLK3 to 16MHz for TC0/TC1 // Setup GCLK4 to 32kHz crystal, if present // Setup GCLK5 to 48 MHz @@ -320,8 +320,8 @@ void init_clocks(uint32_t cpu_freq) { while (GCLK->SYNCBUSY.bit.GENCTRL2) { } - // Setup GCLK3 for 8MHz, Used for TC0/1 counter - GCLK->GENCTRL[3].reg = GCLK_GENCTRL_DIV(6) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; + // Setup GCLK3 for 16MHz, Used for TC0/1 counter + GCLK->GENCTRL[3].reg = GCLK_GENCTRL_DIV(3) | GCLK_GENCTRL_RUNSTDBY | GCLK_GENCTRL_GENEN | GCLK_GENCTRL_SRC_DFLL; while (GCLK->SYNCBUSY.bit.GENCTRL3) { } } diff --git a/ports/samd/mcu/samd51/mpconfigmcu.h b/ports/samd/mcu/samd51/mpconfigmcu.h index 541fba9009f3..16b2c101f02b 100644 --- a/ports/samd/mcu/samd51/mpconfigmcu.h +++ b/ports/samd/mcu/samd51/mpconfigmcu.h @@ -34,9 +34,6 @@ unsigned long trng_random_u32(void); #endif #endif -// Due to a limitation in the TC counter for us, the ticks period is 2**29 -#define MICROPY_PY_UTIME_TICKS_PERIOD (0x20000000) - // fatfs configuration used in ffconf.h #define MICROPY_FATFS_ENABLE_LFN (1) #define MICROPY_FATFS_RPATH (2) diff --git a/ports/samd/mphalport.c b/ports/samd/mphalport.c index ad3817768f77..b60bada480b4 100644 --- a/ports/samd/mphalport.c +++ b/ports/samd/mphalport.c @@ -37,6 +37,8 @@ #define MICROPY_HW_STDIN_BUFFER_LEN 128 #endif +extern volatile uint32_t ticks_us64_upper; + STATIC uint8_t stdin_ringbuf_array[MICROPY_HW_STDIN_BUFFER_LEN]; ringbuf_t stdin_ringbuf = { stdin_ringbuf_array, sizeof(stdin_ringbuf_array), 0, 0 }; @@ -111,19 +113,47 @@ void mp_hal_delay_ms(mp_uint_t ms) { void mp_hal_delay_us(mp_uint_t us) { if (us > 0) { - uint32_t start = mp_hal_ticks_us(); #if defined(MCU_SAMD21) - // SAMD21 counter has effective 32 bit width + uint32_t start = mp_hal_ticks_us(); while ((mp_hal_ticks_us() - start) < us) { } - #elif defined(MCU_SAMD51) - // SAMD51 counter has effective 29 bit width - while (((mp_hal_ticks_us() - start) & (MICROPY_PY_UTIME_TICKS_PERIOD - 1)) < us) { + #else + uint64_t stop = mp_hal_ticks_us_64() + us; + while (mp_hal_ticks_us_64() < stop) { } #endif } } +uint64_t mp_hal_ticks_us_64(void) { + uint32_t us64_upper = ticks_us64_upper; + uint32_t us64_lower; + uint8_t intflag; + __disable_irq(); + #if defined(MCU_SAMD21) + us64_lower = REG_TC4_COUNT32_COUNT; + intflag = TC4->COUNT32.INTFLAG.reg; + #elif defined(MCU_SAMD51) + TC0->COUNT32.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC; + while (TC0->COUNT32.CTRLBSET.reg != 0) { + } + us64_lower = REG_TC0_COUNT32_COUNT; + intflag = TC0->COUNT32.INTFLAG.reg; + #endif + __enable_irq(); + if ((intflag & TC_INTFLAG_OVF) && us64_lower < 0x10000000) { + // The timer counter overflowed before reading it but the IRQ handler + // has not yet been called, so perform the IRQ arithmetic now. + us64_upper++; + } + #if defined(MCU_SAMD21) + return ((uint64_t)us64_upper << 32) | us64_lower; + #elif defined(MCU_SAMD51) + return ((uint64_t)us64_upper << 28) | (us64_lower >> 4); + #endif + +} + uintptr_t mp_hal_stdio_poll(uintptr_t poll_flags) { uintptr_t ret = 0; diff --git a/ports/samd/mphalport.h b/ports/samd/mphalport.h index 3879240f9a6a..2cbb3333f60f 100644 --- a/ports/samd/mphalport.h +++ b/ports/samd/mphalport.h @@ -37,7 +37,7 @@ extern int mp_interrupt_char; extern volatile uint32_t systick_ms; -extern volatile uint32_t systick_ms_upper; +uint64_t mp_hal_ticks_us_64(void); void mp_hal_set_interrupt_char(int c); @@ -47,28 +47,19 @@ void mp_hal_set_interrupt_char(int c); #define mp_hal_delay_us_fast mp_hal_delay_us -static inline mp_uint_t mp_hal_ticks_ms(void) { - return systick_ms; +static inline uint64_t mp_hal_ticks_ms_64(void) { + return mp_hal_ticks_us_64() / 1000; } -static inline uint64_t mp_hal_ticks_ms_64(void) { - return ((uint64_t)systick_ms_upper << 32) + systick_ms; +static inline mp_uint_t mp_hal_ticks_ms(void) { + return (mp_uint_t)mp_hal_ticks_ms_64(); } static inline mp_uint_t mp_hal_ticks_us(void) { #if defined(MCU_SAMD21) - return REG_TC4_COUNT32_COUNT; - - #elif defined(MCU_SAMD51) - - TC0->COUNT32.CTRLBSET.reg = TC_CTRLBSET_CMD_READSYNC; - while (TC0->COUNT32.CTRLBSET.reg != 0) { - } - return REG_TC0_COUNT32_COUNT >> 3; - #else - return systick_ms * 1000; + return (mp_uint_t)mp_hal_ticks_us_64(); #endif } @@ -89,7 +80,7 @@ static inline mp_uint_t mp_hal_ticks_cpu(void) { #endif static inline uint64_t mp_hal_time_ns(void) { - return mp_hal_ticks_ms_64() * 1000000; + return mp_hal_ticks_us_64() * 1000; } // C-level pin HAL diff --git a/ports/samd/samd_isr.c b/ports/samd/samd_isr.c index b507d5d1aa73..1d6febaaa226 100644 --- a/ports/samd/samd_isr.c +++ b/ports/samd/samd_isr.c @@ -41,7 +41,7 @@ extern void EIC_Handler(void); const ISR isr_vector[]; volatile uint32_t systick_ms; -volatile uint32_t systick_ms_upper; +volatile uint32_t ticks_us64_upper; void Reset_Handler(void) __attribute__((naked)); void Reset_Handler(void) { @@ -93,15 +93,27 @@ void Default_Handler(void) { void SysTick_Handler(void) { uint32_t next_tick = systick_ms + 1; systick_ms = next_tick; - if (systick_ms == 0) { - systick_ms_upper += 1; - } if (soft_timer_next == next_tick) { pendsv_schedule_dispatch(PENDSV_DISPATCH_SOFT_TIMER, soft_timer_handler); } } +void us_timer_IRQ(void) { + #if defined(MCU_SAMD21) + if (TC4->COUNT32.INTFLAG.reg & TC_INTFLAG_OVF) { + ticks_us64_upper++; + } + TC4->COUNT32.INTFLAG.reg = TC_INTFLAG_OVF; + #elif defined(MCU_SAMD51) + if (TC0->COUNT32.INTFLAG.reg & TC_INTFLAG_OVF) { + ticks_us64_upper++; + } + TC0->COUNT32.INTFLAG.reg = TC_INTFLAG_OVF; + #endif +} + +// Sercom IRQ handler support void (*sercom_irq_handler_table[SERCOM_INST_NUM])(int num) = {}; void sercom_register_irq(int sercom_id, void (*sercom_irq_handler)) { @@ -180,7 +192,7 @@ const ISR isr_vector[] __attribute__((section(".isr_vector"))) = { 0, // 16 Timer Counter Control 1 (TCC1) 0, // 17 Timer Counter Control 2 (TCC2) 0, // 18 Basic Timer Counter 3 (TC3) - 0, // 19 Basic Timer Counter 4 (TC4) + &us_timer_IRQ, // 19 Basic Timer Counter 4 (TC4) 0, // 20 Basic Timer Counter 5 (TC5) 0, // 21 Basic Timer Counter 6 (TC6) 0, // 22 Basic Timer Counter 7 (TC7) @@ -316,7 +328,7 @@ const ISR isr_vector[] __attribute__((section(".isr_vector"))) = { 0, // 104 Timer Counter Control 4 (TCC4): TCC4_CNT_A ... 0, // 105 Timer Counter Control 4 (TCC4): TCC4_MC_0 0, // 106 Timer Counter Control 4 (TCC4): TCC4_MC_1 - 0, // 107 Basic Timer Counter 0 (TC0) + &us_timer_IRQ, // 107 Basic Timer Counter 0 (TC0) 0, // 108 Basic Timer Counter 1 (TC1) 0, // 109 Basic Timer Counter 2 (TC2) 0, // 110 Basic Timer Counter 3 (TC3) diff --git a/ports/samd/samd_soc.c b/ports/samd/samd_soc.c index bd3eea536fdb..a81e7c68810d 100644 --- a/ports/samd/samd_soc.c +++ b/ports/samd/samd_soc.c @@ -68,7 +68,7 @@ static void usb_init(void) { tusb_init(); } -// Initialize the microsecond counter on TC 0/1 +// Initialize the µs counter on TC 0/1 or TC4/5 void init_us_counter(void) { #if defined(MCU_SAMD21) @@ -89,6 +89,9 @@ void init_us_counter(void) { TC4->COUNT32.READREQ.reg = TC_READREQ_RREQ | TC_READREQ_RCONT | 0x10; while (TC4->COUNT32.STATUS.bit.SYNCBUSY) { } + // Enable the IRQ + TC4->COUNT32.INTENSET.reg = TC_INTENSET_OVF; + NVIC_EnableIRQ(TC4_IRQn); #elif defined(MCU_SAMD51) @@ -107,6 +110,9 @@ void init_us_counter(void) { while (TC0->COUNT32.SYNCBUSY.bit.ENABLE) { } + // Enable the IRQ + TC0->COUNT32.INTENSET.reg = TC_INTENSET_OVF; + NVIC_EnableIRQ(TC0_IRQn); #endif } From e7aa9700cad4ace55fb9100c98b2bbfa811870d2 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Tue, 4 Oct 2022 13:39:43 +0200 Subject: [PATCH 034/823] samd/boards/SEEED_WIO_TERMINAL: Declare more pins for SEEED WIO board. Defining all pins from the external 40 Pin connector, and some internal pins like the one for SD and LCD. --- ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv | 36 ++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) diff --git a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv index 72da71224a4d..9bc57070d198 100644 --- a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv +++ b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv @@ -22,9 +22,43 @@ PIN_PD20,SWITCH_U PIN_PC26,BUTTON_1 PIN_PC27,BUTTON_2 PIN_PC28,BUTTON_3 -PIN_PD11,BUZZER_CTR PIN_PC14,5V_ENABLE PIN_PC15,3V3_ENABLE +PIN_PB26,TX +PIN_PB27,RX +PIN_PA13,SDA0 +PIN_PA12,SCL0 +PIN_PA17,SDA1 +PIN_PA16,SCL1 +PIN_PB02,MOSI +PIN_PB00,MISO +PIN_PB03,SCK +PIN_PB01,CS +PIN_PB15,GPCLK0 +PIN_PB12,GPCLK1 +PIN_PB13,GPCLK2 +PIN_PC16,SD_MOSI +PIN_PC18,SD_MISO +PIN_PC17,SD_SCK +PIN_PC19,SD_CS +PIN_PD21,SD_DET +PIN_PA20,I2S_LRCLK +PIN_PA21,I2S_SDIN +PIN_PA22,I2S_SDOUT +PIN_PB16,I2C_BCLK +PIN_PB18,LCD_MISO +PIN_PB19,LCD_MOSI +PIN_PB20,LCD_SCK +PIN_PB21,LCD_CS +PIN_PC05,LCD_BACKLIGHT +PIN_PC06,LCD_D/C +PIN_PC07,LCD_RESET +PIN_PC10,LCD_XL +PIN_PC11,LCD_YU +PIN_PC12,LCD_XR +PIN_PC13,LCD_YD +PIN_PC30,MIC +PIN_PD11,BUZZER LED_PA15,LED_BLUE LED_PC05,LED_LCD From e5cf3fab951adf39e7d39c2a8600b61f84e517ce Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 17 Sep 2022 17:27:27 +0200 Subject: [PATCH 035/823] samd/machine_pin: Change the pin handling and naming/numbering. Pin numbers are now the MCU port numbers in the range: PA0..PA31: 0..31 PB0..PB31: 32..63 PC0..PC31: 64..95 PD0..PD31: 96..127 Pins can be denoted by the GPIO port number, the name as defined in pins.csv or a string in the form Pxnn, like "PA16" or "PD03". The pins.c and pins.h files are now obsolete. The pin objects are part of the AF table. As result of a simplification, the code now supports using pin names or numbers instead of pin objects for modules like UART, SPI, PWM, I2C, ADC, pininfo. --- ports/samd/Makefile | 26 +--- .../{make-pin-af.py => make-pin-table.py} | 54 +++++++- ports/samd/boards/make-pins.py | 128 ------------------ ports/samd/machine_adc.c | 4 +- ports/samd/machine_led.c | 27 ++-- ports/samd/machine_pin.c | 119 ++++++---------- ports/samd/machine_pwm.c | 4 +- ports/samd/modsamd.c | 60 ++++---- ports/samd/pin_af.c | 69 +++++++++- ports/samd/pin_af.h | 18 ++- 10 files changed, 221 insertions(+), 288 deletions(-) rename ports/samd/boards/{make-pin-af.py => make-pin-table.py} (59%) delete mode 100644 ports/samd/boards/make-pins.py diff --git a/ports/samd/Makefile b/ports/samd/Makefile index e6e592a0352b..f512fb0b2e33 100644 --- a/ports/samd/Makefile +++ b/ports/samd/Makefile @@ -47,14 +47,10 @@ INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/include INC += -I$(TOP)/lib/asf4/$(MCU_SERIES_LOWER)/include/pio INC += -I$(TOP)/lib/tinyusb/src -MAKE_PIN_AF = boards/make-pin-af.py +MAKE_PIN_AF = boards/make-pin-table.py PIN_AF_TABLE_CSV = mcu/$(MCU_SERIES_LOWER)/pin-af-table.csv -GEN_PIN_AF = pin_af_table.c - -MAKE_PINS = boards/make-pins.py BOARD_PINS = $(BOARD_DIR)/pins.csv -GEN_PINS_SRC = $(BUILD)/pins.c -GEN_PINS_HDR = $(BUILD)/pins.h +GEN_PIN_AF = pin_af_table.c CFLAGS_MCU_SAMD21 = -mtune=cortex-m0plus -mcpu=cortex-m0plus -msoft-float CFLAGS_MCU_SAMD51 = -mtune=cortex-m4 -mcpu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard @@ -150,7 +146,7 @@ DRIVERS_SRC_C += \ drivers/bus/softspi.c \ # List of sources for qstr extraction -SRC_QSTR += $(SRC_C) $(SHARED_SRC_C) $(SRC_CXX) $(GEN_PINS_SRC) +SRC_QSTR += $(SRC_C) $(SHARED_SRC_C) $(SRC_CXX) OBJ += $(PY_O) OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o)) @@ -161,7 +157,6 @@ OBJ += $(addprefix $(BUILD)/, $(ASF4_SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o)) OBJ += $(addprefix $(BUILD)/, $(TINYUSB_SRC_C:.c=.o)) -OBJ += $(GEN_PINS_SRC:.c=.o) ifneq ($(FROZEN_MANIFEST),) CFLAGS += -DMICROPY_MODULE_FROZEN_MPY @@ -182,19 +177,10 @@ $(BUILD)/firmware.bin: $(BUILD)/firmware.elf $(BUILD)/firmware.uf2: $(BUILD)/firmware.bin $(Q)$(PYTHON) $(UF2CONV) -b $(TEXT0) -c -o $@ $< -pin_af.c: $(BUILD)/$(GEN_PIN_AF) +pin_af.c: $(BUILD)/$(GEN_PIN_AF) | $(HEADER_BUILD) -$(BUILD)/$(GEN_PIN_AF): $(PIN_AF_TABLE_CSV) | $(HEADER_BUILD) +$(BUILD)/$(GEN_PIN_AF): $(PIN_AF_TABLE_CSV) $(BOARD_PINS) | $(HEADER_BUILD) $(ECHO) "Create $@" - $(Q)$(PYTHON) $(MAKE_PIN_AF) --csv $(PIN_AF_TABLE_CSV) --table $(BUILD)/$(GEN_PIN_AF) --mcu $(MCU_SERIES) - -machine_led.c machine_pin.c modsamd.c: $(GEN_PINS_HDR) - -$(GEN_PINS_SRC) $(GEN_PINS_HDR): $(BOARD_PINS) | $(HEADER_BUILD) - $(ECHO) "Create $@" - $(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --pins $(GEN_PINS_SRC) --inc $(GEN_PINS_HDR) - -$(GEN_PINS_SRC:.c=.o): $(GEN_PINS_SRC) - $(call compile_c) + $(Q)$(PYTHON) $(MAKE_PIN_AF) --csv $(PIN_AF_TABLE_CSV) --board $(BOARD_PINS) --table $(BUILD)/$(GEN_PIN_AF) --mcu $(MCU_SERIES) include $(TOP)/py/mkrules.mk diff --git a/ports/samd/boards/make-pin-af.py b/ports/samd/boards/make-pin-table.py similarity index 59% rename from ports/samd/boards/make-pin-af.py rename to ports/samd/boards/make-pin-table.py index d895ef9dd99a..327478568afa 100644 --- a/ports/samd/boards/make-pin-af.py +++ b/ports/samd/boards/make-pin-table.py @@ -16,6 +16,7 @@ class Pins: def __init__(self): self.board_pins = [] # list of pin objects + self.pin_names = {} def parse_csv_file(self, filename): with open(filename, "r") as csvfile: @@ -25,17 +26,43 @@ def parse_csv_file(self, filename): if len(row) > 0 and row[0].strip().upper()[:2] in ("PA", "PB", "PC", "PD"): self.board_pins.append(row) + def parse_pin_file(self, filename): + with open(filename, "r") as csvfile: + rows = csv.reader(csvfile, skipinitialspace=True) + for row in rows: + # Pin numbers must start with "PIN_" + # LED numbers must start with "LED_" + if len(row) > 0: + # for compatibility, map LED_ to PIN_ + if row[0].startswith("LED_"): + row[0] = "PIN_" + row[0][4:] + if len(row) == 1: + self.pin_names[row[0]] = (row[0][4:], "{&machine_led_type}") + else: + self.pin_names[row[0]] = (row[1], "{&machine_led_type}") + elif row[0].startswith("PIN_"): + if len(row) == 1: + self.pin_names[row[0]] = (row[0][4:], "{&machine_pin_type}") + else: + self.pin_names[row[0]] = (row[1], "{&machine_pin_type}") + def print_table(self, table_filename, mcu_name): with open(table_filename, "wt") as table_file: table_file.write(table_header) - table_file.write("const pin_af_t pin_af_table[] = {\n") + table_file.write("const machine_pin_obj_t pin_af_table[] = {\n") if mcu_name == "SAMD21": for row in self.board_pins: pin = "PIN_" + row[0].upper() table_file.write(" #ifdef " + pin + "\n") eic = row[1] if row[1] else "0xff" adc = row[2] if row[2] else "0xff" - table_file.write(" {%s, %s, %s" % (pin, eic, adc)) + if pin in self.pin_names: + name = '"%s"' % self.pin_names[pin][0] + type = self.pin_names[pin][1] + else: + name = '"-"' + type = "{&machine_pin_type}" + table_file.write(" {%s, %s, %s, %s, %s" % (type, pin, name, eic, adc)) for cell in row[3:]: if cell: table_file.write( @@ -52,7 +79,15 @@ def print_table(self, table_filename, mcu_name): eic = row[1] if row[1] else "0xff" adc0 = row[2] if row[2] else "0xff" adc1 = row[3] if row[3] else "0xff" - table_file.write(" {%s, %s, %s, %s" % (pin, eic, adc0, adc1)) + if pin in self.pin_names: + name = '"%s"' % self.pin_names[pin][0] + type = self.pin_names[pin][1] + else: + name = '"-"' + type = "{&machine_pin_type}" + table_file.write( + " {%s, %s, %s, %s, %s, %s" % (type, pin, name, eic, adc0, adc1) + ) for cell in row[4:]: if cell: table_file.write( @@ -67,7 +102,7 @@ def print_table(self, table_filename, mcu_name): def main(): parser = argparse.ArgumentParser( - prog="make-pin-cap.py", + prog="make-pin-af.py", usage="%(prog)s [options] [command]", description="Generate MCU-specific pin cap table file", ) @@ -75,7 +110,13 @@ def main(): "-c", "--csv", dest="csv_filename", - help="Specifies the pin-mux-xxxx.csv filename", + help="Specifies the pin-af-table.csv filename", + ) + parser.add_argument( + "-b", + "--board", + dest="pin_filename", + help="Specifies the pins.csv filename", ) parser.add_argument( "-t", @@ -96,6 +137,9 @@ def main(): if args.csv_filename: pins.parse_csv_file(args.csv_filename) + if args.pin_filename: + pins.parse_pin_file(args.pin_filename) + if args.table_filename: pins.print_table(args.table_filename, args.mcu_name) diff --git a/ports/samd/boards/make-pins.py b/ports/samd/boards/make-pins.py deleted file mode 100644 index 679e2c9d192c..000000000000 --- a/ports/samd/boards/make-pins.py +++ /dev/null @@ -1,128 +0,0 @@ -#!/usr/bin/env python -"""Generates the pins file for the SAMD port.""" - -from __future__ import print_function - -import argparse -import sys -import csv - -pins_header_prefix = """// This file was automatically generated by make-pins.py -// -typedef struct _machine_pin_obj_t { - mp_obj_base_t base; - uint32_t id; - char *name; -} machine_pin_obj_t; - -int pin_find(mp_obj_t pin, const machine_pin_obj_t machine_pin_obj[], int table_size); - -""" - -led_header_prefix = """typedef struct _machine_led_obj_t { - mp_obj_base_t base; - uint32_t id; - char *name; -} machine_led_obj_t; - -""" - - -class Pins: - def __init__(self): - self.board_pins = [] # list of pin objects - self.board_leds = [] # list of led objects - - def parse_csv_file(self, filename): - with open(filename, "r") as csvfile: - rows = csv.reader(csvfile, skipinitialspace=True) - for row in rows: - # Pin numbers must start with "PIN_" - # LED numbers must start with "LED_" - if len(row) > 0: - if row[0].startswith("PIN_"): - if len(row) == 1: - self.board_pins.append([row[0], row[0][4:]]) - else: - self.board_pins.append([row[0], row[1]]) - elif row[0].startswith("LED_"): - self.board_leds.append(["PIN_" + row[0][4:], row[1]]) - elif row[0].startswith("-"): - self.board_pins.append(["-1", ""]) - - def print_pins(self, pins_filename): - with open(pins_filename, "wt") as pins_file: - pins_file.write("// This file was automatically generated by make-pins.py\n") - pins_file.write("//\n") - pins_file.write('#include "modmachine.h"\n') - pins_file.write('#include "sam.h"\n') - pins_file.write('#include "pins.h"\n\n') - - pins_file.write("const machine_pin_obj_t machine_pin_obj[] = {\n") - for pin in self.board_pins: - pins_file.write(" {{&machine_pin_type}, ") - pins_file.write(pin[0] + ', "' + pin[1]) - pins_file.write('"},\n') - pins_file.write("};\n") - - if self.board_leds: - pins_file.write("\nconst machine_led_obj_t machine_led_obj[] = {\n") - for pin in self.board_leds: - pins_file.write(" {{&machine_led_type}, ") - pins_file.write(pin[0] + ', "' + pin[1]) - pins_file.write('"},\n') - pins_file.write("};\n") - - def print_header(self, hdr_filename): - with open(hdr_filename, "wt") as hdr_file: - hdr_file.write(pins_header_prefix) - if self.board_leds: - hdr_file.write(led_header_prefix) - hdr_file.write( - "extern const machine_pin_obj_t machine_pin_obj[%d];\n" % len(self.board_pins) - ) - if self.board_leds: - hdr_file.write( - "extern const machine_led_obj_t machine_led_obj[%d];\n" % len(self.board_leds) - ) - - -def main(): - parser = argparse.ArgumentParser( - prog="make-pins.py", - usage="%(prog)s [options] [command]", - description="Generate board specific pin file", - ) - parser.add_argument( - "-b", - "--board", - dest="csv_filename", - help="Specifies the pins.csv filename", - ) - parser.add_argument( - "-p", - "--pins", - dest="pins_filename", - help="Specifies the name of the generated pins.c file", - ) - parser.add_argument( - "-i", - "--inc", - dest="hdr_filename", - help="Specifies name of generated pin header file", - ) - args = parser.parse_args(sys.argv[1:]) - - pins = Pins() - - if args.csv_filename: - pins.parse_csv_file(args.csv_filename) - - if args.pins_filename: - pins.print_pins(args.pins_filename) - - pins.print_header(args.hdr_filename) - - -if __name__ == "__main__": - main() diff --git a/ports/samd/machine_adc.c b/ports/samd/machine_adc.c index 97b6a14f17a4..efe0f041cdfa 100644 --- a/ports/samd/machine_adc.c +++ b/ports/samd/machine_adc.c @@ -66,8 +66,8 @@ STATIC void adc_obj_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t k (void)kind; machine_adc_obj_t *self = MP_OBJ_TO_PTR(o); - mp_printf(print, "ADC(P%c%02u, ADC%u, channel=%u, bits=%u, average=%u)", - "ABCD"[self->id / 32], self->id % 32, self->adc_config.device, + mp_printf(print, "ADC(%s, ADC%u, channel=%u, bits=%u, average=%u)", + pin_name(self->id), self->adc_config.device, self->adc_config.channel, self->bits, 1 << self->avg); } diff --git a/ports/samd/machine_led.c b/ports/samd/machine_led.c index 54c2cb18bc86..c18bc052bd2f 100644 --- a/ports/samd/machine_led.c +++ b/ports/samd/machine_led.c @@ -30,7 +30,7 @@ #include "py/mphal.h" #include "extmod/virtpin.h" #include "modmachine.h" -#include "pins.h" +#include "pin_af.h" extern mp_obj_t machine_pin_low_obj; extern mp_obj_t machine_pin_high_obj; @@ -38,8 +38,10 @@ extern mp_obj_t machine_pin_toggle_obj; extern mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args); STATIC void machine_led_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_led_obj_t *self = self_in; - mp_printf(print, "LED(\"%s\")", self->name); + machine_pin_obj_t *self = self_in; + mp_printf(print, "LED(\"%s\", GPIO=P%c%02u)", + pin_name(self->pin_id), + "ABCD"[self->pin_id / 32], self->pin_id % 32); } // constructor(id, ...) @@ -47,23 +49,16 @@ mp_obj_t mp_led_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); // get the wanted LED object - int wanted_led = pin_find(args[0], (const machine_pin_obj_t *)machine_led_obj, MP_ARRAY_SIZE(machine_led_obj)); - const machine_led_obj_t *self = NULL; - if (0 <= wanted_led && wanted_led < MP_ARRAY_SIZE(machine_led_obj)) { - self = (machine_led_obj_t *)&machine_led_obj[wanted_led]; - } - // the array could be padded with 'nulls' (see other Ports). - // Will also error if the asked for LED (index) is greater than the array row size. - if (self == NULL || self->base.type == NULL) { - mp_raise_ValueError(MP_ERROR_TEXT("invalid LED")); - } - mp_hal_pin_output(self->id); - mp_hal_pin_low(self->id); + const machine_pin_obj_t *self; + + self = pin_find(args[0], &machine_led_type); + + mp_hal_pin_output(self->pin_id); + mp_hal_pin_low(self->pin_id); return MP_OBJ_FROM_PTR(self); } - STATIC const mp_rom_map_elem_t machine_led_locals_dict_table[] = { // instance methods { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_low_obj) }, diff --git a/ports/samd/machine_pin.c b/ports/samd/machine_pin.c index 2dc10f9b4634..a7cd86d386ed 100644 --- a/ports/samd/machine_pin.c +++ b/ports/samd/machine_pin.c @@ -34,7 +34,6 @@ #include "extmod/virtpin.h" #include "modmachine.h" #include "samd_soc.h" -#include "pins.h" #include "pin_af.h" #include "hal_gpio.h" @@ -68,17 +67,17 @@ STATIC void machine_pin_print(const mp_print_t *print, mp_obj_t self_in, mp_prin machine_pin_obj_t *self = self_in; char *mode_str; char *pull_str[] = {"PULL_OFF", "PULL_UP", "PULL_DOWN"}; - if (GPIO_IS_OPEN_DRAIN(self->id)) { + if (GPIO_IS_OPEN_DRAIN(self->pin_id)) { mode_str = "OPEN_DRAIN"; } else { - mode_str = (mp_hal_get_pin_direction(self->id) == GPIO_DIRECTION_OUT) ? "OUT" : "IN"; + mode_str = (mp_hal_get_pin_direction(self->pin_id) == GPIO_DIRECTION_OUT) ? "OUT" : "IN"; } mp_printf(print, "Pin(\"%s\", mode=%s, pull=%s, GPIO=P%c%02u)", - self->name, + pin_name(self->pin_id), mode_str, - pull_str[mp_hal_get_pull_mode(self->id)], - "ABCD"[self->id / 32], self->id % 32); + pull_str[mp_hal_get_pull_mode(self->pin_id)], + "ABCD"[self->pin_id / 32], self->pin_id % 32); } STATIC void pin_validate_drive(bool strength) { @@ -87,25 +86,6 @@ STATIC void pin_validate_drive(bool strength) { } } -int pin_find(mp_obj_t pin, const machine_pin_obj_t machine_pin_obj[], int table_size) { - int wanted_pin = -1; - if (mp_obj_is_small_int(pin)) { - // Pin defined by the index of pin table - wanted_pin = mp_obj_get_int(pin); - } else if (mp_obj_is_str(pin)) { - // Search by name - size_t slen; - const char *s = mp_obj_str_get_data(pin, &slen); - for (wanted_pin = 0; wanted_pin < table_size; wanted_pin++) { - if (slen == strlen(machine_pin_obj[wanted_pin].name) && - strncmp(s, machine_pin_obj[wanted_pin].name, slen) == 0) { - break; - } - } - } - return wanted_pin; -} - // Pin.init(mode, pull=None, *, value=None, drive=0). No 'alt' yet. STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) { enum { ARG_mode, ARG_pull, ARG_value, ARG_drive, ARG_alt }; @@ -120,32 +100,34 @@ STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_ mp_arg_val_t args[MP_ARRAY_SIZE(allowed_args)]; mp_arg_parse_all(n_args, pos_args, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); + // clear any existing mux setting + mp_hal_clr_pin_mux(self->pin_id); // set initial value (do this before configuring mode/pull) if (args[ARG_value].u_obj != mp_const_none) { - mp_hal_pin_write(self->id, mp_obj_is_true(args[ARG_value].u_obj)); + mp_hal_pin_write(self->pin_id, mp_obj_is_true(args[ARG_value].u_obj)); } // configure mode if (args[ARG_mode].u_obj != mp_const_none) { mp_int_t mode = mp_obj_get_int(args[ARG_mode].u_obj); if (mode == GPIO_MODE_IN) { - mp_hal_pin_input(self->id); + mp_hal_pin_input(self->pin_id); } else if (mode == GPIO_MODE_OUT) { - mp_hal_pin_output(self->id); + mp_hal_pin_output(self->pin_id); } else if (mode == GPIO_MODE_OPEN_DRAIN) { - mp_hal_pin_open_drain(self->id); + mp_hal_pin_open_drain(self->pin_id); } else { - mp_hal_pin_input(self->id); // If no args are given, the Pin is 'input'. + mp_hal_pin_input(self->pin_id); // If no args are given, the Pin is 'input'. } } // configure pull. Only to be used with IN mode. The function sets the pin to INPUT. uint32_t pull = 0; - mp_int_t dir = mp_hal_get_pin_direction(self->id); + mp_int_t dir = mp_hal_get_pin_direction(self->pin_id); if (dir == GPIO_DIRECTION_OUT && args[ARG_pull].u_obj != mp_const_none) { mp_raise_ValueError(MP_ERROR_TEXT("OUT incompatible with pull")); } else if (args[ARG_pull].u_obj != mp_const_none) { pull = mp_obj_get_int(args[ARG_pull].u_obj); - gpio_set_pin_pull_mode(self->id, pull); // hal_gpio.h + gpio_set_pin_pull_mode(self->pin_id, pull); // hal_gpio.h } // get the strength @@ -158,18 +140,10 @@ STATIC mp_obj_t machine_pin_obj_init_helper(const machine_pin_obj_t *self, size_ // constructor(id, ...) mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); + const machine_pin_obj_t *self; // get the wanted pin object - int wanted_pin = pin_find(args[0], machine_pin_obj, MP_ARRAY_SIZE(machine_pin_obj)); - - const machine_pin_obj_t *self = NULL; - if (0 <= wanted_pin && wanted_pin < MP_ARRAY_SIZE(machine_pin_obj)) { - self = (machine_pin_obj_t *)&machine_pin_obj[wanted_pin]; - } - - if (self == NULL || self->base.type == NULL) { - mp_raise_ValueError(MP_ERROR_TEXT("invalid pin")); - } + self = pin_find(args[0], &machine_pin_type); if (n_args > 1 || n_kw > 0) { // pin mode given, so configure this GPIO @@ -187,18 +161,18 @@ mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp machine_pin_obj_t *self = self_in; if (n_args == 0) { // get pin - return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self->id)); + return MP_OBJ_NEW_SMALL_INT(mp_hal_pin_read(self->pin_id)); } else { // set pin bool value = mp_obj_is_true(args[0]); - if (GPIO_IS_OPEN_DRAIN(self->id)) { + if (GPIO_IS_OPEN_DRAIN(self->pin_id)) { if (value == 0) { - mp_hal_pin_od_low(self->id); + mp_hal_pin_od_low(self->pin_id); } else { - mp_hal_pin_od_high(self->id); + mp_hal_pin_od_high(self->pin_id); } } else { - mp_hal_pin_write(self->id, value); + mp_hal_pin_write(self->pin_id, value); } return mp_const_none; } @@ -219,7 +193,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_pin_value_obj, 1, 2, machine_ // Pin.disable(pin) STATIC mp_obj_t machine_pin_disable(mp_obj_t self_in) { machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); - gpio_set_pin_direction(self->id, GPIO_DIRECTION_OFF); // Disables the pin (low power state) + gpio_set_pin_direction(self->pin_id, GPIO_DIRECTION_OFF); // Disables the pin (low power state) return mp_const_none; } STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_disable_obj, machine_pin_disable); @@ -227,10 +201,10 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_disable_obj, machine_pin_disable); // Pin.low() Totem-pole (push-pull) STATIC mp_obj_t machine_pin_low(mp_obj_t self_in) { machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (GPIO_IS_OPEN_DRAIN(self->id)) { - mp_hal_pin_od_low(self->id); + if (GPIO_IS_OPEN_DRAIN(self->pin_id)) { + mp_hal_pin_od_low(self->pin_id); } else { - mp_hal_pin_low(self->id); + mp_hal_pin_low(self->pin_id); } return mp_const_none; } @@ -239,10 +213,10 @@ MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_low_obj, machine_pin_low); // Pin.high() Totem-pole (push-pull) STATIC mp_obj_t machine_pin_high(mp_obj_t self_in) { machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); - if (GPIO_IS_OPEN_DRAIN(self->id)) { - mp_hal_pin_od_high(self->id); + if (GPIO_IS_OPEN_DRAIN(self->pin_id)) { + mp_hal_pin_od_high(self->pin_id); } else { - mp_hal_pin_high(self->id); + mp_hal_pin_high(self->pin_id); } return mp_const_none; } @@ -255,16 +229,16 @@ STATIC mp_obj_t machine_pin_toggle(mp_obj_t self_in) { // Determine DIRECTION of PIN. bool pin_dir; - if (GPIO_IS_OPEN_DRAIN(self->id)) { - pin_dir = mp_hal_get_pin_direction(self->id); + if (GPIO_IS_OPEN_DRAIN(self->pin_id)) { + pin_dir = mp_hal_get_pin_direction(self->pin_id); if (pin_dir) { // Pin is output, thus low, switch to high - mp_hal_pin_od_high(self->id); + mp_hal_pin_od_high(self->pin_id); } else { - mp_hal_pin_od_low(self->id); + mp_hal_pin_od_low(self->pin_id); } } else { - gpio_toggle_pin_level(self->id); + gpio_toggle_pin_level(self->pin_id); } return mp_const_none; } @@ -280,8 +254,8 @@ STATIC mp_obj_t machine_pin_drive(size_t n_args, const mp_obj_t *args) { pin_validate_drive(strength); // Set the DRVSTR bit (ASF hri/hri_port_dxx.h hri_port_write_PINCFG_DRVSTR_bit(PORT, - (enum gpio_port)GPIO_PORT(self->id), - GPIO_PIN(self->id), + (enum gpio_port)GPIO_PORT(self->pin_id), + GPIO_PIN(self->pin_id), strength); return mp_const_none; } @@ -301,9 +275,9 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_ mp_arg_parse_all(n_args - 1, pos_args + 1, kw_args, MP_ARRAY_SIZE(allowed_args), allowed_args, args); // Get the IRQ object. - uint8_t eic_id = get_pin_af_info(self->id)->eic; + uint8_t eic_id = get_pin_obj_ptr(self->pin_id)->eic; machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]); - if (irq != NULL && irq->pin_id != self->id) { + if (irq != NULL && irq->pin_id != self->pin_id) { mp_raise_ValueError(MP_ERROR_TEXT("IRQ already used")); } @@ -322,7 +296,7 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_ if (n_args > 1 || kw_args->used != 0) { // set the mux config of the pin. - mp_hal_set_pin_mux(self->id, ALT_FCT_EIC); + mp_hal_set_pin_mux(self->pin_id, ALT_FCT_EIC); // Configure IRQ. #if defined(MCU_SAMD21) @@ -362,7 +336,7 @@ STATIC mp_obj_t machine_pin_irq(size_t n_args, const mp_obj_t *pos_args, mp_map_ irq->base.ishard = args[ARG_hard].u_bool; irq->flags = 0; irq->trigger = args[ARG_trigger].u_int; - irq->pin_id = self->id; + irq->pin_id = self->pin_id; // Enable IRQ if a handler is given. if (args[ARG_handler].u_obj != mp_const_none) { @@ -457,10 +431,10 @@ STATIC mp_uint_t pin_ioctl(mp_obj_t self_in, mp_uint_t request, uintptr_t arg, i switch (request) { case MP_PIN_READ: { - return mp_hal_pin_read(self->id); + return mp_hal_pin_read(self->pin_id); } case MP_PIN_WRITE: { - mp_hal_pin_write(self->id, arg); + mp_hal_pin_write(self->pin_id, arg); return 0; } } @@ -494,7 +468,7 @@ static uint8_t find_eic_id(int pin) { STATIC mp_uint_t machine_pin_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger) { machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); - uint8_t eic_id = find_eic_id(self->id); + uint8_t eic_id = find_eic_id(self->pin_id); if (eic_id != 0xff) { machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]); EIC->INTENCLR.reg |= (1 << eic_id); @@ -507,7 +481,7 @@ STATIC mp_uint_t machine_pin_irq_trigger(mp_obj_t self_in, mp_uint_t new_trigger STATIC mp_uint_t machine_pin_irq_info(mp_obj_t self_in, mp_uint_t info_type) { machine_pin_obj_t *self = MP_OBJ_TO_PTR(self_in); - uint8_t eic_id = find_eic_id(self->id); + uint8_t eic_id = find_eic_id(self->pin_id); if (eic_id != 0xff) { machine_pin_irq_obj_t *irq = MP_STATE_PORT(machine_pin_irq_objects[eic_id]); if (info_type == MP_IRQ_INFO_FLAGS) { @@ -525,11 +499,8 @@ STATIC const mp_irq_methods_t machine_pin_irq_methods = { }; mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t obj) { - if (!mp_obj_is_type(obj, &machine_pin_type)) { - mp_raise_ValueError(MP_ERROR_TEXT("expecting a Pin")); - } - machine_pin_obj_t *pin = MP_OBJ_TO_PTR(obj); - return pin->id; + const machine_pin_obj_t *pin = pin_find(obj, &machine_pin_type); + return pin->pin_id; } MP_REGISTER_ROOT_POINTER(void *machine_pin_irq_objects[16]); diff --git a/ports/samd/machine_pwm.c b/ports/samd/machine_pwm.c index d987927d310c..91982a6f74a8 100644 --- a/ports/samd/machine_pwm.c +++ b/ports/samd/machine_pwm.c @@ -107,8 +107,8 @@ STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "PWM P%c%02u device=%u channel=%u output=%u", - "ABCD"[self->pin_id / 32], self->pin_id % 32, self->device, self->channel, self->output); + mp_printf(print, "PWM %s device=%u channel=%u output=%u", + pin_name(self->pin_id), self->device, self->channel, self->output); } // PWM(pin) diff --git a/ports/samd/modsamd.c b/ports/samd/modsamd.c index 05ed69bad014..79e7b4cc35f1 100644 --- a/ports/samd/modsamd.c +++ b/ports/samd/modsamd.c @@ -30,42 +30,40 @@ #include "sam.h" #include "pin_af.h" -#include "pins.h" #include "samd_soc.h" extern const mp_obj_type_t samd_flash_type; STATIC mp_obj_t samd_pininfo(mp_obj_t pin_obj) { - mp_hal_pin_obj_t pin = mp_hal_get_pin_obj(pin_obj); - const pin_af_t *pin_af = get_pin_af_info(pin); - const char *name = ((machine_pin_obj_t *)MP_OBJ_TO_PTR(pin_obj))->name; - if (pin_af) { - #if defined(MCU_SAMD21) - mp_obj_t tuple[7] = { - tuple[0] = mp_obj_new_str(name, strlen(name)), - tuple[1] = mp_obj_new_int(pin_af->eic), - tuple[2] = mp_obj_new_int(pin_af->adc0), - tuple[3] = mp_obj_new_int(pin_af->sercom1), - tuple[4] = mp_obj_new_int(pin_af->sercom2), - tuple[5] = mp_obj_new_int(pin_af->tcc1), - tuple[6] = mp_obj_new_int(pin_af->tcc2), - }; - return mp_obj_new_tuple(7, tuple); - #elif defined(MCU_SAMD51) - mp_obj_t tuple[9] = { - tuple[0] = mp_obj_new_str(name, strlen(name)), - tuple[1] = mp_obj_new_int(pin_af->eic), - tuple[2] = mp_obj_new_int(pin_af->adc0), - tuple[3] = mp_obj_new_int(pin_af->adc1), - tuple[4] = mp_obj_new_int(pin_af->sercom1), - tuple[5] = mp_obj_new_int(pin_af->sercom2), - tuple[6] = mp_obj_new_int(pin_af->tc), - tuple[7] = mp_obj_new_int(pin_af->tcc1), - tuple[8] = mp_obj_new_int(pin_af->tcc2), - }; - return mp_obj_new_tuple(9, tuple); - #endif - } + const machine_pin_obj_t *pin_af = pin_find(pin_obj, NULL); + // Get the name, now that it is not in the pin object + const char *name = pin_af->name; + + #if defined(MCU_SAMD21) + mp_obj_t tuple[7] = { + tuple[0] = mp_obj_new_str(name, strlen(name)), + tuple[1] = mp_obj_new_int(pin_af->eic), + tuple[2] = mp_obj_new_int(pin_af->adc0), + tuple[3] = mp_obj_new_int(pin_af->sercom1), + tuple[4] = mp_obj_new_int(pin_af->sercom2), + tuple[5] = mp_obj_new_int(pin_af->tcc1), + tuple[6] = mp_obj_new_int(pin_af->tcc2), + }; + return mp_obj_new_tuple(7, tuple); + #elif defined(MCU_SAMD51) + mp_obj_t tuple[9] = { + tuple[0] = mp_obj_new_str(name, strlen(name)), + tuple[1] = mp_obj_new_int(pin_af->eic), + tuple[2] = mp_obj_new_int(pin_af->adc0), + tuple[3] = mp_obj_new_int(pin_af->adc1), + tuple[4] = mp_obj_new_int(pin_af->sercom1), + tuple[5] = mp_obj_new_int(pin_af->sercom2), + tuple[6] = mp_obj_new_int(pin_af->tc), + tuple[7] = mp_obj_new_int(pin_af->tcc1), + tuple[8] = mp_obj_new_int(pin_af->tcc2), + }; + return mp_obj_new_tuple(9, tuple); + #endif return mp_const_none; } STATIC MP_DEFINE_CONST_FUN_OBJ_1(samd_pininfo_obj, samd_pininfo); diff --git a/ports/samd/pin_af.c b/ports/samd/pin_af.c index 926c4ae0c23a..fc2a0f3d54d9 100644 --- a/ports/samd/pin_af.c +++ b/ports/samd/pin_af.c @@ -29,7 +29,9 @@ */ #include +#include "string.h" +#include "modmachine.h" #include "py/runtime.h" #include "py/misc.h" #include "pin_af.h" @@ -43,13 +45,65 @@ extern const uint8_t tcc_channel_count[]; // Just look for an table entry for a given pin and raise an error // in case of no match (which should not happen). -const pin_af_t *get_pin_af_info(int pin_id) { +const machine_pin_obj_t *get_pin_obj_ptr(int pin_id) { for (int i = 0; i < MP_ARRAY_SIZE(pin_af_table); i++) { if (pin_af_table[i].pin_id == pin_id) { // Pin match return &pin_af_table[i]; } } - mp_raise_ValueError(MP_ERROR_TEXT("wrong pin")); + mp_raise_ValueError(MP_ERROR_TEXT("not a Pin")); +} + +const machine_pin_obj_t *pin_find(mp_obj_t pin, const mp_obj_type_t *type) { + const machine_pin_obj_t *self = NULL; + // Is already a object of the proper type + if (mp_obj_is_type(pin, type)) { + return pin; + } + if (mp_obj_is_small_int(pin)) { + // Pin defined by pin number for PAnn, PBnn, etc. + self = get_pin_obj_ptr(mp_obj_get_int(pin)); + } else if (mp_obj_is_str(pin)) { + // Search by name + size_t slen; + const char *s = mp_obj_str_get_data(pin, &slen); + // Check for a string like PA02 or PD12 + if (slen == 4 && s[0] == 'P' && strchr("ABCD", s[1]) != NULL && + strchr("0123456789", s[2]) != NULL && strchr("0123456789", s[2]) != NULL) { + int num = (s[1] - 'A') * 32 + (s[2] - '0') * 10 + (s[3] - '0'); + self = get_pin_obj_ptr(num); + } else { + for (int i = 0; i < MP_ARRAY_SIZE(pin_af_table); i++) { + if (slen == strlen(pin_af_table[i].name) && + strncmp(s, pin_af_table[i].name, slen) == 0) { + self = &pin_af_table[i]; + } + } + } + } + if (self != NULL && (type == NULL || mp_obj_is_type(self, type))) { + return self; + } else { + mp_raise_ValueError(MP_ERROR_TEXT("not a Pin")); + } +} + +const char *pin_name(int id) { + static char board_name[5] = "Pxnn"; + for (int i = 0; i < sizeof(pin_af_table); i++) { + if (pin_af_table[i].pin_id == id) { + if (pin_af_table[i].name[0] != '-') { + return pin_af_table[i].name; + } else { + board_name[1] = "ABCD"[id / 32]; + id %= 32; + board_name[2] = '0' + id / 10; + board_name[3] = '0' + id % 10; + return board_name; + } + } + } + return "-"; } // Test, wether the given pin is defined and has signals for sercom. @@ -57,7 +111,7 @@ const pin_af_t *get_pin_af_info(int pin_id) { // If not, an error will be raised. sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom_nr) { - const pin_af_t *pct_ptr = get_pin_af_info(pin_id); + const machine_pin_obj_t *pct_ptr = get_pin_obj_ptr(pin_id); if ((pct_ptr->sercom1 >> 4) == sercom_nr) { return (sercom_pad_config_t) {ALT_FCT_SERCOM1, pct_ptr->sercom1 & 0x0f}; } else if ((pct_ptr->sercom2 >> 4) == sercom_nr) { @@ -72,7 +126,12 @@ sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom_nr) { // If not, an error will be raised. adc_config_t get_adc_config(int pin_id, int32_t flag) { - const pin_af_t *pct_ptr = get_pin_af_info(pin_id); + const machine_pin_obj_t *pct_ptr = get_pin_obj_ptr(pin_id); + #if defined(MCU_SAMD51) + if (pct_ptr->adc1 != 0xff && (flag & (1 << (pct_ptr->adc1 + 16))) == 0) { + return (adc_config_t) {1, pct_ptr->adc1}; + } else + #endif if (pct_ptr->adc0 != 0xff && (flag & (1 << pct_ptr->adc0)) == 0) { return (adc_config_t) {0, pct_ptr->adc0}; #if defined(MUC_SAMD51) @@ -91,7 +150,7 @@ adc_config_t get_adc_config(int pin_id, int32_t flag) { // tries to provide an unused device, if available. pwm_config_t get_pwm_config(int pin_id, int wanted_dev, uint8_t device_status[]) { - const pin_af_t *pct_ptr = get_pin_af_info(pin_id); + const machine_pin_obj_t *pct_ptr = get_pin_obj_ptr(pin_id); uint8_t tcc1 = pct_ptr->tcc1; uint8_t tcc2 = pct_ptr->tcc2; diff --git a/ports/samd/pin_af.h b/ports/samd/pin_af.h index b75f4ddd0256..5bb65a098a65 100644 --- a/ports/samd/pin_af.h +++ b/ports/samd/pin_af.h @@ -30,15 +30,17 @@ #if defined(MCU_SAMD21) -typedef struct { +typedef struct _machine_pin_obj_t { + mp_obj_base_t base; uint8_t pin_id; + char *name; uint8_t eic; uint8_t adc0; uint8_t sercom1; uint8_t sercom2; uint8_t tcc1; uint8_t tcc2; -} pin_af_t; +} machine_pin_obj_t; #define ALT_FCT_TC 4 #define ALT_FCT_TCC1 4 @@ -46,8 +48,10 @@ typedef struct { #elif defined(MCU_SAMD51) -typedef struct { +typedef struct _machine_pin_obj_t { + mp_obj_base_t base; uint8_t pin_id; + char *name; uint8_t eic; uint8_t adc0; uint8_t adc1; @@ -56,7 +60,7 @@ typedef struct { uint8_t tc; uint8_t tcc1; uint8_t tcc2; -} pin_af_t; +} machine_pin_obj_t; #define ALT_FCT_TC 4 #define ALT_FCT_TCC1 5 @@ -85,7 +89,11 @@ typedef struct _pwm_config_t { #define ALT_FCT_SERCOM1 2 #define ALT_FCT_SERCOM2 3 +extern const machine_pin_obj_t pin_af_table[]; + sercom_pad_config_t get_sercom_config(int pin_id, uint8_t sercom); adc_config_t get_adc_config(int pin_id, int32_t flag); pwm_config_t get_pwm_config(int pin_id, int wanted_dev, uint8_t used_dev[]); -const pin_af_t *get_pin_af_info(int pin_id); +const machine_pin_obj_t *get_pin_obj_ptr(int pin_id); +const char *pin_name(int id); +const machine_pin_obj_t *pin_find(mp_obj_t pin, const mp_obj_type_t *type); From 4d38ab652ea57a60c6f2ff085547f72012ac7df6 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Fri, 7 Oct 2022 09:40:45 +0200 Subject: [PATCH 036/823] samd: Make ADC, DAC, PWM, SPI objects consistent in how they print out. All of ADC, DAC, Pin, PWM and SPI looked different before this change. --- ports/samd/machine_adc.c | 2 +- ports/samd/machine_dac.c | 2 +- ports/samd/machine_pwm.c | 2 +- ports/samd/machine_spi.c | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/ports/samd/machine_adc.c b/ports/samd/machine_adc.c index efe0f041cdfa..8fd3e3bf4e7f 100644 --- a/ports/samd/machine_adc.c +++ b/ports/samd/machine_adc.c @@ -66,7 +66,7 @@ STATIC void adc_obj_print(const mp_print_t *print, mp_obj_t o, mp_print_kind_t k (void)kind; machine_adc_obj_t *self = MP_OBJ_TO_PTR(o); - mp_printf(print, "ADC(%s, ADC%u, channel=%u, bits=%u, average=%u)", + mp_printf(print, "ADC(%s, device=%u, channel=%u, bits=%u, average=%u)", pin_name(self->id), self->adc_config.device, self->adc_config.channel, self->bits, 1 << self->avg); } diff --git a/ports/samd/machine_dac.c b/ports/samd/machine_dac.c index 41c6784cceb8..53407c0d375a 100644 --- a/ports/samd/machine_dac.c +++ b/ports/samd/machine_dac.c @@ -126,7 +126,7 @@ STATIC mp_obj_t dac_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_ STATIC void dac_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { dac_obj_t *self = self_in; - mp_printf(print, "DAC(%u) PIN_PA%02u", self->id, self->gpio_id); + mp_printf(print, "DAC(%u, Pin=%s)", self->id, pin_name(self->gpio_id)); } STATIC mp_obj_t dac_write(mp_obj_t self_in, mp_obj_t value_in) { diff --git a/ports/samd/machine_pwm.c b/ports/samd/machine_pwm.c index 91982a6f74a8..2ae841a9743b 100644 --- a/ports/samd/machine_pwm.c +++ b/ports/samd/machine_pwm.c @@ -107,7 +107,7 @@ STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns STATIC void mp_machine_pwm_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { machine_pwm_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "PWM %s device=%u channel=%u output=%u", + mp_printf(print, "PWM(%s, device=%u, channel=%u, output=%u)", pin_name(self->pin_id), self->device, self->channel, self->output); } diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c index 8321f19cf0dd..43150f67f15a 100644 --- a/ports/samd/machine_spi.c +++ b/ports/samd/machine_spi.c @@ -82,7 +82,7 @@ void common_spi_irq_handler(int spi_id) { STATIC void machine_spi_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); - mp_printf(print, "SPI(%u), baudrate=%u, firstbit=%u, polarity=%u, phase=%u, bits=8", + mp_printf(print, "SPI(%u, baudrate=%u, firstbit=%u, polarity=%u, phase=%u, bits=8)", self->id, self->baudrate, self->firstbit, self->polarity, self->phase); } From a6760bd4efa883ef463795036ff74d678ff65c7b Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sun, 9 Oct 2022 10:56:29 +0200 Subject: [PATCH 037/823] samd/modmachine: Replace the LED class by the Signal class. It simplifies and improves the code. The LED_Pxxx lines of the board.csv lines can still be used, but will be taken as Pin definitions. --- ports/samd/Makefile | 1 - ports/samd/boards/make-pin-table.py | 6 +-- ports/samd/machine_led.c | 78 ----------------------------- ports/samd/machine_pin.c | 4 +- ports/samd/modmachine.c | 3 +- ports/samd/modmachine.h | 1 - ports/samd/modsamd.c | 2 +- ports/samd/mpconfigport.h | 1 + ports/samd/pin_af.c | 6 +-- ports/samd/pin_af.h | 2 +- 10 files changed, 11 insertions(+), 93 deletions(-) delete mode 100644 ports/samd/machine_led.c diff --git a/ports/samd/Makefile b/ports/samd/Makefile index f512fb0b2e33..b2e84460ea26 100644 --- a/ports/samd/Makefile +++ b/ports/samd/Makefile @@ -88,7 +88,6 @@ SRC_C += \ machine_bitstream.c \ machine_dac.c \ machine_i2c.c \ - machine_led.c \ machine_pin.c \ machine_rtc.c \ machine_spi.c \ diff --git a/ports/samd/boards/make-pin-table.py b/ports/samd/boards/make-pin-table.py index 327478568afa..40bcd166dd08 100644 --- a/ports/samd/boards/make-pin-table.py +++ b/ports/samd/boards/make-pin-table.py @@ -36,11 +36,7 @@ def parse_pin_file(self, filename): # for compatibility, map LED_ to PIN_ if row[0].startswith("LED_"): row[0] = "PIN_" + row[0][4:] - if len(row) == 1: - self.pin_names[row[0]] = (row[0][4:], "{&machine_led_type}") - else: - self.pin_names[row[0]] = (row[1], "{&machine_led_type}") - elif row[0].startswith("PIN_"): + if row[0].startswith("PIN_"): if len(row) == 1: self.pin_names[row[0]] = (row[0][4:], "{&machine_pin_type}") else: diff --git a/ports/samd/machine_led.c b/ports/samd/machine_led.c deleted file mode 100644 index c18bc052bd2f..000000000000 --- a/ports/samd/machine_led.c +++ /dev/null @@ -1,78 +0,0 @@ -/* - * This is part of the MicroPython project, http://micropython.org/ - * - * The MIT License (MIT) - * - * Copyright (c) 2016-2021 Damien P. George - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * Uses pins.h & pins.c to create board (MCU package) specific 'machine_led_obj' array. - */ - -#include "py/runtime.h" -#include "py/mphal.h" -#include "extmod/virtpin.h" -#include "modmachine.h" -#include "pin_af.h" - -extern mp_obj_t machine_pin_low_obj; -extern mp_obj_t machine_pin_high_obj; -extern mp_obj_t machine_pin_toggle_obj; -extern mp_obj_t machine_pin_call(mp_obj_t self_in, size_t n_args, size_t n_kw, const mp_obj_t *args); - -STATIC void machine_led_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) { - machine_pin_obj_t *self = self_in; - mp_printf(print, "LED(\"%s\", GPIO=P%c%02u)", - pin_name(self->pin_id), - "ABCD"[self->pin_id / 32], self->pin_id % 32); -} - -// constructor(id, ...) -mp_obj_t mp_led_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *args) { - mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true); - - // get the wanted LED object - const machine_pin_obj_t *self; - - self = pin_find(args[0], &machine_led_type); - - mp_hal_pin_output(self->pin_id); - mp_hal_pin_low(self->pin_id); - - return MP_OBJ_FROM_PTR(self); -} - -STATIC const mp_rom_map_elem_t machine_led_locals_dict_table[] = { - // instance methods - { MP_ROM_QSTR(MP_QSTR_off), MP_ROM_PTR(&machine_pin_low_obj) }, - { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_high_obj) }, - { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&machine_pin_toggle_obj) }, -}; -STATIC MP_DEFINE_CONST_DICT(machine_led_locals_dict, machine_led_locals_dict_table); - -MP_DEFINE_CONST_OBJ_TYPE( - machine_led_type, - MP_QSTR_LED, - MP_TYPE_FLAG_NONE, - make_new, mp_led_make_new, - print, machine_led_print, - call, machine_pin_call, - locals_dict, &machine_led_locals_dict - ); diff --git a/ports/samd/machine_pin.c b/ports/samd/machine_pin.c index a7cd86d386ed..87684858325f 100644 --- a/ports/samd/machine_pin.c +++ b/ports/samd/machine_pin.c @@ -143,7 +143,7 @@ mp_obj_t mp_pin_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const machine_pin_obj_t *self; // get the wanted pin object - self = pin_find(args[0], &machine_pin_type); + self = pin_find(args[0]); if (n_args > 1 || n_kw > 0) { // pin mode given, so configure this GPIO @@ -499,7 +499,7 @@ STATIC const mp_irq_methods_t machine_pin_irq_methods = { }; mp_hal_pin_obj_t mp_hal_get_pin_obj(mp_obj_t obj) { - const machine_pin_obj_t *pin = pin_find(obj, &machine_pin_type); + const machine_pin_obj_t *pin = pin_find(obj); return pin->pin_id; } diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index 12e9f7c34134..47fc03d82410 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -29,6 +29,7 @@ #include "extmod/machine_mem.h" #include "extmod/machine_pulse.h" #include "extmod/machine_i2c.h" +#include "extmod/machine_signal.h" #include "extmod/machine_spi.h" #include "drivers/dht/dht.h" #include "modmachine.h" @@ -228,8 +229,8 @@ STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_ADC), MP_ROM_PTR(&machine_adc_type) }, { MP_ROM_QSTR(MP_QSTR_DAC), MP_ROM_PTR(&machine_dac_type) }, - { MP_ROM_QSTR(MP_QSTR_LED), MP_ROM_PTR(&machine_led_type) }, { MP_ROM_QSTR(MP_QSTR_Pin), MP_ROM_PTR(&machine_pin_type) }, + { MP_ROM_QSTR(MP_QSTR_Signal), MP_ROM_PTR(&machine_signal_type) }, { MP_ROM_QSTR(MP_QSTR_PWM), MP_ROM_PTR(&machine_pwm_type) }, { MP_ROM_QSTR(MP_QSTR_SoftI2C), MP_ROM_PTR(&mp_machine_soft_i2c_type) }, { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&machine_i2c_type) }, diff --git a/ports/samd/modmachine.h b/ports/samd/modmachine.h index 8f85e149896f..792fca1b9292 100644 --- a/ports/samd/modmachine.h +++ b/ports/samd/modmachine.h @@ -31,7 +31,6 @@ extern const mp_obj_type_t machine_adc_type; extern const mp_obj_type_t machine_dac_type; extern const mp_obj_type_t machine_i2c_type; -extern const mp_obj_type_t machine_led_type; extern const mp_obj_type_t machine_pin_type; extern const mp_obj_type_t machine_pwm_type; extern const mp_obj_type_t machine_spi_type; diff --git a/ports/samd/modsamd.c b/ports/samd/modsamd.c index 79e7b4cc35f1..5a2cf4616d1d 100644 --- a/ports/samd/modsamd.c +++ b/ports/samd/modsamd.c @@ -35,7 +35,7 @@ extern const mp_obj_type_t samd_flash_type; STATIC mp_obj_t samd_pininfo(mp_obj_t pin_obj) { - const machine_pin_obj_t *pin_af = pin_find(pin_obj, NULL); + const machine_pin_obj_t *pin_af = pin_find(pin_obj); // Get the name, now that it is not in the pin object const char *name = pin_af->name; diff --git a/ports/samd/mpconfigport.h b/ports/samd/mpconfigport.h index 8b8305f0b47e..f03f8a11d764 100644 --- a/ports/samd/mpconfigport.h +++ b/ports/samd/mpconfigport.h @@ -100,6 +100,7 @@ #define MICROPY_PY_MACHINE_PWM_INIT (0) #define MICROPY_PY_MACHINE_PWM_DUTY_U16_NS (1) #define MICROPY_PY_MACHINE_PWM_INCLUDEFILE "ports/samd/machine_pwm.c" +#define MICROPY_PY_MACHINE_PIN_MAKE_NEW mp_pin_make_new #define MP_STATE_PORT MP_STATE_VM diff --git a/ports/samd/pin_af.c b/ports/samd/pin_af.c index fc2a0f3d54d9..a7a72ac96abe 100644 --- a/ports/samd/pin_af.c +++ b/ports/samd/pin_af.c @@ -54,10 +54,10 @@ const machine_pin_obj_t *get_pin_obj_ptr(int pin_id) { mp_raise_ValueError(MP_ERROR_TEXT("not a Pin")); } -const machine_pin_obj_t *pin_find(mp_obj_t pin, const mp_obj_type_t *type) { +const machine_pin_obj_t *pin_find(mp_obj_t pin) { const machine_pin_obj_t *self = NULL; // Is already a object of the proper type - if (mp_obj_is_type(pin, type)) { + if (mp_obj_is_type(pin, &machine_pin_type)) { return pin; } if (mp_obj_is_small_int(pin)) { @@ -81,7 +81,7 @@ const machine_pin_obj_t *pin_find(mp_obj_t pin, const mp_obj_type_t *type) { } } } - if (self != NULL && (type == NULL || mp_obj_is_type(self, type))) { + if (self != NULL) { return self; } else { mp_raise_ValueError(MP_ERROR_TEXT("not a Pin")); diff --git a/ports/samd/pin_af.h b/ports/samd/pin_af.h index 5bb65a098a65..4b0c80250cd5 100644 --- a/ports/samd/pin_af.h +++ b/ports/samd/pin_af.h @@ -96,4 +96,4 @@ adc_config_t get_adc_config(int pin_id, int32_t flag); pwm_config_t get_pwm_config(int pin_id, int wanted_dev, uint8_t used_dev[]); const machine_pin_obj_t *get_pin_obj_ptr(int pin_id); const char *pin_name(int id); -const machine_pin_obj_t *pin_find(mp_obj_t pin, const mp_obj_type_t *type); +const machine_pin_obj_t *pin_find(mp_obj_t pin); From ac1e31267b0bf21caa31b8136208c116b1612789 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 8 Oct 2022 21:12:50 +0200 Subject: [PATCH 038/823] samd/boards: Rework the pins.csv files. Changes are: - Remove the LED_Pxxx definitions from pins.csv, now that the LED class is gone. - Remove the '-' lines. - Add default lines for USB and SWCLK, SWDIO. --- .../boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv | 11 ++++++++--- .../boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv | 10 ++++++---- .../boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv | 8 +++++--- .../boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv | 9 ++++++--- ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv | 8 +++++++- ports/samd/boards/MINISAM_M4/pins.csv | 9 ++++++++- ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv | 15 +++++++-------- ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv | 11 +++++++++-- ports/samd/boards/SEEED_XIAO/pins.csv | 12 +++++++++--- .../boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv | 15 +++++++++------ 10 files changed, 74 insertions(+), 34 deletions(-) diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv index 0985ee1646d1..45b05c2694f5 100644 --- a/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv +++ b/ports/samd/boards/ADAFRUIT_FEATHER_M0_EXPRESS/pins.csv @@ -5,6 +5,9 @@ # Rows for empty entries have to start with '-' # Empty lines and lines starting with # are ignored +PIN_PA27,LED_TX +PIN_PB03,LED_RX + PIN_PA11,D0 PIN_PA10,D1 PIN_PA14,D2 @@ -35,6 +38,8 @@ PIN_PB11,SCK PIN_PA06,NEOPIXEL PIN_PA13,FLASH_CS -LED_PA17,LED -LED_PA27,LED_TX -LED_PB03,LED_RX +PIN_PA24,USB_DM +PIN_PA25,USB_DP + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv index 32daac3d0f4c..ca58a4be79f6 100644 --- a/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv +++ b/ports/samd/boards/ADAFRUIT_FEATHER_M4_EXPRESS/pins.csv @@ -7,12 +7,9 @@ PIN_PB17,D0 PIN_PB16,D1 -- -- PIN_PA14,D4 PIN_PA16,D5 PIN_PA18,D6 -- PIN_PB03,D8 PIN_PA19,D9 PIN_PA20,D10 @@ -40,4 +37,9 @@ PIN_PA09,FLASH_MISO PIN_PA10,FLASH_WP PIN_PA11,FLASH_HOLD -LED_PA17,LED +PIN_PA24,USB_DM +PIN_PA25,USB_DP +PIN_PA26,USB_SOF + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv index d7d59c23575d..e93e00ab9c94 100644 --- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv +++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M0_EXPRESS/pins.csv @@ -11,9 +11,7 @@ PIN_PA14,D2 PIN_PA09,D3 PIN_PA08,D4 PIN_PA15,D5 -- PIN_PA21,D7 -- PIN_PA07,D9 PIN_PA18,D10 PIN_PA16,D11 @@ -37,4 +35,8 @@ PIN_PB03,FLASH_MISO PIN_PB23,FLASH_SCK PIN_PA27,FLASH_CS -LED_PA17,LED +PIN_PA24,USB_DM +PIN_PA25,USB_DP + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv index ce760a269c24..3dee9bf4c35d 100644 --- a/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv +++ b/ports/samd/boards/ADAFRUIT_ITSYBITSY_M4_EXPRESS/pins.csv @@ -11,9 +11,7 @@ PIN_PA07,D2 PIN_PB22,D3 PIN_PA14,D4 PIN_PA15,D5 -- PIN_PA18,D7 -- PIN_PA19,D9 PIN_PA20,D10 PIN_PA21,D11 @@ -39,4 +37,9 @@ PIN_PA09,FLASH_MISO PIN_PA10,FLASH_WP PIN_PA11,FLASH_HOLD -LED_PA22,LED +PIN_PA24,USB_DM +PIN_PA25,USB_DP +PIN_PA26,USB_SOF + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv b/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv index 797b3f70bb92..95f76815f980 100644 --- a/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv +++ b/ports/samd/boards/ADAFRUIT_TRINKET_M0/pins.csv @@ -13,4 +13,10 @@ PIN_PA06,D4 PIN_PA00,DOTSTAR_DATA PIN_PA01,DOTSTAR_CLK -LED_PA10,LED +PIN_PA10,LED + +PIN_PA24,USB_DM +PIN_PA25,USB_DP + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/MINISAM_M4/pins.csv b/ports/samd/boards/MINISAM_M4/pins.csv index cf9a3bd19b21..f6d0ab657fef 100644 --- a/ports/samd/boards/MINISAM_M4/pins.csv +++ b/ports/samd/boards/MINISAM_M4/pins.csv @@ -27,4 +27,11 @@ PIN_PA01,SCK PIN_PB03,DOTSTAR_DATA PIN_PB02,DOTSTAR_CLK -LED_PA15,LED +PIN_PA15,LED + +PIN_PA24,USB_DM +PIN_PA25,USB_DP +PIN_PA26,USB_SOF + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv b/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv index 438119d90c1a..bd0757d5647c 100644 --- a/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv +++ b/ports/samd/boards/SAMD21_XPLAINED_PRO/pins.csv @@ -32,8 +32,6 @@ PIN_PB12,EXT2_PIN7 PIN_PB13,EXT2_PIN8 PIN_PB14,EXT2_PIN9 PIN_PB15,EXT2_PIN10 -- -- PIN_PB11,EXT2_PIN13 PIN_PB10,EXT2_PIN14 PIN_PA17,EXT2_PIN15 @@ -44,20 +42,21 @@ PIN_PA19,EXT2_PIN18 # EXT3 PIN_PA02,EXT3_PIN3 PIN_PA03,EXT3_PIN4 -- PIN_PA15,EXT3_PIN6 PIN_PA12,EXT3_PIN7 PIN_PA13,EXT3_PIN8 PIN_PA28,EXT3_PIN9 PIN_PA27,EXT3_PIN10 -- -- -- -- PIN_PB17,EXT3_PIN15 PIN_PB22,EXT3_PIN16 PIN_PB16,EXT3_PIN17 PIN_PB23,EXT3_PIN18 -LED_PB30,LED +PIN_PB30,LED + +PIN_PA24,USB_DM +PIN_PA25,USB_DP + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv index 9bc57070d198..4a3d9e21aee0 100644 --- a/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv +++ b/ports/samd/boards/SEEED_WIO_TERMINAL/pins.csv @@ -60,5 +60,12 @@ PIN_PC13,LCD_YD PIN_PC30,MIC PIN_PD11,BUZZER -LED_PA15,LED_BLUE -LED_PC05,LED_LCD +PIN_PA15,LED_BLUE +PIN_PC05,LED_LCD + +PIN_PA24,USB_DM +PIN_PA25,USB_DP +PIN_PA26,USB_SOF + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/SEEED_XIAO/pins.csv b/ports/samd/boards/SEEED_XIAO/pins.csv index 8a70a7714563..a06d3ac6ac60 100644 --- a/ports/samd/boards/SEEED_XIAO/pins.csv +++ b/ports/samd/boards/SEEED_XIAO/pins.csv @@ -17,6 +17,12 @@ PIN_PA07,A8_D8 PIN_PA05,A9_D9 PIN_PA06,A10_D10 -LED_PA17,USER_LED -LED_PA18,RX_LED -LED_PA19,TX_LED +PIN_PA17,USER_LED +PIN_PA18,RX_LED +PIN_PA19,TX_LED + +PIN_PA24,USB_DM +PIN_PA25,USB_DP + +PIN_PA30,SWCLK +PIN_PA31,SWDIO diff --git a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv index b60fb909714e..dfd6641333fa 100644 --- a/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv +++ b/ports/samd/boards/SPARKFUN_SAMD51_THING_PLUS/pins.csv @@ -13,7 +13,6 @@ PIN_PA06,D4 PIN_PA15,D5 PIN_PA20,D6 PIN_PA21,D7 -- PIN_PA07,D9 PIN_PA18,D10 PIN_PA16,D11 @@ -34,9 +33,13 @@ PIN_PA08,FLASH_MOSI PIN_PA09,FLASH_SCK PIN_PA10,FLASH_CS PIN_PA11,FLASH_MISO -PIN_PA30,SWDCLK -PIN_PA31,SWDIO -LED_PA17,LED -LED_PB03,RXLED -LED_PA27,TXLED +PIN_PB03,RXLED +PIN_PA27,TXLED + +PIN_PA24,USB_DM +PIN_PA25,USB_DP +PIN_PA26,USB_SOF + +PIN_PA30,SWCLK +PIN_PA31,SWDIO From 474233c250536612a5245231aff1ef3ad74ccf20 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Tue, 11 Oct 2022 10:05:01 +0200 Subject: [PATCH 039/823] samd/machine_pwm: Serialize fast update of PWM settings. Any update of freq or duty_cycle requires the previous PWM cycle to be finished. Otherwise the new settings are not accepted. Other changes in this commit: - Report the set duty cycles even when the PWM is not yet started. - pwm.freq(0) stops the pwm device, instead of raising an expception. - Clear the duty cycle value cache on soft reset. --- ports/samd/machine_pwm.c | 51 ++++++++++++++++++++++++++++++++++++---- 1 file changed, 46 insertions(+), 5 deletions(-) diff --git a/ports/samd/machine_pwm.c b/ports/samd/machine_pwm.c index 2ae841a9743b..f6b417631e1d 100644 --- a/ports/samd/machine_pwm.c +++ b/ports/samd/machine_pwm.c @@ -25,6 +25,7 @@ * THE SOFTWARE. */ +#include #include "py/runtime.h" #include "py/mphal.h" #include "modmachine.h" @@ -46,6 +47,8 @@ typedef struct _machine_pwm_obj_t { uint8_t output; uint16_t prescaler; uint32_t period; // full period count ticks + uint32_t duty_ns; // just for reporting + uint16_t duty_u16; // just for reporting } machine_pwm_obj_t; #define PWM_NOT_INIT (0) @@ -53,6 +56,7 @@ typedef struct _machine_pwm_obj_t { #define PWM_TCC_ENABLED (2) #define PWM_MASTER_CLK (get_peripheral_freq()) #define PWM_FULL_SCALE (65536) +#define PWM_UPDATE_TIMEOUT (2000) static Tcc *tcc_instance[] = TCC_INSTS; @@ -148,6 +152,7 @@ STATIC mp_obj_t mp_machine_pwm_make_new(const mp_obj_type_t *type, size_t n_args self->output = config.device_channel & 0x0f; self->prescaler = 1; self->period = 1; // Use an invalid but safe value + self->duty_u16 = self->duty_ns = 0; put_duty_value(self->device, self->channel, 0); Tcc *tcc = self->instance; @@ -240,6 +245,7 @@ void pwm_deinit_all(void) { device_status[i] = PWM_NOT_INIT; duty_type_flags[i] = 0; output_active[i] = 0; + memset(pwm_duty_values, 0, sizeof(pwm_duty_values)); } } @@ -256,8 +262,25 @@ STATIC void mp_machine_pwm_deinit(machine_pwm_obj_t *self) { } } +STATIC void wait_for_register_update(Tcc *tcc) { + // Wait for a period's end (may be long) to have the change settled + // Each loop cycle takes at least 1 ms, giving an implicit timeout. + for (int i = 0; i < PWM_UPDATE_TIMEOUT; i++) { + if (tcc->INTFLAG.reg & TCC_INTFLAG_OVF) { + break; + } + MICROPY_EVENT_POLL_HOOK + } + // Clear the flag, telling that a cycle has been handled. + tcc->INTFLAG.reg = TCC_INTFLAG_OVF; +} + STATIC mp_obj_t mp_machine_pwm_freq_get(machine_pwm_obj_t *self) { - return MP_OBJ_NEW_SMALL_INT(PWM_MASTER_CLK / self->prescaler / self->period); + if (self->instance->CTRLA.reg & TCC_CTRLA_ENABLE) { + return MP_OBJ_NEW_SMALL_INT(PWM_MASTER_CLK / self->prescaler / self->period); + } else { + return MP_OBJ_NEW_SMALL_INT(0); + } } STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) { @@ -267,7 +290,8 @@ STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) { Tcc *tcc = self->instance; if (freq < 1) { - mp_raise_ValueError(MP_ERROR_TEXT("invalid freq")); + pwm_stop_device(self->device); + return; } // Get the actual settings of prescaler & period from the unit @@ -288,6 +312,11 @@ STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) { if (period < 2) { mp_raise_ValueError(MP_ERROR_TEXT("freq too large")); } + // If the PWM is running, ensure that a cycle has passed since the + // previous setting before setting a new frequency/duty value + if (tcc->CTRLA.reg & TCC_CTRLA_ENABLE) { + wait_for_register_update(tcc); + } // Check, if the prescaler has to be changed and stop the device if so. if (index != tcc->CTRLA.bit.PRESCALER) { // stop the device @@ -339,25 +368,37 @@ STATIC void mp_machine_pwm_freq_set(machine_pwm_obj_t *self, mp_int_t freq) { } STATIC mp_obj_t mp_machine_pwm_duty_get_u16(machine_pwm_obj_t *self) { - return MP_OBJ_NEW_SMALL_INT(self->instance->CC[self->channel].reg * PWM_FULL_SCALE / (self->instance->PER.reg + 1)); + return MP_OBJ_NEW_SMALL_INT(self->duty_u16); } STATIC void mp_machine_pwm_duty_set_u16(machine_pwm_obj_t *self, mp_int_t duty_u16) { + // Remember the values for update & reporting put_duty_value(self->device, self->channel, duty_u16); + self->duty_u16 = duty_u16; + self->duty_ns = 0; // If the device is enabled, than the period is set and we get a reasonable value for // the duty cycle, set to the CCBUF register. Otherwise, PWM does not start. if (self->instance->CTRLA.reg & TCC_CTRLA_ENABLE) { - self->instance->CCBUF[self->channel].reg = (uint64_t)duty_u16 * (self->instance->PER.reg + 1) / PWM_FULL_SCALE; + // Ensure that a cycle has passed updating the registers + // since the previous setting before setting a new duty value + wait_for_register_update(self->instance); + self->instance->CCBUF[self->channel].reg = (uint64_t)duty_u16 * (self->period) / PWM_FULL_SCALE; } duty_type_flags[self->device] |= 1 << self->channel; } STATIC mp_obj_t mp_machine_pwm_duty_get_ns(machine_pwm_obj_t *self) { - return MP_OBJ_NEW_SMALL_INT(1000000000ULL * self->instance->CC[self->channel].reg * self->prescaler / PWM_MASTER_CLK); + return MP_OBJ_NEW_SMALL_INT(self->duty_ns); } STATIC void mp_machine_pwm_duty_set_ns(machine_pwm_obj_t *self, mp_int_t duty_ns) { + // Remember the values for update & reporting put_duty_value(self->device, self->channel, duty_ns); + self->duty_ns = duty_ns; + self->duty_u16 = 0; + // Ensure that a cycle has passed updating the registers + // since the previous setting before setting a new duty value + wait_for_register_update(self->instance); self->instance->CCBUF[self->channel].reg = (uint64_t)duty_ns * PWM_MASTER_CLK / self->prescaler / 1000000000ULL; duty_type_flags[self->device] &= ~(1 << self->channel); } From 9c2bc379f183ff9f3280842eb236e8f4b8635835 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 8 Oct 2022 12:32:55 +0200 Subject: [PATCH 040/823] samd/machine_uart: Use a finaliser to tidy up UART on soft reset. And use the common sercom_table, saving a few bytes of RAM. --- ports/samd/machine_uart.c | 22 ++++++++-------------- ports/samd/main.c | 2 -- 2 files changed, 8 insertions(+), 16 deletions(-) diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c index 76b564e874a6..2526b450931b 100644 --- a/ports/samd/machine_uart.c +++ b/ports/samd/machine_uart.c @@ -59,7 +59,7 @@ typedef struct _machine_uart_obj_t { } machine_uart_obj_t; Sercom *sercom_instance[] = SERCOM_INSTS; -machine_uart_obj_t *uart_table[SERCOM_INST_NUM] = {}; +extern void *sercom_table[SERCOM_INST_NUM]; STATIC const char *_parity_name[] = {"None", "", "0", "1"}; // Is defined as 0, 2, 3 @@ -82,7 +82,7 @@ STATIC void uart_drain_rx_fifo(machine_uart_obj_t *self, Sercom *uart) { } void common_uart_irq_handler(int uart_id) { - machine_uart_obj_t *self = uart_table[uart_id]; + machine_uart_obj_t *self = sercom_table[uart_id]; // Handle IRQ if (self != NULL) { Sercom *uart = sercom_instance[self->id]; @@ -322,7 +322,8 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, } // Create the UART object and fill it with defaults. - machine_uart_obj_t *self = mp_obj_malloc(machine_uart_obj_t, &machine_uart_type); + machine_uart_obj_t *self = m_new_obj_with_finaliser(machine_uart_obj_t); + self->base.type = &machine_uart_type; self->id = uart_id; self->baudrate = DEFAULT_UART_BAUDRATE; self->bits = 8; @@ -332,7 +333,7 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, self->tx = 0xff; self->rx = 0xff; self->new = true; - uart_table[uart_id] = self; + sercom_table[uart_id] = self; mp_map_t kw_args; mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); @@ -348,10 +349,10 @@ MP_DEFINE_CONST_FUN_OBJ_KW(machine_uart_init_obj, 1, machine_uart_init); STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) { machine_uart_obj_t *self = MP_OBJ_TO_PTR(self_in); Sercom *uart = sercom_instance[self->id]; - // clear table entry of uart - uart_table[self->id] = NULL; // Disable interrupts uart->USART.INTENCLR.reg = 0xff; + // clear table entry of uart + sercom_table[self->id] = NULL; MP_STATE_PORT(samd_uart_rx_buffer[self->id]) = NULL; #if MICROPY_HW_UART_TXBUF MP_STATE_PORT(samd_uart_tx_buffer[self->id]) = NULL; @@ -409,14 +410,6 @@ STATIC mp_obj_t machine_uart_txdone(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_uart_txdone_obj, machine_uart_txdone); -void uart_deinit_all(void) { - for (int i = 0; i < SERCOM_INST_NUM; i++) { - if (uart_table[i] != NULL) { - machine_uart_deinit((mp_obj_t)uart_table[i]); - } - } -} - STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_uart_init_obj) }, { MP_ROM_QSTR(MP_QSTR_deinit), MP_ROM_PTR(&machine_uart_deinit_obj) }, @@ -430,6 +423,7 @@ STATIC const mp_rom_map_elem_t machine_uart_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_readline), MP_ROM_PTR(&mp_stream_unbuffered_readline_obj) }, { MP_ROM_QSTR(MP_QSTR_readinto), MP_ROM_PTR(&mp_stream_readinto_obj) }, { MP_ROM_QSTR(MP_QSTR_write), MP_ROM_PTR(&mp_stream_write_obj) }, + { MP_ROM_QSTR(MP_QSTR___del__), MP_ROM_PTR(&machine_uart_deinit_obj) }, }; STATIC MP_DEFINE_CONST_DICT(machine_uart_locals_dict, machine_uart_locals_dict_table); diff --git a/ports/samd/main.c b/ports/samd/main.c index 0f24e2382ee8..725fd651d02c 100644 --- a/ports/samd/main.c +++ b/ports/samd/main.c @@ -39,7 +39,6 @@ extern void adc_deinit_all(void); extern void pin_irq_deinit_all(void); extern void pwm_deinit_all(void); extern void sercom_deinit_all(void); -extern void uart_deinit_all(void); void samd_main(void) { mp_stack_set_top(&_estack); @@ -86,7 +85,6 @@ void samd_main(void) { pin_irq_deinit_all(); pwm_deinit_all(); sercom_deinit_all(); - uart_deinit_all(); soft_timer_deinit(); gc_sweep_all(); mp_deinit(); From d74215a3137da5e9001aed92c8c1b06d828ff9d2 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 8 Oct 2022 12:34:45 +0200 Subject: [PATCH 041/823] samd/machine_spi: Implement spi.deinit() and simplify sercom_deinit_all. The sercom_deinit_all() function does not need the object pointers. --- ports/samd/machine_spi.c | 25 ++++++++++++++++--------- 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c index 43150f67f15a..d4c7a05bb60f 100644 --- a/ports/samd/machine_spi.c +++ b/ports/samd/machine_spi.c @@ -254,17 +254,23 @@ STATIC mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, s return self; } +STATIC void machine_sercom_deinit(mp_obj_base_t *self_in) { + machine_spi_obj_t *self = MP_OBJ_TO_PTR(self_in); + Sercom *spi = sercom_instance[self->id]; + // Disable interrupts (if any) + spi->SPI.INTENCLR.reg = 0xff; + sercom_enable(spi, 0); + // clear table entry of spi + sercom_table[self->id] = NULL; +} + void sercom_deinit_all(void) { for (int i = 0; i < SERCOM_INST_NUM; i++) { - if (sercom_table[i] != NULL) { - machine_spi_obj_t *self = sercom_table[i]; - Sercom *spi = sercom_instance[self->id]; - // Disable interrupts (if any) - spi->SPI.INTENCLR.reg = 0xff; - // clear table entry of spi - sercom_table[i] = NULL; - sercom_enable(spi, 0); - } + Sercom *spi = sercom_instance[i]; + spi->SPI.INTENCLR.reg = 0xff; + sercom_register_irq(i, NULL); + sercom_enable(spi, 0); + sercom_table[i] = NULL; } } @@ -316,6 +322,7 @@ STATIC void machine_spi_transfer(mp_obj_base_t *self_in, size_t len, const uint8 STATIC const mp_machine_spi_p_t machine_spi_p = { .init = machine_spi_init, + .deinit = machine_sercom_deinit, .transfer = machine_spi_transfer, }; From a1eebc507eda8f5ec052d0ef0450c52f2320e106 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Thu, 13 Oct 2022 19:04:37 +0200 Subject: [PATCH 042/823] samd/machine_spi: Register SerCom objects as root pointers. Protect SerCom (UART, SPI, I2C) objects from getting freed by the GC when they go out of scope without being deinitialized. Otherwise the ISR of a Sercom may access an invalid data structure. --- ports/samd/machine_i2c.c | 5 ++--- ports/samd/machine_spi.c | 10 +++++----- ports/samd/machine_uart.c | 7 +++---- 3 files changed, 10 insertions(+), 12 deletions(-) diff --git a/ports/samd/machine_i2c.c b/ports/samd/machine_i2c.c index 0a8f5b94db08..d943b6b2f422 100644 --- a/ports/samd/machine_i2c.c +++ b/ports/samd/machine_i2c.c @@ -69,7 +69,6 @@ typedef struct _machine_i2c_obj_t { } machine_i2c_obj_t; extern Sercom *sercom_instance[]; -extern void *sercom_table[SERCOM_INST_NUM]; STATIC void i2c_send_command(Sercom *i2c, uint8_t command) { i2c->I2CM.CTRLB.bit.CMD = command; @@ -79,7 +78,7 @@ STATIC void i2c_send_command(Sercom *i2c, uint8_t command) { void common_i2c_irq_handler(int i2c_id) { // handle Sercom I2C IRQ - machine_i2c_obj_t *self = sercom_table[i2c_id]; + machine_i2c_obj_t *self = MP_STATE_PORT(sercom_table[i2c_id]); // Handle IRQ if (self != NULL) { Sercom *i2c = self->instance; @@ -159,7 +158,7 @@ mp_obj_t machine_i2c_make_new(const mp_obj_type_t *type, size_t n_args, size_t n if (sda_pad_config.pad_nr != 0 || scl_pad_config.pad_nr != 1) { mp_raise_ValueError(MP_ERROR_TEXT("invalid pin for sda or scl")); } - sercom_table[self->id] = self; + MP_STATE_PORT(sercom_table[self->id]) = self; self->freq = args[ARG_freq].u_int; // Configure the Pin mux. diff --git a/ports/samd/machine_spi.c b/ports/samd/machine_spi.c index d4c7a05bb60f..4ffc7095cc2e 100644 --- a/ports/samd/machine_spi.c +++ b/ports/samd/machine_spi.c @@ -57,11 +57,11 @@ typedef struct _machine_spi_obj_t { } machine_spi_obj_t; extern Sercom *sercom_instance[]; -void *sercom_table[SERCOM_INST_NUM] = {}; +MP_REGISTER_ROOT_POINTER(void *sercom_table[SERCOM_INST_NUM]); void common_spi_irq_handler(int spi_id) { // handle Sercom IRQ RXC - machine_spi_obj_t *self = sercom_table[spi_id]; + machine_spi_obj_t *self = MP_STATE_PORT(sercom_table[spi_id]); // Handle IRQ if (self != NULL) { Sercom *spi = sercom_instance[self->id]; @@ -246,7 +246,7 @@ STATIC mp_obj_t machine_spi_make_new(const mp_obj_type_t *type, size_t n_args, s self->sck = 0xff; self->new = true; - sercom_table[spi_id] = self; + MP_STATE_PORT(sercom_table[spi_id]) = self; mp_map_t kw_args; mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); @@ -261,7 +261,7 @@ STATIC void machine_sercom_deinit(mp_obj_base_t *self_in) { spi->SPI.INTENCLR.reg = 0xff; sercom_enable(spi, 0); // clear table entry of spi - sercom_table[self->id] = NULL; + MP_STATE_PORT(sercom_table[self->id]) = NULL; } void sercom_deinit_all(void) { @@ -270,7 +270,7 @@ void sercom_deinit_all(void) { spi->SPI.INTENCLR.reg = 0xff; sercom_register_irq(i, NULL); sercom_enable(spi, 0); - sercom_table[i] = NULL; + MP_STATE_PORT(sercom_table[i]) = NULL; } } diff --git a/ports/samd/machine_uart.c b/ports/samd/machine_uart.c index 2526b450931b..4b8fa3b60d8f 100644 --- a/ports/samd/machine_uart.c +++ b/ports/samd/machine_uart.c @@ -59,7 +59,6 @@ typedef struct _machine_uart_obj_t { } machine_uart_obj_t; Sercom *sercom_instance[] = SERCOM_INSTS; -extern void *sercom_table[SERCOM_INST_NUM]; STATIC const char *_parity_name[] = {"None", "", "0", "1"}; // Is defined as 0, 2, 3 @@ -82,7 +81,7 @@ STATIC void uart_drain_rx_fifo(machine_uart_obj_t *self, Sercom *uart) { } void common_uart_irq_handler(int uart_id) { - machine_uart_obj_t *self = sercom_table[uart_id]; + machine_uart_obj_t *self = MP_STATE_PORT(sercom_table[uart_id]); // Handle IRQ if (self != NULL) { Sercom *uart = sercom_instance[self->id]; @@ -333,7 +332,7 @@ STATIC mp_obj_t machine_uart_make_new(const mp_obj_type_t *type, size_t n_args, self->tx = 0xff; self->rx = 0xff; self->new = true; - sercom_table[uart_id] = self; + MP_STATE_PORT(sercom_table[uart_id]) = self; mp_map_t kw_args; mp_map_init_fixed_table(&kw_args, n_kw, args + n_args); @@ -352,7 +351,7 @@ STATIC mp_obj_t machine_uart_deinit(mp_obj_t self_in) { // Disable interrupts uart->USART.INTENCLR.reg = 0xff; // clear table entry of uart - sercom_table[self->id] = NULL; + MP_STATE_PORT(sercom_table[self->id]) = NULL; MP_STATE_PORT(samd_uart_rx_buffer[self->id]) = NULL; #if MICROPY_HW_UART_TXBUF MP_STATE_PORT(samd_uart_tx_buffer[self->id]) = NULL; From fcccfc176b225001b402ce2ced062344990789e0 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Mon, 17 Oct 2022 18:05:28 +0200 Subject: [PATCH 043/823] samd/modmachine: Add machine.softreset(). For consistency with other ports. --- ports/samd/modmachine.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/ports/samd/modmachine.c b/ports/samd/modmachine.c index 47fc03d82410..8adc06f52654 100644 --- a/ports/samd/modmachine.c +++ b/ports/samd/modmachine.c @@ -32,6 +32,7 @@ #include "extmod/machine_signal.h" #include "extmod/machine_spi.h" #include "drivers/dht/dht.h" +#include "shared/runtime/pyexec.h" #include "modmachine.h" #include "samd_soc.h" @@ -57,6 +58,12 @@ extern bool EIC_occured; extern uint32_t _dbl_tap_addr; +STATIC mp_obj_t machine_soft_reset(void) { + pyexec_system_exit = PYEXEC_FORCED_EXIT; + mp_raise_type(&mp_type_SystemExit); +} +STATIC MP_DEFINE_CONST_FUN_OBJ_0(machine_soft_reset_obj, machine_soft_reset); + STATIC mp_obj_t machine_reset(void) { *DBL_TAP_ADDR = DBL_TAP_MAGIC_RESET; #ifdef DBL_TAP_ADDR_ALT @@ -219,6 +226,7 @@ STATIC MP_DEFINE_CONST_FUN_OBJ_VAR_BETWEEN(machine_lightsleep_obj, 0, 1, machine STATIC const mp_rom_map_elem_t machine_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR___name__), MP_ROM_QSTR(MP_QSTR_umachine) }, + { MP_ROM_QSTR(MP_QSTR_soft_reset), MP_ROM_PTR(&machine_soft_reset_obj) }, { MP_ROM_QSTR(MP_QSTR_reset), MP_ROM_PTR(&machine_reset_obj) }, { MP_ROM_QSTR(MP_QSTR_bootloader), MP_ROM_PTR(&machine_bootloader_obj) }, { MP_ROM_QSTR(MP_QSTR_freq), MP_ROM_PTR(&machine_freq_obj) }, From d75c7e822cbfe7014fede1420f996a0af04bb13c Mon Sep 17 00:00:00 2001 From: Jim Mussared Date: Wed, 21 Sep 2022 09:57:10 +1000 Subject: [PATCH 044/823] py/obj: Add comments explaining the slot index scheme. Signed-off-by: Jim Mussared --- py/obj.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/py/obj.h b/py/obj.h index 8d62dd4f3cf0..b5b855bad395 100644 --- a/py/obj.h +++ b/py/obj.h @@ -753,10 +753,16 @@ typedef struct _mp_obj_full_type_t { #define MP_DEFINE_CONST_OBJ_TYPE_NARGS_11(_struct_type, _typename, _name, _flags, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10, f11, v11) const _struct_type _typename = { .base = { &mp_type_type }, .name = _name, .flags = _flags, .slot_index_##f1 = 1, .slot_index_##f2 = 2, .slot_index_##f3 = 3, .slot_index_##f4 = 4, .slot_index_##f5 = 5, .slot_index_##f6 = 6, .slot_index_##f7 = 7, .slot_index_##f8 = 8, .slot_index_##f9 = 9, .slot_index_##f10 = 10, .slot_index_##f11 = 11, .slots = { v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, } } #define MP_DEFINE_CONST_OBJ_TYPE_NARGS_12(_struct_type, _typename, _name, _flags, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10, f11, v11, f12, v12) const _struct_type _typename = { .base = { &mp_type_type }, .name = _name, .flags = _flags, .slot_index_##f1 = 1, .slot_index_##f2 = 2, .slot_index_##f3 = 3, .slot_index_##f4 = 4, .slot_index_##f5 = 5, .slot_index_##f6 = 6, .slot_index_##f7 = 7, .slot_index_##f8 = 8, .slot_index_##f9 = 9, .slot_index_##f10 = 10, .slot_index_##f11 = 11, .slot_index_##f12 = 12, .slots = { v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11, v12, } } +// Because the mp_obj_type_t instances are in (zero-initialised) ROM, we take +// slot_index_foo=0 to mean that the slot is unset. This also simplifies checking +// if the slot is set. That means that we need to store index+1 in slot_index_foo +// though and then access it as slots[slot_index_foo - 1]. This is an implementation +// detail, the user of these macros doesn't need to be aware of it, and when using +// MP_OBJ_TYPE_OFFSETOF_SLOT you should use zero-based indexing. #define MP_OBJ_TYPE_HAS_SLOT(t, f) ((t)->slot_index_##f) #define MP_OBJ_TYPE_GET_SLOT(t, f) (_MP_OBJ_TYPE_SLOT_TYPE_##f(t)->slots[(t)->slot_index_##f - 1]) #define MP_OBJ_TYPE_GET_SLOT_OR_NULL(t, f) (_MP_OBJ_TYPE_SLOT_TYPE_##f(MP_OBJ_TYPE_HAS_SLOT(t, f) ? MP_OBJ_TYPE_GET_SLOT(t, f) : NULL)) -#define MP_OBJ_TYPE_SET_SLOT(t, f, v, n) ((t)->slot_index_##f = (n) + 1, (t)->slots[(t)->slot_index_##f - 1] = (void *)v) +#define MP_OBJ_TYPE_SET_SLOT(t, f, v, n) ((t)->slot_index_##f = (n) + 1, (t)->slots[(n)] = (void *)v) #define MP_OBJ_TYPE_OFFSETOF_SLOT(f) (offsetof(mp_obj_type_t, slot_index_##f)) #define MP_OBJ_TYPE_HAS_SLOT_BY_OFFSET(t, offset) (*(uint8_t *)((char *)(t) + (offset)) != 0) From 64af916c111b61bce82c00f356a6b1cb81946d87 Mon Sep 17 00:00:00 2001 From: Jim Mussared Date: Tue, 18 Oct 2022 16:24:33 +1100 Subject: [PATCH 045/823] docs/templates/layout.html: Indicate latest vs release docs. When looking at latest (the default for docs.micropython.org), make it clear that this isn't the release version. - Changes the version in the top-left to "latest". - Adds a message to the top of each page to explain. For future release versions, add a short message to link to the latest version. This work was funded through GitHub Sponsors. Signed-off-by: Jim Mussared --- docs/conf.py | 3 ++- docs/templates/layout.html | 25 +++++++++++++++++++++++++ docs/templates/topindex.html | 3 +-- 3 files changed, 28 insertions(+), 3 deletions(-) diff --git a/docs/conf.py b/docs/conf.py index 5533bf01918a..ce5c037568ad 100755 --- a/docs/conf.py +++ b/docs/conf.py @@ -33,6 +33,7 @@ 'downloads':[ ('PDF', url_pattern % micropy_version + '/micropython-docs.pdf'), ], + 'is_release': micropy_version != 'latest', } @@ -74,7 +75,7 @@ # # We don't follow "The short X.Y version" vs "The full version, including alpha/beta/rc tags" # breakdown, so use the same version identifier for both to avoid confusion. -version = release = '1.19.1' +version = release = micropy_version # The language for content autogenerated by Sphinx. Refer to documentation # for a list of supported languages. diff --git a/docs/templates/layout.html b/docs/templates/layout.html index a6caa0bc5a11..8563f02af00a 100644 --- a/docs/templates/layout.html +++ b/docs/templates/layout.html @@ -4,3 +4,28 @@ {# we change the master_doc variable so that links to the index page are to index.html instead of _index.html #} {% set master_doc = "index" %} + +{% block document %} + {% if is_release %} +
+

+ This is the v{{ release }} version of the MicroPython + documentation. The latest + development version of this page may be more current. +

+
+ {% else %} +
+

+ This is the documentation for the latest development branch of + MicroPython and may refer to features that are not available in released + versions. +

+

+ If you are looking for the documentation for a specific release, use + the drop-down menu on the left and select the desired version. +

+
+ {% endif %} + {{ super() }} +{% endblock %} diff --git a/docs/templates/topindex.html b/docs/templates/topindex.html index cfe3ad1516ac..4e163b6efe90 100644 --- a/docs/templates/topindex.html +++ b/docs/templates/topindex.html @@ -5,8 +5,7 @@

MicroPython documentation

- {{ _('Welcome! This is the documentation for MicroPython') }} - v{{ release|e }}{% if last_updated %}, {{ _('last updated') }} {{ last_updated|e }}{% endif %}. + {{ _('Welcome! This is the documentation for MicroPython') }}{% if last_updated %}, {{ _('last updated') }} {{ last_updated|e }}{% endif %}.

From 11910e2fa1c8f5dc76cbc90598ff81526d1f6312 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Mon, 20 Jun 2022 14:02:30 +0200 Subject: [PATCH 046/823] docs/samd: Add documentation for the samd port. Includes a general overview, a quickref, pinout tables, and the beginnings of a tutorial. --- docs/index.rst | 1 + docs/samd/general.rst | 88 +++ docs/samd/img/itsybitsy_m4_express.jpg | Bin 0 -> 151296 bytes docs/samd/pinout.rst | 850 +++++++++++++++++++++++++ docs/samd/quickref.rst | 469 ++++++++++++++ docs/samd/tutorial/intro.rst | 84 +++ docs/templates/topindex.html | 4 + 7 files changed, 1496 insertions(+) create mode 100644 docs/samd/general.rst create mode 100644 docs/samd/img/itsybitsy_m4_express.jpg create mode 100644 docs/samd/pinout.rst create mode 100644 docs/samd/quickref.rst create mode 100644 docs/samd/tutorial/intro.rst diff --git a/docs/index.rst b/docs/index.rst index 9a021b3906d4..64b83618da14 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -17,3 +17,4 @@ MicroPython documentation and references unix/quickref.rst zephyr/quickref.rst renesas-ra/quickref.rst + samd/quickref.rst diff --git a/docs/samd/general.rst b/docs/samd/general.rst new file mode 100644 index 000000000000..66e6d2a31f69 --- /dev/null +++ b/docs/samd/general.rst @@ -0,0 +1,88 @@ +.. _samd_general: + +General information about the SAMD port +======================================= + +The SAMD21/SAMD51 MCU family is a high performance family of devices made by MicroChip. +The SAMD21 devices are based on an ARM M0+ core, the SAMD51 device on ARM Cortex M4 core. +They provide many on-chip I/O units for building small to medium sized devices. + +Multitude of boards +------------------- + +There is a multitude of modules and boards from different sources which carry +an SAMD21/SAMD51 chip. MicroPython aims to provide a generic port which runs on +as many boards/modules as possible, but there may be limitations. The +Adafruit ItsyBitsy M0 Express, Adafruit Feather M4 Express and the Adafruit ItsyBitsy M4 Express +development boards are taken as reference for the port (for example, testing is performed on them). +For any board you are using please make sure you have a data sheet, schematics +and other reference materials so you can look up any board-specific functions. + +The following boards are at the moment supported by the port: + +- ADAFRUIT FEATHER M0 EXPRESS +- ADAFRUIT FEATHER M4 EXPRESS +- ADAFRUIT ITSYBITSY M0 EXPRESS +- ADAFRUIT ITSYBITSY M4 EXPRESS +- ADAFRUIT TRINKET M0 +- MINISAM M4 +- SAMD21 XPLAINED PRO +- SEEED WIO TERMINAL +- SEEED XIAO + +To make a generic SAMD port and support as many boards as possible the +following design and implementation decision were made: + +* GPIO pin numbering is based on the board numbering. + Please have the manual/pin diagram of your board at hand + to find correspondence between your board pins and actual SAMD21/SAMD51 pins. + For the boards listed above, the relation between the board pin number and + the GPIO number can be found at :ref:`samd_pinout`. +* The pins that can be used by MicroPython are limited to those listed + in the board definition files. + +Technical specifications and SoC data sheets +-------------------------------------------- + +The data sheets and other reference material for SAMD21/SAMD51 chip are available +from the vendor site: https://www.microchip.com/en-us/products/microcontrollers-and-microprocessors/32-bit-mcus/sam-32-bit-mcus +They are the primary reference for the chip technical specifications, capabilities, +operating modes, internal functioning, etc. + +For your convenience, a few technical specifications are provided below: + +SAMD21: + +* Architecture: ARM Cortex M0+ +* CPU frequency: up to 48MHz +* Total RAM available: up to 32 kB (see table) +* Internal FlashROM: up to 256 kB + Some boards provide additional external SPI flash. +* GPIO: up to 52 (GPIOs are multiplexed with other functions, including + external FlashROM, UART, etc.) +* UART: up to 6 serial devices, which can used for UART, SPI or I2C. +* I2S: 1 I2S interfaces +* ADC: One 12-bit SAR ADC converter with 16 channels. +* Programming: using BootROM bootloader from USB. + +SAMD51: + +* Architecture: ARM Cortex M4 +* CPU frequency: up to 120MHz +* Total RAM available: up to 256 kB +* Internal FlashROM: up to 1 MB + Some boards provide additional external SPI flash. +* GPIO: up to 99 (GPIOs are multiplexed with other functions, including + external FlashROM, UART, etc.) +* UART: up to 8 serial devices, which can used for UART, SPI or I2C. +* I2S: 1 I2S interfaces +* ADC: Dual 12-bit SAR ADC converter with 16 channels. +* Programming: using BootROM bootloader from USB. + + +For more information see the excellent SAMD21/SAMD51 data sheets or reference manuals. + +At the moment, the SAM21 port of MicroPython requires 256kB flash, of which 64kB is used +for a small file system. The SAM51 port requires 512 kB of flash, of which all flash beyond +384kB is used for a file system. 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index 000000000000..7e8d7ad9014e --- /dev/null +++ b/docs/samd/pinout.rst @@ -0,0 +1,850 @@ +.. _samd_pinout: + +Pinout for the SAMD machine modules +=================================== + +The assignment of device functions to pins is very flexible. The same function may be used +at different pins. The representation of the assignment choices are given by a table, +which is a subset of the MCU's Pin MUX table and is specific to each board, as the +available pin set varies. The structure of the table is the same for each board, but +the set of rows is different. + +.. _samd21_pinout_table: + +Adafruit ItsyBitsy M0 Express pin assignment table +-------------------------------------------------- + +=== ==== ============ ==== ==== ====== ====== ====== ====== +Pin GPIO Pin name IRQ ADC Serial Serial TCC/TC TCC/TC +=== ==== ============ ==== ==== ====== ====== ====== ====== + 0 PA11 D0 11 19 0/3 2/3 1/1 0/3 + 1 PA10 D1 10 18 0/2 2/2 1/0 0/2 + 2 PA14 D2 14 - 2/2 4/2 3/0 0/4 + 3 PA09 D3 9 17 0/1 2/1 0/1 1/3 + 4 PA08 D4 - 16 0/0 2/0 0/0 1/2 + 5 PA15 D5 15 - 2/3 4/3 3/1 0/5 + 7 PA21 D7 5 - 5/3 3/3 7/1 0/7 + 9 PA07 D9 7 7 - 0/3 1/1 - + 10 PA18 D10 2 - 1/2 3/2 3/0 0/2 + 11 PA16 D11 0 - 1/0 3/0 2/0 0/6 + 12 PA19 D12 3 - 1/3 3/3 3/1 0/3 + 13 PA17 D13 1 - 1/1 3/1 2/1 0/7 + 14 PA02 A0 2 0 - - - - + 15 PB08 A1 8 2 - 4/0 4/0 - + 16 PB09 A2 9 3 - 4/1 4/1 - + 17 PA04 A3 4 4 - 0/0 0/0 - + 18 PA05 A4 5 5 - 0/1 0/1 - + 19 PB02 A5 2 - - 5/0 6/0 - + 20 PA22 SDA 6 - 3/0 5/0 4/0 0/4 + 21 PA23 SCL 7 - 3/1 5/1 4/1 0/5 + 22 PB10 MOSI 10 - - 4/2 5/0 0/4 + 23 PA12 MISO 12 - 2/0 4/0 2/0 0/6 + 24 PB11 SCK 11 - - 4/3 5/1 0/5 + 25 PA00 DOTSTAR_CLK 0 - - 1/0 2/0 - + 26 PA01 DOTSTAR_DATA 1 - - 1/1 2/1 - + 27 PB22 FLASH_MOSI 6 - - 5/2 7/0 - + 28 PB03 FLASH_MISO 3 - - 5/1 6/1 - + 29 PB23 FLASH_SCK 7 - - 5/3 7/1 - +=== ==== ============ ==== ==== ====== ====== ====== ====== + + +Description of the columns: + +- *Pin* - The number that is expected at ``machine.Pin(n)``, if the pin is given + as a number. This is NOT the GPIO number, but the board pin number, as + given in the board specific definition file. +- *GPIO* - The GPIO number. +- *Pin Name* - The name of a Pin which is expected argument to ``machine.Pin("name")``. +- *IRQ* - The IRQ number assigned to that GPIO, used internally by ``Pin.irq()``. When + using ``Pin.irq()``, different pins must use different IRQs +- *ADC* - The ADC channel assigned to the pin. When using ADC, different pins must + not use the same ADC channel. +- *Serial* - Two columns with optional Serial signal assignments. Both may be used. + The cell content is device #/pad #. The pad # is the respective internal + signal of that serial device. Details below. +- *TCC/TC* - Two columns with assignments of the TCC modules for PWM. + The cell content is device #/output #. For PWM, devices 0, 1, and 2 + are used. The TC device pair 3/4 is used for ``ticks_us()``. + +SAMD21 UART assignments +``````````````````````` +The UART devices and signals must be chosen according to the following rules: + +- The TX signal must be at a Pin with pad numbers 2 or 0, like Pin 1 with serial + device 0 or 2. +- The RX pin may be assigned to one of the other pads. + +Examples for Adafruit ItsyBitsy M0 Express: + +- uart 0 at pins 0/1 This is the default UART at the RX/TX labelled pins +- uart 1 at pins 12/10 +- uart 2 at pins 0/1 +- uart 3 at pins 11/13 +- uart 4 at pins 2/5 +- uart 5 at pins SCL/SDA + +or other combinations. + +SAMD21 I2C assignments +`````````````````````` +The I2C devices and signals must be chosen according to the following rules: + +- The SDA signal must be at a Pin with pad numbers 0. +- The SCL signal must be at a Pin with pad numbers 1. + +Examples for Adafruit ItsyBitsy M0 Express: + +- I2C 0 at Pin A3/A4 +- I2C 1 at pins 11/13 +- I2C 2 at the pins 4/3 +- I2C 3 at the pins SDA/SCL This is the default I2C device at the SDA/SCl labelled pin +- I2C 4 at the pins A1/A2 +- I2C 5 at the pins SDA/SCL, + +or other combinations. + +SAMD21 SPI assignments +`````````````````````` +The I2C devices and signals must be chosen according to the following rules: + +- The following pad number pairs are suitable for MOSI/SCK: 0/1, 2/3, 3/1, and 0/3. +- The MISO signal must be at a Pin with a different pad number than MOSI or SCK. + +Examples for Adafruit ItsyBitsy M0 Express: + +- SPI 0 at pins 0/4/1 +- SPI 1 at pins 11/12/13 +- SPI 2 at pins 0/4/1 +- SPI 3 at pins 11/12/13 +- SPI 4 at Pin MOSI/MISO/SCK This is the default SPI device at the MOSI/MISO/SCK labelled pins. + +or other combinations. + + +SAMD21 PWM assignments +`````````````````````` + +The TCC/TC device numbers 0, 1 and 2 can be used for PWM. Device 0 has four +channels, device 1 and 2 have two channels. So in total 3 different PWM +frequencies can be used, and 8 different duty cycle values. + +The DAC output for the Adafruit ItsyBitsy M0 Express board is available at the pin A0. + +.. _samd51_pinout_table: + +Adafruit ItsyBitsy M4 Express pin assignment table +-------------------------------------------------- + +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== +Pin GPIO Pin name IRQ ADC ADC Serial Serial TC PWM PWM +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + 2 PA02 A0 2 0 - - - - - - + 5 PA05 A1 5 5 - - 0/1 0/1 - - + 40 PB08 A2 8 2 0 - 4/0 4/0 - - + 41 PB09 A3 9 3 1 - 4/1 4/1 - - + 4 PA04 A4 4 4 - - 0/0 0/0 - - + 6 PA06 A5 6 6 - - 0/2 1/0 - - + 16 PA16 D0 0 - - 1/0 3/1 2/0 1/0 0/4 + 17 PA17 D1 1 - - 1/1 3/0 2/1 1/1 0/5 + 7 PA07 D2 7 7 - - 0/3 1/1 - - + 54 PB22 D3 22 - - 1/2 5/2 7/0 - - + 14 PA14 D4 14 - - 2/2 4/2 3/0 2/0 1/2 + 15 PA15 D5 15 - - 2/3 4/3 3/1 2/1 1/3 + 18 PA18 D7 2 - - 1/2 3/2 3/0 1/2 0/6 + 19 PA19 D9 3 - - 1/3 3/3 3/1 1/3 0/7 + 20 PA20 D10 4 - - 5/2 3/2 7/0 1/4 0/0 + 21 PA21 D11 5 - - 5/3 3/3 7/1 1/5 0/1 + 23 PA23 D12 7 - - 3/1 5/0 4/1 1/7 0/3 + 22 PA22 D13 6 - - 3/0 5/1 4/0 1/6 0/2 + 34 PB02 DOTSTAR_CLK 2 14 - - 5/0 6/0 2/2 - + 35 PB03 DOTSTAR_DATA 9 15 - - 5/1 6/1 - - + 43 PB11 FLASH_CS 12 - - - 4/3 5/1 0/5 1/1 + 11 PA11 FLASH_HOLD 11 11 - 0/3 2/3 1/1 0/3 1/7 + 9 PA09 FLASH_MISO 9 9 3 0/1 2/0 0/1 0/1 1/5 + 8 PA08 FLASH_MOSI - 8 2 0/0 2/1 0/0 0/0 1/4 + 42 PB10 FLASH_SCK 10 - - - 4/2 5/0 0/4 1/0 + 10 PA10 FLASH_WP 10 10 - 0/2 2/2 1/0 0/2 1/6 + 55 PB23 MISO 7 - - 1/3 5/3 7/1 - - + 0 PA00 MOSI 0 - - - 1/0 2/0 - - + 1 PA01 SCK 1 - - - 1/1 2/1 - - + 13 PA13 SCL 13 - - 2/1 4/0 2/1 0/7 1/3 + 12 PA12 SDA 12 - - 2/0 4/1 2/0 0/6 1/2 + 30 PA30 SWCLK 14 - - 7/2 1/2 6/0 2/0 - + 31 PA31 SWDIO 15 - - 7/3 1/3 6/1 2/1 - + 24 PA24 USB_DM 8 - - 3/2 5/2 5/0 2/2 - + 25 PA25 USB_DP 9 - - 3/3 5/3 5/1 - - + 3 PA03 - 3 10 - - - - - - + 27 PA27 - 11 - - - - - - - +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + + +Description of the columns: + +- *Pin* - The number that is expected at ``machine.Pin(n)``, if the pin is given + as a number. This is NOT the GPIO number, but the board pin number, as + given in the board specific definition file. +- *GPIO* - The GPIO number. +- *Pin Name* The name of a Pin which is expected argument to ``machine.Pin("name")``. +- *IRQ* - The IRQ number assigned to that GPIO, used internally by ``Pin.irq()``. When + using ``Pin.irq()``, different pins must use different IRQs +- *ADC* - The ADC0/1 channel assigned to the pin. When using ADC, different pins must + not use the same ADC device and channel. +- *Serial* - Two columns with optional Serial signal assignments. Both may be used. + The cell content is device #/pad #. The pad # is the respective internal + signal of that serial device. Details below. +- *TC* - These device are currently not assigned to Pin. the TC device pair 0/1 + is used for ``ticks_us()``. +- *PWM* - Two columns with assignments of the TCC modules for PWM + The cell content is device #/output #. Details below. + +SAMD51 UART assignments +``````````````````````` +The UART devices and signals must be chosen according to the following rules: + +- The TX signal must be at a Pin with pad numbers 0, like Pin 1 with serial + device 3. +- The RX pin may be assigned to one of the other pads. + +Examples for Adafruit ItsyBitsy 4 Express: + +- uart 0 at pins A4/A1 +- uart 1 at pins 1/0 This is the default UART at the RX/TX labelled pins +- uart 2 at pins SCL/SDA This is the default I2C device at the SDA/SCl labelled pin +- uart 3 at pins 0/1 +- uart 4 at pins SDA/SCL +- uart 5 at pins D12/D13 + +or other combinations. + +SAMD51 I2C assignments +`````````````````````` +The I2C devices and signals must be chosen according to the following rules: + +- The SDA signal must be at a Pin with pad numbers 0. +- The SCL signal must be at a Pin with pad numbers 1. + +Examples for Adafruit ItsyBitsy M0 Express: + +- I2C 0 at pins A3/A4 +- I2C 1 at pins 0/1 +- I2C 2 at the pins SDA/SCL +- I2C 3 at the pins 1/0 +- I2C 4 at the pins A2/A3 +- I2C 5 at the pins 12/13 + +or other combinations. + +SAMD51 SPI assignments +`````````````````````` +The SPI devices and signals must be chosen according to the following rules: + +- The following pad number pairs are suitable for MOSI/SCK: 0/1 and 3/1. +- The MISO signal must be at a Pin with a different pad number than MOSI or SCK. + +Examples for Adafruit ItsyBitsy M0 Express: + +- SPI 1 at Pin MOSI/MISO/SCK This is the default SPI device at the MOSI/MISO/SCK labelled pins. +- SPI 3 at pins 13/11/12 +- SPI 5 at pins 12/3/13 + +or other combinations. + + +SAMD51 PWM assignments +`````````````````````` + +The TCC/PWM device numbers 0 through 4 can be used for PWM. Device 0 has six +channels, device 1 has four channels, device 2 has three channels and devices +3 and 4 have two channels. So in total up to 5 different PWM frequencies +can be used, and up to 17 different duty cycle values. Note that these numbers +do not apply to every board. + +The DAC outputs for the Adafruit ItsyBitsy M4 Express board are available at the pins A0 and A1. + +Adafruit Feather M4 Express pin assignment table +------------------------------------------------ + +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== +Pin GPIO Pin name IRQ ADC ADC Serial Serial TC PWM PWM +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + 2 PA02 A0 2 0 - - - - - - + 5 PA05 A1 5 5 - - 0/1 0/1 - - + 40 PB08 A2 8 2 0 - 4/0 4/0 - - + 41 PB09 A3 9 3 1 - 4/1 4/1 - - + 4 PA04 A4 4 4 - - 0/0 0/0 - - + 38 PB06 A5 6 - 8 - - - - - + 49 PB17 D0 1 - - 5/1 - 6/1 3/1 0/5 + 48 PB16 D1 0 - - 5/0 - 6/0 3/0 0/4 + 14 PA14 D4 14 - - 2/2 4/2 3/0 2/0 1/2 + 16 PA16 D5 0 - - 1/0 3/1 2/0 1/0 0/4 + 18 PA18 D6 2 - - 1/2 3/2 3/0 1/2 0/6 + 19 PA19 D9 3 - - 1/3 3/3 3/1 1/3 0/7 + 3 PA03 AREF 3 10 - - - - - - + 20 PA20 D10 4 - - 5/2 3/2 7/0 1/4 0/0 + 21 PA21 D11 5 - - 5/3 3/3 7/1 1/5 0/1 + 22 PA22 D12 6 - - 3/0 5/1 4/0 1/6 0/2 + 23 PA23 D13 7 - - 3/1 5/0 4/1 1/7 0/3 + 43 PB11 FLASH_CS 12 - - - 4/3 5/1 0/5 1/1 + 11 PA11 FLASH_HOLD 11 11 - 0/3 2/3 1/1 0/3 1/7 + 9 PA09 FLASH_MISO 9 9 3 0/1 2/0 0/1 0/1 1/5 + 8 PA08 FLASH_MOSI - 8 2 0/0 2/1 0/0 0/0 1/4 + 42 PB10 FLASH_SCK 10 - - - 4/2 5/0 0/4 1/0 + 10 PA10 FLASH_WP 10 10 - 0/2 2/2 1/0 0/2 1/6 + 54 PB22 MISO 22 - - 1/2 5/2 7/0 - - + 55 PB23 MOSI 7 - - 1/3 5/3 7/1 - - + 35 PB03 NEOPIXEL 9 15 - - 5/1 6/1 - - + 17 PA17 SCK 1 - - 1/1 3/0 2/1 1/1 0/5 + 13 PA13 SCL 13 - - 2/1 4/0 2/1 0/7 1/3 + 12 PA12 SDA 12 - - 2/0 4/1 2/0 0/6 1/2 + 30 PA30 SWCLK 14 - - 7/2 1/2 6/0 2/0 - + 31 PA31 SWDIO 15 - - 7/3 1/3 6/1 2/1 - + 24 PA24 USB_DM 8 - - 3/2 5/2 5/0 2/2 - + 25 PA25 USB_DP 9 - - 3/3 5/3 5/1 - - + 33 PB01 VDIV 1 13 - - 5/3 7/1 - - + 0 PA00 - 0 - - - 1/0 2/0 - - + 1 PA01 - 1 - - - 1/1 2/1 - - + 6 PA06 - 6 6 - - 0/2 1/0 - - + 7 PA07 - 7 7 - - 0/3 1/1 - - + 15 PA15 - 15 - - 2/3 4/3 3/1 2/1 1/3 + 27 PA27 - 11 - - - - - - - + 32 PB00 - 9 12 - - 5/2 7/0 - - + 34 PB02 - 2 14 - - 5/0 6/0 2/2 - + 36 PB04 - 4 - 6 - - - - - + 37 PB05 - 5 - 7 - - - - - + 39 PB07 - 7 - 9 - - - - - + 44 PB12 - 12 - - 4/0 - 4/0 3/0 0/0 + 45 PB13 - 13 - - 4/1 - 4/1 3/1 0/1 + 46 PB14 - 14 - - 4/2 - 5/0 4/0 0/2 + 47 PB15 - 15 - - 4/3 - 5/1 4/1 0/3 + 62 PB30 - 14 - - 7/0 5/1 0/0 4/0 0/6 + 63 PB31 - 15 - - 7/1 5/0 0/1 4/1 0/7 +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M4 Express :ref:`samd51_pinout_table`. + +The default devices at the board are: + +- UART 5 at pins 0/1, labelled RX/TX +- I2C 2 at pins 21/20, labelled SDA/SCL +- SPI 1 at pins 22/23/24, labelled MOSI, MISO and SCK +- DAC output on pins 14 and 15, labelled A0 and A1 + +SEEED XIAO pin assignment table +------------------------------- + +=== ==== ============ ==== ==== ====== ====== ====== ====== +Pin GPIO Pin name IRQ ADC Serial Serial TCC/TC TCC/TC +=== ==== ============ ==== ==== ====== ====== ====== ====== + 2 PA02 A0_D0 2 0 - - - - + 4 PA04 A1_D1 4 4 - 0/0 0/0 - + 10 PA10 A2_D2 10 18 0/2 2/2 1/0 0/2 + 11 PA11 A3_D3 11 19 0/3 2/3 1/1 0/3 + 8 PA08 A4_D4 - 16 0/0 2/0 0/0 1/2 + 9 PA09 A5_D5 9 17 0/1 2/1 0/1 1/3 + 40 PB08 A6_D6 8 2 - 4/0 4/0 - + 41 PB09 A7_D7 9 3 - 4/1 4/1 - + 7 PA07 A8_D8 7 7 - 0/3 1/1 - + 5 PA05 A9_D9 5 5 - 0/1 0/1 - + 6 PA06 A10_D10 6 6 - 0/2 1/0 - + 18 PA18 RX_LED 2 - 1/2 3/2 3/0 0/2 + 30 PA30 SWCLK 10 - - 1/2 1/0 - + 31 PA31 SWDIO 11 - - 1/3 1/1 - + 19 PA19 TX_LED 3 - 1/3 3/3 3/1 0/3 + 24 PA24 USB_DM 12 - 3/2 5/2 5/0 1/2 + 25 PA25 USB_DP 13 - 3/3 5/3 5/1 1/3 + 17 PA17 USER_LED 1 - 1/1 3/1 2/1 0/7 + 0 PA00 - 0 - - 1/0 2/0 - + 1 PA01 - 1 - - 1/1 2/1 - + 3 PA03 - 3 1 - - - - + 12 PA12 - 12 - 2/0 4/0 2/0 0/6 + 13 PA13 - 13 - 2/1 4/1 2/0 0/7 + 14 PA14 - 14 - 2/2 4/2 3/0 0/4 + 15 PA15 - 15 - 2/3 4/3 3/1 0/5 + 16 PA16 - 0 - 1/0 3/0 2/0 0/6 + 20 PA20 - 4 - 5/2 3/2 7/0 0/4 + 21 PA21 - 5 - 5/3 3/3 7/1 0/7 + 22 PA22 - 6 - 3/0 5/0 4/0 0/4 + 23 PA23 - 7 - 3/1 5/1 4/1 0/5 + 27 PA27 - 15 - - - - - + 28 PA28 - 8 - - - - - + 34 PB02 - 2 10 - 5/0 6/0 - + 35 PB03 - 3 11 - 5/1 6/1 - + 42 PB10 - 10 - - 4/2 5/0 0/4 + 43 PB11 - 11 - - 4/3 5/1 0/5 + 54 PB22 - 6 - - 5/2 7/0 - + 55 PB23 - 7 - - 5/3 7/1 - +=== ==== ============ ==== ==== ====== ====== ====== ====== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`. + +The default devices at the board are: + +- UART 4 at pins 7/6, labelled A6_D6/A7_D7 +- I2C 2 at pins 4/5, labelled A4_D4/A5_D5 +- SPI 0 at pins 10/9/8, labelled A10_D10, A9_D9 and A8_D8 +- DAC output on pin 0, labelled A0_D0 + +Adafruit Feather M0 Express pin assignment table +------------------------------------------------ + +=== ==== ============ ==== ==== ====== ====== ====== ====== +Pin GPIO Pin name IRQ ADC Serial Serial TCC/TC TCC/TC +=== ==== ============ ==== ==== ====== ====== ====== ====== + 2 PA02 A0 2 0 - - - - + 40 PB08 A1 8 2 - 4/0 4/0 - + 41 PB09 A2 9 3 - 4/1 4/1 - + 4 PA04 A3 4 4 - 0/0 0/0 - + 5 PA05 A4 5 5 - 0/1 0/1 - + 34 PB02 A5 2 10 - 5/0 6/0 - + 11 PA11 D0 11 19 0/3 2/3 1/1 0/3 + 10 PA10 D1 10 18 0/2 2/2 1/0 0/2 + 14 PA14 D2 14 - 2/2 4/2 3/0 0/4 + 9 PA09 D3 9 17 0/1 2/1 0/1 1/3 + 8 PA08 D4 - 16 0/0 2/0 0/0 1/2 + 15 PA15 D5 15 - 2/3 4/3 3/1 0/5 + 20 PA20 D6 4 - 5/2 3/2 7/0 0/4 + 21 PA21 D7 5 - 5/3 3/3 7/1 0/7 + 7 PA07 D9 7 7 - 0/3 1/1 - + 55 PB23 RX 7 - - 5/3 7/1 - + 54 PB22 TX 6 - - 5/2 7/0 - + 18 PA18 D10 2 - 1/2 3/2 3/0 0/2 + 16 PA16 D11 0 - 1/0 3/0 2/0 0/6 + 19 PA19 D12 3 - 1/3 3/3 3/1 0/3 + 17 PA17 D13 1 - 1/1 3/1 2/1 0/7 + 13 PA13 FLASH_CS 13 - 2/1 4/1 2/0 0/7 + 35 PB03 LED_RX 3 11 - 5/1 6/1 - + 27 PA27 LED_TX 15 - - - - - + 12 PA12 MISO 12 - 2/0 4/0 2/0 0/6 + 42 PB10 MOSI 10 - - 4/2 5/0 0/4 + 6 PA06 NEOPIXEL 6 6 - 0/2 1/0 - + 43 PB11 SCK 11 - - 4/3 5/1 0/5 + 23 PA23 SCL 7 - 3/1 5/1 4/1 0/5 + 22 PA22 SDA 6 - 3/0 5/0 4/0 0/4 + 30 PA30 SWCLK 10 - - 1/2 1/0 - + 31 PA31 SWDIO 11 - - 1/3 1/1 - + 24 PA24 USB_DM 12 - 3/2 5/2 5/0 1/2 + 25 PA25 USB_DP 13 - 3/3 5/3 5/1 1/3 + 0 PA00 - 0 - - 1/0 2/0 - + 1 PA01 - 1 - - 1/1 2/1 - + 3 PA03 - 3 1 - - - - + 28 PA28 - 8 - - - - - +=== ==== ============ ==== ==== ====== ====== ====== ====== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`. + +The default devices at the board are: + +- UART 5 at pins 21/20, labelled RX/TX +- I2C 3 at pins 22/23, labelled SDA/SCL +- SPI 4 at pins 24/25/26, labelled MOSI, MISO and SCK +- DAC output on pin 14, labelled A0 + +Adafruit Trinket M0 pin assignment table +------------------------------------------------ + +=== ==== ============ ==== ==== ====== ====== ====== ====== +Pin GPIO Pin name IRQ ADC Serial Serial TCC/TC TCC/TC +=== ==== ============ ==== ==== ====== ====== ====== ====== + 8 PA08 D0 - 16 0/0 2/0 0/0 1/2 + 2 PA02 D1 2 0 - - - - + 9 PA09 D2 9 17 0/1 2/1 0/1 1/3 + 7 PA07 D3 7 7 - 0/3 1/1 - + 6 PA06 D4 6 6 - 0/2 1/0 - + 1 PA01 DOTSTAR_CLK 1 - - 1/1 2/1 - + 0 PA00 DOTSTAR_DATA 0 - - 1/0 2/0 - + 10 PA10 LED 10 18 0/2 2/2 1/0 0/2 + 30 PA30 SWCLK 10 - - 1/2 1/0 - + 31 PA31 SWDIO 11 - - 1/3 1/1 - + 24 PA24 USB_DM 12 - 3/2 5/2 5/0 1/2 + 25 PA25 USB_DP 13 - 3/3 5/3 5/1 1/3 + 3 PA03 - 3 1 - - - - + 4 PA04 - 4 4 - 0/0 0/0 - + 5 PA05 - 5 5 - 0/1 0/1 - + 11 PA11 - 11 19 0/3 2/3 1/1 0/3 + 14 PA14 - 14 - 2/2 4/2 3/0 0/4 + 15 PA15 - 15 - 2/3 4/3 3/1 0/5 + 16 PA16 - 0 - 1/0 3/0 2/0 0/6 + 17 PA17 - 1 - 1/1 3/1 2/1 0/7 + 18 PA18 - 2 - 1/2 3/2 3/0 0/2 + 19 PA19 - 3 - 1/3 3/3 3/1 0/3 + 22 PA22 - 6 - 3/0 5/0 4/0 0/4 + 23 PA23 - 7 - 3/1 5/1 4/1 0/5 + 27 PA27 - 15 - - - - - + 28 PA28 - 8 - - - - - +=== ==== ============ ==== ==== ====== ====== ====== ====== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`. + +The default devices at the board are: + +- UART 0 at pins 3/4, labelled D3/D4 +- I2C 2 at pins 0/2, labelled D0/D2 +- SPI 0 at pins 4/2/3, labelled D4, D2 and D0 +- DAC output on pin 1, labelled D1 + +SAMD21 Xplained PRO pin assignment table +---------------------------------------- + +=== ==== ============ ==== ==== ====== ====== ====== ====== +Pin GPIO Pin name IRQ ADC Serial Serial TCC/TC TCC/TC +=== ==== ============ ==== ==== ====== ====== ====== ====== + 32 PB00 EXT1_PIN3 0 8 - 5/2 7/0 - + 33 PB01 EXT1_PIN4 1 9 - 5/3 7/1 - + 38 PB06 EXT1_PIN5 6 14 - - - - + 39 PB07 EXT1_PIN6 7 15 - - - - + 34 PB02 EXT1_PIN7 2 10 - 5/0 6/0 - + 35 PB03 EXT1_PIN8 3 11 - 5/1 6/1 - + 36 PB04 EXT1_PIN9 4 12 - - - - + 37 PB05 EXT1_PIN10 5 13 - - - - + 8 PA08 EXT1_PIN11 - 16 0/0 2/0 0/0 1/2 + 9 PA09 EXT1_PIN12 9 17 0/1 2/1 0/1 1/3 + 41 PB09 EXT1_PIN13 9 3 - 4/1 4/1 - + 40 PB08 EXT1_PIN14 8 2 - 4/0 4/0 - + 5 PA05 EXT1_PIN15 5 5 - 0/1 0/1 - + 6 PA06 EXT1_PIN16 6 6 - 0/2 1/0 - + 4 PA04 EXT1_PIN17 4 4 - 0/0 0/0 - + 7 PA07 EXT1_PIN18 7 7 - 0/3 1/1 - + 10 PA10 EXT2_PIN3 10 18 0/2 2/2 1/0 0/2 + 11 PA11 EXT2_PIN4 11 19 0/3 2/3 1/1 0/3 + 20 PA20 EXT2_PIN5 4 - 5/2 3/2 7/0 0/4 + 21 PA21 EXT2_PIN6 5 - 5/3 3/3 7/1 0/7 + 44 PB12 EXT2_PIN7 12 - 4/0 - 4/0 0/6 + 45 PB13 EXT2_PIN8 13 - 4/1 - 4/1 0/7 + 46 PB14 EXT2_PIN9 14 - 4/2 - 5/0 - + 47 PB15 EXT2_PIN10 15 - 4/3 - 5/1 - + 43 PB11 EXT2_PIN13 11 - - 4/3 5/1 0/5 + 42 PB10 EXT2_PIN14 10 - - 4/2 5/0 0/4 + 17 PA17 EXT2_PIN15 1 - 1/1 3/1 2/1 0/7 + 18 PA18 EXT2_PIN16 2 - 1/2 3/2 3/0 0/2 + 16 PA16 EXT2_PIN17 0 - 1/0 3/0 2/0 0/6 + 19 PA19 EXT2_PIN18 3 - 1/3 3/3 3/1 0/3 + 2 PA02 EXT3_PIN3 2 0 - - - - + 3 PA03 EXT3_PIN4 3 1 - - - - + 15 PA15 EXT3_PIN6 15 - 2/3 4/3 3/1 0/5 + 12 PA12 EXT3_PIN7 12 - 2/0 4/0 2/0 0/6 + 13 PA13 EXT3_PIN8 13 - 2/1 4/1 2/0 0/7 + 28 PA28 EXT3_PIN9 8 - - - - - + 27 PA27 EXT3_PIN10 15 - - - - - + 49 PB17 EXT3_PIN15 1 - 5/1 - 6/1 0/5 + 54 PB22 EXT3_PIN16 6 - - 5/2 7/0 - + 48 PB16 EXT3_PIN17 9 - 5/0 - 6/0 0/4 + 55 PB23 EXT3_PIN18 7 - - 5/3 7/1 - + 62 PB30 LED 14 - - 5/0 0/0 1/2 + 30 PA30 SWCLK 10 - - 1/2 1/0 - + 31 PA31 SWDIO 11 - - 1/3 1/1 - + 24 PA24 USB_DM 12 - 3/2 5/2 5/0 1/2 + 25 PA25 USB_DP 13 - 3/3 5/3 5/1 1/3 + 0 PA00 - 0 - - 1/0 2/0 - + 1 PA01 - 1 - - 1/1 2/1 - + 14 PA14 - 14 - 2/2 4/2 3/0 0/4 + 22 PA22 - 6 - 3/0 5/0 4/0 0/4 + 23 PA23 - 7 - 3/1 5/1 4/1 0/5 + 63 PB31 - 15 - - 5/1 0/1 1/3 +=== ==== ============ ==== ==== ====== ====== ====== ====== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M0 Express :ref:`samd21_pinout_table`. + +There are no pins labelled for default devices on this board. DAC output +is on pin 32, labelled EXT3_PIN3 + +Minisam M4 pin assignment table +------------------------------- + +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== +Pin GPIO Pin name IRQ ADC ADC Serial Serial TC PWM PWM +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + 16 PA16 D0 0 - - 1/0 3/1 2/0 1/0 0/4 + 17 PA17 D1 1 - - 1/1 3/0 2/1 1/1 0/5 + 19 PA19 D3 3 - - 1/3 3/3 3/1 1/3 0/7 + 20 PA20 D4 4 - - 5/2 3/2 7/0 1/4 0/0 + 21 PA21 D5 5 - - 5/3 3/3 7/1 1/5 0/1 + 2 PA02 A0_D9 2 0 - - - - - - + 40 PB08 A1_D10 8 2 0 - 4/0 4/0 - - + 41 PB09 A2_D11 9 3 1 - 4/1 4/1 - - + 4 PA04 A3_D12 4 4 - - 0/0 0/0 - - + 5 PA05 A4_D13 5 5 - - 0/1 0/1 - - + 6 PA06 A5 6 6 - - 0/2 1/0 - - + 7 PA07 A6_D2 7 7 - - 0/3 1/1 - - + 3 PA03 AREF 3 10 - - - - - - + 0 PA00 BUTTON 0 - - - 1/0 2/0 - - + 34 PB02 DOTSTAR_CLK 2 14 - - 5/0 6/0 2/2 - + 35 PB03 DOTSTAR_DATA 9 15 - - 5/1 6/1 - - + 15 PA15 LED 15 - - 2/3 4/3 3/1 2/1 1/3 + 55 PB23 MISO 7 - - 1/3 5/3 7/1 - - + 54 PB22 MOSI 22 - - 1/2 5/2 7/0 - - + 1 PA01 SCK 1 - - - 1/1 2/1 - - + 13 PA13 SCL 13 - - 2/1 4/0 2/1 0/7 1/3 + 12 PA12 SDA 12 - - 2/0 4/1 2/0 0/6 1/2 + 30 PA30 SWCLK 14 - - 7/2 1/2 6/0 2/0 - + 31 PA31 SWDIO 15 - - 7/3 1/3 6/1 2/1 - + 24 PA24 USB_DM 8 - - 3/2 5/2 5/0 2/2 - + 25 PA25 USB_DP 9 - - 3/3 5/3 5/1 - - + 8 PA08 - - 8 2 0/0 2/1 0/0 0/0 1/4 + 9 PA09 - 9 9 3 0/1 2/0 0/1 0/1 1/5 + 10 PA10 - 10 10 - 0/2 2/2 1/0 0/2 1/6 + 11 PA11 - 11 11 - 0/3 2/3 1/1 0/3 1/7 + 14 PA14 - 14 - - 2/2 4/2 3/0 2/0 1/2 + 18 PA18 - 2 - - 1/2 3/2 3/0 1/2 0/6 + 22 PA22 - 6 - - 3/0 5/1 4/0 1/6 0/2 + 23 PA23 - 7 - - 3/1 5/0 4/1 1/7 0/3 + 27 PA27 - 11 - - - - - - - + 42 PB10 - 10 - - - 4/2 5/0 0/4 1/0 + 43 PB11 - 12 - - - 4/3 5/1 0/5 1/1 +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M4 Express :ref:`samd51_pinout_table`. + +The default devices at the board are: + +- UART 1 at pins 6/7, labelled D0/D1 +- I2C 2 at pins 14/15, labelled SDA/SCL +- SPI 1 at pins 16/17/18, labelled MOSI, MISO and SCK +- DAC output on pins 0 and 4, labelled A0_D9 and A4_D13 + +Seeed WIO Terminal pin assignment table +--------------------------------------- + +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== +Pin GPIO Pin name IRQ ADC ADC Serial Serial TC PWM PWM +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + 33 PB01 CS 1 13 - - 5/3 7/1 - - + 59 PB27 RX 13 - - 2/1 4/0 - 1/3 - + 58 PB26 TX 12 - - 2/0 4/1 - 1/2 - + 79 PC15 3V3_ENABLE 15 - - 7/3 6/3 - 0/5 1/1 + 78 PC14 5V_ENABLE 14 - - 7/2 6/2 - 0/4 1/0 + 40 PB08 A0_D0 8 2 0 - 4/0 4/0 - - + 41 PB09 A1_D1 9 3 1 - 4/1 4/1 - - + 7 PA07 A2_D2 7 7 - - 0/3 1/1 - - + 36 PB04 A3_D3 4 - 6 - - - - - + 37 PB05 A4_D4 5 - 7 - - - - - + 38 PB06 A5_D5 6 - 8 - - - - - + 4 PA04 A6_D6 4 4 - - 0/0 0/0 - - + 39 PB07 A7_D7 7 - 9 - - - - - + 6 PA06 A8_D8 6 6 - - 0/2 1/0 - - + 90 PC26 BUTTON_1 10 - - - - - - - + 91 PC27 BUTTON_2 11 - - 1/0 - - - - + 92 PC28 BUTTON_3 12 - - 1/1 - - - - +107 PD11 BUZZER 6 - - 7/3 6/3 - 0/4 - + 47 PB15 GPCLK0 15 - - 4/3 - 5/1 4/1 0/3 + 44 PB12 GPCLK1 12 - - 4/0 - 4/0 3/0 0/0 + 45 PB13 GPCLK2 13 - - 4/1 - 4/1 3/1 0/1 + 48 PB16 I2C_BCLK 0 - - 5/0 - 6/0 3/0 0/4 + 20 PA20 I2S_LRCLK 4 - - 5/2 3/2 7/0 1/4 0/0 + 21 PA21 I2S_SDIN 5 - - 5/3 3/3 7/1 1/5 0/1 + 22 PA22 I2S_SDOUT 6 - - 3/0 5/1 4/0 1/6 0/2 + 50 PB18 LCD_MISO 2 - - 5/2 7/2 - 1/0 - + 51 PB19 LCD_MOSI 3 - - 5/3 7/3 - 1/1 - + 52 PB20 LCD_SCK 4 - - 3/0 7/1 - 1/2 - + 53 PB21 LCD_CS 5 - - 3/1 7/0 - 1/3 - + 70 PC06 LCD_D/C 6 - - 6/2 - - - - + 71 PC07 LCD_RESET 9 - - 6/3 - - - - + 74 PC10 LCD_XL 10 - - 6/2 7/2 - 0/0 1/4 + 76 PC12 LCD_XR 12 - - 7/0 6/1 - 0/2 1/6 + 77 PC13 LCD_YD 13 - - 7/1 6/0 - 0/3 1/7 + 75 PC11 LCD_YU 11 - - 6/3 7/3 - 0/1 1/5 + 15 PA15 LED_BLUE 15 - - 2/3 4/3 3/1 2/1 1/3 + 69 PC05 LED_LCD 5 - - 6/1 - - - - + 94 PC30 MIC 14 - 12 - - - - - + 32 PB00 MISO 9 12 - - 5/2 7/0 - - + 34 PB02 MOSI 2 14 - - 5/0 6/0 2/2 - + 35 PB03 SCK 9 15 - - 5/1 6/1 - - + 12 PA12 SCL0 12 - - 2/0 4/1 2/0 0/6 1/2 + 13 PA13 SDA0 13 - - 2/1 4/0 2/1 0/7 1/3 + 16 PA16 SCL1 0 - - 1/0 3/1 2/0 1/0 0/4 + 17 PA17 SDA1 1 - - 1/1 3/0 2/1 1/1 0/5 +117 PD21 SD_DET 11 - - 1/3 3/3 - 1/1 - + 83 PC19 SD_CS 3 - - 6/3 0/3 - 0/3 - + 82 PC18 SD_MISO 2 - - 6/2 0/2 - 0/2 - + 80 PC16 SD_MOSI 0 - - 6/0 0/1 - 0/0 - + 81 PC17 SD_SCK 1 - - 6/1 0/0 - 0/1 - + 30 PA30 SWCLK 14 - - 7/2 1/2 6/0 2/0 - + 31 PA31 SWDIO 15 - - 7/3 1/3 6/1 2/1 - +108 PD12 SWITCH_B 7 - - - - - 0/5 - +116 PD20 SWITCH_U 10 - - 1/2 3/2 - 1/0 - +104 PD08 SWITCH_X 3 - - 7/0 6/1 - 0/1 - +105 PD09 SWITCH_Y 4 - - 7/1 6/0 - 0/2 - +106 PD10 SWITCH_Z 5 - - 7/2 6/2 - 0/3 - + 24 PA24 USB_DM 8 - - 3/2 5/2 5/0 2/2 - + 25 PA25 USB_DP 9 - - 3/3 5/3 5/1 - - + 0 PA00 - 0 - - - 1/0 2/0 - - + 1 PA01 - 1 - - - 1/1 2/1 - - + 2 PA02 - 2 0 - - - - - - + 3 PA03 - 3 10 - - - - - - + 5 PA05 - 5 5 - - 0/1 0/1 - - + 8 PA08 - - 8 2 0/0 2/1 0/0 0/0 1/4 + 9 PA09 - 9 9 3 0/1 2/0 0/1 0/1 1/5 + 10 PA10 - 10 10 - 0/2 2/2 1/0 0/2 1/6 + 11 PA11 - 11 11 - 0/3 2/3 1/1 0/3 1/7 + 14 PA14 - 14 - - 2/2 4/2 3/0 2/0 1/2 + 18 PA18 - 2 - - 1/2 3/2 3/0 1/2 0/6 + 19 PA19 - 3 - - 1/3 3/3 3/1 1/3 0/7 + 23 PA23 - 7 - - 3/1 5/0 4/1 1/7 0/3 + 27 PA27 - 11 - - - - - - - + 42 PB10 - 10 - - - 4/2 5/0 0/4 1/0 + 43 PB11 - 12 - - - 4/3 5/1 0/5 1/1 + 46 PB14 - 14 - - 4/2 - 5/0 4/0 0/2 + 49 PB17 - 1 - - 5/1 - 6/1 3/1 0/5 + 54 PB22 - 22 - - 1/2 5/2 7/0 - - + 55 PB23 - 7 - - 1/3 5/3 7/1 - - + 56 PB24 - 8 - - 0/0 2/1 - - - + 57 PB25 - 9 - - 0/1 2/0 - - - + 60 PB28 - 14 - - 2/2 4/2 - 1/4 - + 61 PB29 - 15 - - 2/3 4/3 - 1/5 - + 62 PB30 - 14 - - 7/0 5/1 0/0 4/0 0/6 + 63 PB31 - 15 - - 7/1 5/0 0/1 4/1 0/7 + 64 PC00 - 0 - 10 - - - - - + 65 PC01 - 1 - 11 - - - - - + 66 PC02 - 2 - 4 - - - - - + 67 PC03 - 3 - 5 - - - - - + 68 PC04 - 4 - - 6/0 - - 0/0 - + 84 PC20 - 4 - - - - - 0/4 - + 85 PC21 - 5 - - - - - 0/5 - + 86 PC22 - 6 - - 1/0 3/1 - 0/5 - + 87 PC23 - 7 - - 1/1 3/0 - 0/7 - + 88 PC24 - 8 - - 0/2 2/2 - - - + 89 PC25 - 9 - - 0/3 2/3 - - - + 95 PC31 - 15 - 13 - - - - - + 96 PD00 - 0 - 14 - - - - - + 97 PD01 - 1 - 15 - - - - - +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M4 Express :ref:`samd51_pinout_table`. + +There seems to be no default pin assignment for this board. + +Sparkfun SAMD51 Thing Plus pin assignment table +------------------------------------------------ + +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== +Pin GPIO Pin name IRQ ADC ADC Serial Serial TC PWM PWM +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + 2 PA02 A0 2 0 - - - - - - + 40 PB08 A1 8 2 0 - 4/0 4/0 - - + 41 PB09 A2 9 3 1 - 4/1 4/1 - - + 4 PA04 A3 4 4 - - 0/0 0/0 - - + 5 PA05 A4 5 5 - - 0/1 0/1 - - + 34 PB02 A5 2 14 - - 5/0 6/0 2/2 - + 13 PA13 D0 13 - - 2/1 4/0 2/1 0/7 1/3 + 12 PA12 D1 12 - - 2/0 4/1 2/0 0/6 1/2 + 6 PA06 D4 6 6 - - 0/2 1/0 - - + 15 PA15 D5 15 - - 2/3 4/3 3/1 2/1 1/3 + 20 PA20 D6 4 - - 5/2 3/2 7/0 1/4 0/0 + 21 PA21 D7 5 - - 5/3 3/3 7/1 1/5 0/1 + 7 PA07 D9 7 7 - - 0/3 1/1 - - + 18 PA18 D10 2 - - 1/2 3/2 3/0 1/2 0/6 + 16 PA16 D11 0 - - 1/0 3/1 2/0 1/0 0/4 + 19 PA19 D12 3 - - 1/3 3/3 3/1 1/3 0/7 + 17 PA17 D13 1 - - 1/1 3/0 2/1 1/1 0/5 + 10 PA10 FLASH_CS 10 10 - 0/2 2/2 1/0 0/2 1/6 + 11 PA11 FLASH_MISO 11 11 - 0/3 2/3 1/1 0/3 1/7 + 8 PA08 FLASH_MOSI - 8 2 0/0 2/1 0/0 0/0 1/4 + 9 PA09 FLASH_SCK 9 9 3 0/1 2/0 0/1 0/1 1/5 + 43 PB11 MISO 12 - - - 4/3 5/1 0/5 1/1 + 44 PB12 MOSI 12 - - 4/0 - 4/0 3/0 0/0 + 55 PB23 RXD 7 - - 1/3 5/3 7/1 - - + 35 PB03 RXLED 9 15 - - 5/1 6/1 - - + 45 PB13 SCK 13 - - 4/1 - 4/1 3/1 0/1 + 23 PA23 SCL 7 - - 3/1 5/0 4/1 1/7 0/3 + 22 PA22 SDA 6 - - 3/0 5/1 4/0 1/6 0/2 + 30 PA30 SWCLK 14 - - 7/2 1/2 6/0 2/0 - + 31 PA31 SWDIO 15 - - 7/3 1/3 6/1 2/1 - + 54 PB22 TXD 22 - - 1/2 5/2 7/0 - - + 27 PA27 TXLED 11 - - - - - - - + 24 PA24 USB_DM 8 - - 3/2 5/2 5/0 2/2 - + 25 PA25 USB_DP 9 - - 3/3 5/3 5/1 - - + 0 PA00 - 0 - - - 1/0 2/0 - - + 1 PA01 - 1 - - - 1/1 2/1 - - + 3 PA03 - 3 10 - - - - - - + 14 PA14 - 14 - - 2/2 4/2 3/0 2/0 1/2 + 32 PB00 - 9 12 - - 5/2 7/0 - - + 33 PB01 - 1 13 - - 5/3 7/1 - - + 36 PB04 - 4 - 6 - - - - - + 37 PB05 - 5 - 7 - - - - - + 38 PB06 - 6 - 8 - - - - - + 39 PB07 - 7 - 9 - - - - - + 42 PB10 - 10 - - - 4/2 5/0 0/4 1/0 + 46 PB14 - 14 - - 4/2 - 5/0 4/0 0/2 + 47 PB15 - 15 - - 4/3 - 5/1 4/1 0/3 + 48 PB16 - 0 - - 5/0 - 6/0 3/0 0/4 + 49 PB17 - 1 - - 5/1 - 6/1 3/1 0/5 + 62 PB30 - 14 - - 7/0 5/1 0/0 4/0 0/6 + 63 PB31 - 15 - - 7/1 5/0 0/1 4/1 0/7 +=== ==== ============ ==== ==== ==== ====== ====== ===== ===== ===== + +For the definition of the table columns see the explanation at the table for +Adafruit ItsyBitsy M4 Express :ref:`samd51_pinout_table`. + +The default devices at the board are: + +- UART 1 at pins 2/3, labelled RXD/TXD +- I2C 5 at pins 20/21, labelled SDA/SCL +- SPI 4 at pins 22/23/24, labelled MOSI, MISO and SCK +- DAC output on pins 14 and 18, labelled A0 and A4 + +Scripts for creating the pin assignment tables +---------------------------------------------- + +The tables shown above were created with small a Python script running on the target board:: + + from samd import pininfo + from machine import Pin + import os + + def print_entry(e, txt): + print(txt, end=": ") + if e == 255: + print(" - ", end="") + else: + print("%d/%d" % (e >> 4, e & 0x0f), end="") + + def print_pininfo(pin, info): + print("%3d" % pin, end=" ") + print("P%c%02d" % ("ABCD"[pin // 32], pin % 32), end="") + print(" %12s" % info[0], end="") + print(" IRQ:%2s" % (info[1] if info[1] != 255 else "-"), end="") + print(" ADC0:%2s" % (info[2] if info[2] != 255 else "-"), end="") + if len(info) == 7: + print_entry(info[3], " Serial1") + print_entry(info[4], " Serial2") + print_entry(info[5], " PWM1" if (info[5] >> 4) < 3 else " TC") + print_entry(info[6], " PWM2") + else: + print(" ADC1:%2s" % (info[3] if info[3] != 255 else "-"), end="") + print_entry(info[4], " Serial1") + print_entry(info[5], " Serial2") + print_entry(info[6], " TC") + print_entry(info[7], " PWM1") + print_entry(info[8], " PWM2") + print() + + def tblkey(i): + name = i[1][0] + if name != "-": + if len(name) < 3: + return " " + name + else: + return name + else: + return "zzzzzzz%03d" % i[0] + + def table(num = 127): + pintbl = [] + for i in range(num): + try: + pintbl.append((i, pininfo(i))) + except: + pass + # print("not defined") + + pintbl.sort(key=tblkey) + for item in pintbl: + print_pininfo(item[0], item[1]) + + table() diff --git a/docs/samd/quickref.rst b/docs/samd/quickref.rst new file mode 100644 index 000000000000..5e8298d1b366 --- /dev/null +++ b/docs/samd/quickref.rst @@ -0,0 +1,469 @@ +.. _samd_quickref: + +Quick reference for the SAMD21/SAMD51 family +============================================ + +.. image:: img/itsybitsy_m4_express.jpg + :alt: Adafruit ItsyBitsy M4 Express board + :width: 640px + +The Adafruit ItsyBitsy M4 Express board. + +Below is a quick reference for SAMD21/SAMD51-based boards. If it is your first time +working with this board it may be useful to get an overview of the microcontroller: + +.. toctree:: + :maxdepth: 1 + + general.rst + tutorial/intro.rst + pinout.rst + + +Installing MicroPython +---------------------- + +See the corresponding section of tutorial: :ref:`samd_intro`. It also includes +a troubleshooting subsection. + +General board control +--------------------- + +The MicroPython REPL is on the USB port, configured in VCP mode. +Tab-completion is useful to find out what methods an object has. +Paste mode (Ctrl-E) is useful to paste a large slab of Python code into +the REPL. + +The :mod:`machine` module:: + + import machine + + machine.freq() # get the current frequency of the CPU + machine.freq(96_000_000) # set the CPU frequency to 96 MHz + +The range accepted by the function call is 1_000_000 to 200_000_000 (1 MHz to 200 MHz) +for SAMD51 and 1_000_000 to 48_000_000 (1 MHz to 48 MHz) for SAMD21. The safe +range for SAMD51 according to the data sheet is 96 MHz to 120 MHz. +At frequencies below 8 MHz USB will be disabled. Changing the frequency below 48 MHz +impacts the baud rates of UART, I2C and SPI. These have to be set again after +changing the CPU frequency. The ms and µs timers are not affected by the frequency +change. + + +Delay and timing +---------------- + +Use the :mod:`time

MicroPython documentation

Quick reference for the Renesas RA
general information for Renesas RA based boards, snippets of useful code, and a tutorial

+

+ Quick reference for the SAMD21/SAMD51
+ general information for SAMD21/SAMD51 based boards, snippets of useful code, and a tutorial +

From c138e10fbb60981ca9e9b7459e7b9ae0c2528c94 Mon Sep 17 00:00:00 2001 From: Damien George Date: Thu, 27 Oct 2022 12:57:10 +1100 Subject: [PATCH 047/823] py/makeversionhdr: Fall back to py/mpconfig.h instead of docs/conf.py. Commit 64af916c111b61bce82c00f356a6b1cb81946d87 removed the version string from docs/conf.py. py/mpconfig.h is a better place to get the version from, so use that (when there is no git repository). Signed-off-by: Damien George --- py/makeversionhdr.py | 20 +++++++++++++------- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/py/makeversionhdr.py b/py/makeversionhdr.py index 54b7fa9ab7d2..d1b41e63b084 100644 --- a/py/makeversionhdr.py +++ b/py/makeversionhdr.py @@ -62,21 +62,27 @@ def get_version_info_from_git(): return git_tag, git_hash -def get_version_info_from_docs_conf(): - with open(os.path.join(os.path.dirname(sys.argv[0]), "..", "docs", "conf.py")) as f: +def get_version_info_from_mpconfig(): + with open(os.path.join(os.path.dirname(sys.argv[0]), "..", "py", "mpconfig.h")) as f: for line in f: - if line.startswith("version = release = '"): - ver = line.strip().split(" = ")[2].strip("'") - git_tag = "v" + ver + if line.startswith("#define MICROPY_VERSION_MAJOR "): + ver_major = int(line.strip().split()[2]) + elif line.startswith("#define MICROPY_VERSION_MINOR "): + ver_minor = int(line.strip().split()[2]) + elif line.startswith("#define MICROPY_VERSION_MICRO "): + ver_micro = int(line.strip().split()[2]) + git_tag = "v%d.%d" % (ver_major, ver_minor) + if ver_micro != 0: + git_tag += ".%d" % (ver_micro,) return git_tag, "" return None def make_version_header(filename): - # Get version info using git, with fallback to docs/conf.py + # Get version info using git, with fallback to py/mpconfig.h info = get_version_info_from_git() if info is None: - info = get_version_info_from_docs_conf() + info = get_version_info_from_mpconfig() git_tag, git_hash = info From e20bb98392c988a410ba04d01d3f573e6c15803d Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 15 Oct 2022 21:37:51 +0200 Subject: [PATCH 048/823] mimxrt/machine_pin: Add the Pin.toggle() method. For consistency with other ports, even if this method is undocumented at the moment. --- ports/mimxrt/machine_pin.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/ports/mimxrt/machine_pin.c b/ports/mimxrt/machine_pin.c index 836bd8524b72..bb2c820100be 100644 --- a/ports/mimxrt/machine_pin.c +++ b/ports/mimxrt/machine_pin.c @@ -285,6 +285,14 @@ STATIC mp_obj_t machine_pin_on(mp_obj_t self_in) { } STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_on_obj, machine_pin_on); +// pin.toggle() +STATIC mp_obj_t machine_pin_toggle(mp_obj_t self_in) { + machine_pin_obj_t *self = self_in; + mp_hal_pin_toggle(self); + return mp_const_none; +} +STATIC MP_DEFINE_CONST_FUN_OBJ_1(machine_pin_toggle_obj, machine_pin_toggle); + // pin.value([value]) STATIC mp_obj_t machine_pin_value(size_t n_args, const mp_obj_t *args) { return machine_pin_obj_call(args[0], (n_args - 1), 0, args + 1); @@ -366,6 +374,7 @@ STATIC const mp_rom_map_elem_t machine_pin_locals_dict_table[] = { { MP_ROM_QSTR(MP_QSTR_on), MP_ROM_PTR(&machine_pin_on_obj) }, { MP_ROM_QSTR(MP_QSTR_low), MP_ROM_PTR(&machine_pin_off_obj) }, { MP_ROM_QSTR(MP_QSTR_high), MP_ROM_PTR(&machine_pin_on_obj) }, + { MP_ROM_QSTR(MP_QSTR_toggle), MP_ROM_PTR(&machine_pin_toggle_obj) }, { MP_ROM_QSTR(MP_QSTR_value), MP_ROM_PTR(&machine_pin_value_obj) }, { MP_ROM_QSTR(MP_QSTR_init), MP_ROM_PTR(&machine_pin_init_obj) }, { MP_ROM_QSTR(MP_QSTR_irq), MP_ROM_PTR(&machine_pin_irq_obj) }, From 9d2e179fa565d8af96fb6ce3643e00f999c9210a Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 22 Oct 2022 21:28:42 +0200 Subject: [PATCH 049/823] mimxrt: Fix CPU freeze when calling __WFE() in MICROPY_EVENT_POLL_HOOK. This issue affected i.MX RT 1052, 1062 and 1064. It seems to be addressed by Errata ERR006223, which also mentions i.MX RT101x and 102x, but these devices worked well even without the change. As a side effect, the current consumption at an idle REPL drops significantly with this fix. Fixes issue #7235. --- ports/mimxrt/boards/MIMXRT1052_clock_config.c | 1 + ports/mimxrt/boards/MIMXRT1062_clock_config.c | 1 + ports/mimxrt/boards/MIMXRT1064_clock_config.c | 1 + ports/mimxrt/mpconfigport.h | 1 + 4 files changed, 4 insertions(+) diff --git a/ports/mimxrt/boards/MIMXRT1052_clock_config.c b/ports/mimxrt/boards/MIMXRT1052_clock_config.c index 93492812977a..fa7450d487a6 100644 --- a/ports/mimxrt/boards/MIMXRT1052_clock_config.c +++ b/ports/mimxrt/boards/MIMXRT1052_clock_config.c @@ -465,4 +465,5 @@ void BOARD_BootClockRUN(void) { IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + CLOCK_SetMode(kCLOCK_ModeRun); } diff --git a/ports/mimxrt/boards/MIMXRT1062_clock_config.c b/ports/mimxrt/boards/MIMXRT1062_clock_config.c index 05474167bd85..589ffb0b5831 100644 --- a/ports/mimxrt/boards/MIMXRT1062_clock_config.c +++ b/ports/mimxrt/boards/MIMXRT1062_clock_config.c @@ -487,4 +487,5 @@ void BOARD_BootClockRUN(void) { IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + CLOCK_SetMode(kCLOCK_ModeRun); } diff --git a/ports/mimxrt/boards/MIMXRT1064_clock_config.c b/ports/mimxrt/boards/MIMXRT1064_clock_config.c index 5e49a2fff80e..56dd75d7fbf6 100644 --- a/ports/mimxrt/boards/MIMXRT1064_clock_config.c +++ b/ports/mimxrt/boards/MIMXRT1064_clock_config.c @@ -487,4 +487,5 @@ void BOARD_BootClockRUN(void) { IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK; /* Set SystemCoreClock variable. */ SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK; + CLOCK_SetMode(kCLOCK_ModeRun); } diff --git a/ports/mimxrt/mpconfigport.h b/ports/mimxrt/mpconfigport.h index 8642d53ecc45..3f87800e3056 100644 --- a/ports/mimxrt/mpconfigport.h +++ b/ports/mimxrt/mpconfigport.h @@ -241,6 +241,7 @@ extern const struct _mp_obj_type_t network_lan_type; do { \ extern void mp_handle_pending(bool); \ mp_handle_pending(true); \ + __WFE(); \ } while (0); #define MICROPY_MAKE_POINTER_CALLABLE(p) ((void *)((mp_uint_t)(p) | 1)) From 65fa7fd8bbaf570be3f4654bcc597a46c70e4b75 Mon Sep 17 00:00:00 2001 From: robert-hh Date: Sat, 15 Oct 2022 11:40:22 +0200 Subject: [PATCH 050/823] mimxrt/machine_timer: Use soft-timer implementation for machine.Timer. This releases the hardware timers for other tasks, which need a higher resolution and faster response. And it is less port-specific code. --- docs/mimxrt/quickref.rst | 9 +- ports/mimxrt/Makefile | 1 + ports/mimxrt/board_init.c | 3 - ports/mimxrt/machine_timer.c | 158 +++++++++-------------------------- ports/mimxrt/main.c | 2 + ports/mimxrt/mphalport.h | 4 + ports/mimxrt/systick.c | 7 ++ 7 files changed, 58 insertions(+), 126 deletions(-) diff --git a/docs/mimxrt/quickref.rst b/docs/mimxrt/quickref.rst index c75fe60c8d66..06f91f7f5031 100644 --- a/docs/mimxrt/quickref.rst +++ b/docs/mimxrt/quickref.rst @@ -56,21 +56,18 @@ Use the :mod:`time