Skip to content

Commit

Permalink
Update chapter names per ARC review feedback
Browse files Browse the repository at this point in the history
  • Loading branch information
pdonahue-ventana committed Aug 11, 2023
1 parent f95a676 commit 2c19654
Show file tree
Hide file tree
Showing 4 changed files with 4 additions and 4 deletions.
2 changes: 1 addition & 1 deletion Sdext.tex
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
\chapter{Sdext ISA Extension}
\chapter{Sdext (ISA Extension)}
\label{sec:core_debug}

This chapter describes the Sdext ISA extension. It must be implemented to make
Expand Down
2 changes: 1 addition & 1 deletion Sdtrig.tex
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
\chapter{Sdtrig ISA Extension}
\chapter{Sdtrig (ISA Extension)}
\label{sec:trigger}

This chapter describes the Sdtrig ISA extension, which can be implemented
Expand Down
2 changes: 1 addition & 1 deletion debug_module.tex
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
\chapter{Debug Module (DM), non-ISA} \label{chap:dm}
\chapter{Debug Module (DM) (non-ISA extension)} \label{chap:dm}

\begin{steps}{The Debug Module implements a translation interface between abstract debug
operations and their specific implementation. It might support the following
Expand Down
2 changes: 1 addition & 1 deletion dtm.tex
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
\chapter{Debug Transport Module (DTM), non-ISA} \label{dtm}
\chapter{Debug Transport Module (DTM) (non-ISA extension)} \label{dtm}

Debug Transport Modules provide access to the DM over one or more transports
(e.g.\ JTAG or USB).
Expand Down

0 comments on commit 2c19654

Please sign in to comment.