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drop static
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chriselrod committed Aug 11, 2021
1 parent 7510f29 commit 1e3ffb5
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Showing 3 changed files with 1 addition and 11 deletions.
6 changes: 1 addition & 5 deletions Project.toml
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Expand Up @@ -3,12 +3,8 @@ uuid = "94e857df-77ce-4151-89e5-788b33177be4"
authors = ["Julia Computing", "Inc. and Contributors"]
version = "0.1.0"

[deps]
Static = "aedffcd0-7271-4cad-89d0-dc628f76c6d3"

[compat]
Static = "0.1,0.2,0.3"
julia = "1.2"
julia = "1"

[extras]
Test = "8dfed614-e22c-5e08-85e1-65c5234f0b40"
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3 changes: 0 additions & 3 deletions src/SIMDTypes.jl
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@@ -1,15 +1,12 @@
module SIMDTypes

using Static: StaticInt

struct Bit; data::Bool; end # Dummy for Ptr
# @inline Base.convert(::Type{Bool}, b::Bit) = getfield(b, :data)

const FloatingTypes = Union{Float16,Float32,Float64}
const SignedHW = Union{Int8,Int16,Int32,Int64}
const UnsignedHW = Union{UInt8,UInt16,UInt32,UInt64}
const IntegerTypesHW = Union{SignedHW,UnsignedHW}
const IntegerTypes = Union{StaticInt,IntegerTypesHW}

const NativeTypesExceptBitandFloat16 = Union{Bool,Base.HWReal}
const NativeTypesExceptBit = Union{Bool,Base.HWReal,Float16}
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3 changes: 0 additions & 3 deletions test/runtests.jl
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Expand Up @@ -15,13 +15,10 @@ using Test
@test 1f0 isa SIMDTypes.NativeTypesExceptBitandFloat16

@test 1.3 isa SIMDTypes.FloatingTypes
@test !(1.3 isa SIMDTypes.IntegerTypes)
@test !(1.3 isa SIMDTypes.IntegerTypesHW)
@test 1 isa SIMDTypes.IntegerTypes
@test 1 isa SIMDTypes.SignedHW
@test !(1 isa SIMDTypes.UnsignedHW)
@test 1 isa SIMDTypes.IntegerTypesHW
@test one(UInt) isa SIMDTypes.IntegerTypes
@test !(one(UInt) isa SIMDTypes.SignedHW)
@test one(UInt) isa SIMDTypes.UnsignedHW
@test one(UInt) isa SIMDTypes.IntegerTypesHW
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