diff --git a/src/SIMDTypes.jl b/src/SIMDTypes.jl
index f095eff..7062de9 100644
--- a/src/SIMDTypes.jl
+++ b/src/SIMDTypes.jl
@@ -1,5 +1,7 @@
 module SIMDTypes
 
+# using Static: StaticInt
+
 struct Bit; data::Bool; end # Dummy for Ptr
 # @inline Base.convert(::Type{Bool}, b::Bit) = getfield(b, :data)
 
@@ -7,6 +9,7 @@ const FloatingTypes = Union{Float16,Float32,Float64}
 const SignedHW = Union{Int8,Int16,Int32,Int64}
 const UnsignedHW = Union{UInt8,UInt16,UInt32,UInt64}
 const IntegerTypesHW = Union{SignedHW,UnsignedHW}
+# const IntegerTypes = Union{StaticInt,IntegerTypesHW}
 
 const NativeTypesExceptBitandFloat16 = Union{Bool,Base.HWReal}
 const NativeTypesExceptBit = Union{Bool,Base.HWReal,Float16}
diff --git a/test/runtests.jl b/test/runtests.jl
index 00b0049..5f5de15 100644
--- a/test/runtests.jl
+++ b/test/runtests.jl
@@ -15,10 +15,13 @@ using Test
   @test 1f0 isa SIMDTypes.NativeTypesExceptBitandFloat16
   
   @test 1.3 isa SIMDTypes.FloatingTypes
+  # @test !(1.3 isa SIMDTypes.IntegerTypes)
   @test !(1.3 isa SIMDTypes.IntegerTypesHW)
+  # @test 1 isa SIMDTypes.IntegerTypes
   @test 1 isa SIMDTypes.SignedHW
   @test !(1 isa SIMDTypes.UnsignedHW)
   @test 1 isa SIMDTypes.IntegerTypesHW
+  # @test one(UInt) isa SIMDTypes.IntegerTypes
   @test !(one(UInt) isa SIMDTypes.SignedHW)
   @test one(UInt) isa SIMDTypes.UnsignedHW
   @test one(UInt) isa SIMDTypes.IntegerTypesHW