In this project, Artificial neural network is designed in Verilog HDL, which recognizes handwritten digits and displays the output. It is implemented in Quartus prime lite and Modelsim simulation softwares.
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In this project, Artificial neural network is designed in Verilog HDL, which recognizes handwritten digits and displays the output. It is implemented in Quartus prime lite and Modelsim simulation softwares.
Kalaimani02/ANN_in_Verilog
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In this project, Artificial neural network is designed in Verilog HDL, which recognizes handwritten digits and displays the output. It is implemented in Quartus prime lite and Modelsim simulation softwares.
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