This repository is a collection of code examples for Chisel.
This collection has been moved to the latest version of Chisel, Chisel 3. I have collected notes on this move in TowardsChisel3
$ git clone https://github.com/schoeberl/chisel-examples.git
The collection is organized as follows:
hello-world is a self contained minimal project for a blinking LED in an FPGA.
The rest of the examples are rooted in the current folder.
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A recent version of Java (JDK 8 or later)
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The Scala build tool sbt
make alu Generates the Verilog files for the small ALU. Synthesize it for the DE0 board with Quartus and the alu project file.
make alu-test Generats the C++ based simulation and runs the tests.
See the Makefile for further examples, or simply run sbt run
to see all objects with a main.
Change switches for FPGA configuration to:
+------+
|* ** *|
| * * |
+------+
Probably add USB blaster permissions for: Bus 001 Device 005: ID 09fb:6810 Altera and 09fb:6010
A TTL UART is connected to GPIO pins 1 and 2 of GPIO 0.
GND * *
* *
* *
* *
* *
txd * * rxd (pin 1)
rxd and txd are from the FPGA view, therefore TTL UART rxd needs to be connected to txd (pin 2) and the other way around.