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dtr #3
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Testing utteranc.es |
Is memory planning a transformed version of the backpack problem? |
@cloud11665 checkpointing is NP complete, but it isnt exactly the backpack problem cause the value to pack one thing change base on what other thing you have pack. a very interesting fact is that an approach in register allocation is essentially to set up a LRU cache for all values, and evict when out of register slot, very much like DTR for checkpointing. (it is called linear scan register allocator) |
@MarisaKirisame thanks for the quick response. |
@cloud11665 by realloc, do you mean literally the realloc function? |
Dynamic Tensor Rematerialization
https://marisa.moe/dtr.html
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