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Use single LR/SC flag per tile. #53

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1 change: 0 additions & 1 deletion piton/design/chip/tile/l15/rtl/Flist.l15
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,6 @@ l15_mshr.v
l15_pipeline.v
rf_l15_lruarray.v
rf_l15_mesi.v
rf_l15_lrsc_flag.v
rf_l15_wmt.v
l15_cpxencoder.v

Expand Down
27 changes: 0 additions & 27 deletions piton/design/chip/tile/l15/rtl/l15.v
Original file line number Diff line number Diff line change
Expand Up @@ -565,26 +565,6 @@ rf_l15_mesi mesi(
.read_data(mesi_l15_dout_s2)
);

// LRSC Flag array
wire l15_lrsc_flag_read_val_s1;
wire [`L15_CACHE_INDEX_WIDTH-1:0] l15_lrsc_flag_read_index_s1;
wire l15_lrsc_flag_write_val_s2;
wire [`L15_CACHE_INDEX_WIDTH-1:0] l15_lrsc_flag_write_index_s2;
wire [3:0] l15_lrsc_flag_write_mask_s2;
wire [3:0] l15_lrsc_flag_write_data_s2;
wire [3:0] lrsc_flag_l15_dout_s2;

rf_l15_lrsc_flag lrsc_flag(
.clk(clk),
.rst_n(rst_n),
.read_valid(l15_lrsc_flag_read_val_s1),
.read_index(l15_lrsc_flag_read_index_s1),
.write_valid(l15_lrsc_flag_write_val_s2),
.write_index(l15_lrsc_flag_write_index_s2),
.write_mask(l15_lrsc_flag_write_mask_s2),
.write_data(l15_lrsc_flag_write_data_s2),
.read_data(lrsc_flag_l15_dout_s2)
);

// // home map table array
// wire l15_hmt_read_val_s1;
Expand Down Expand Up @@ -656,7 +636,6 @@ l15_pipeline pipeline(
.dtag_l15_dout_s2(dtag_l15_dout_s2),
.dcache_l15_dout_s3(dcache_l15_dout_s3),
.mesi_l15_dout_s2(mesi_l15_dout_s2),
.lrsc_flag_l15_dout_s2(lrsc_flag_l15_dout_s2),
.lruarray_l15_dout_s2(lruarray_l15_dout_s2),
.wmt_l15_data_s3(wmt_l15_data_s3),
.pcxdecoder_l15_rqtype (transducer_l15_rqtype),
Expand Down Expand Up @@ -718,12 +697,6 @@ l15_pipeline pipeline(
.l15_mesi_write_index_s2(l15_mesi_write_index_s2),
.l15_mesi_write_mask_s2(l15_mesi_write_mask_s2),
.l15_mesi_write_data_s2(l15_mesi_write_data_s2),
.l15_lrsc_flag_read_val_s1(l15_lrsc_flag_read_val_s1),
.l15_lrsc_flag_read_index_s1(l15_lrsc_flag_read_index_s1),
.l15_lrsc_flag_write_val_s2(l15_lrsc_flag_write_val_s2),
.l15_lrsc_flag_write_index_s2(l15_lrsc_flag_write_index_s2),
.l15_lrsc_flag_write_mask_s2(l15_lrsc_flag_write_mask_s2),
.l15_lrsc_flag_write_data_s2(l15_lrsc_flag_write_data_s2),
.l15_wmt_read_val_s2(l15_wmt_read_val_s2),
.l15_wmt_read_index_s2(l15_wmt_read_index_s2),
.l15_wmt_write_val_s3(l15_wmt_write_val_s3),
Expand Down
82 changes: 60 additions & 22 deletions piton/design/chip/tile/l15/rtl/l15_pipeline.v.pyv
Original file line number Diff line number Diff line change
Expand Up @@ -126,15 +126,6 @@ module l15_pipeline(
output reg [`L15_UNPARAM_7_0] l15_mesi_write_mask_s2,
output reg [`L15_UNPARAM_7_0] l15_mesi_write_data_s2,

// lrsc_flag
output reg l15_lrsc_flag_read_val_s1,
output reg [`L15_CACHE_INDEX_WIDTH-1:0] l15_lrsc_flag_read_index_s1,
input wire [`L15_UNPARAM_3_0] lrsc_flag_l15_dout_s2,
output reg l15_lrsc_flag_write_val_s2,
output reg [`L15_CACHE_INDEX_WIDTH-1:0] l15_lrsc_flag_write_index_s2,
output reg [`L15_UNPARAM_3_0] l15_lrsc_flag_write_mask_s2,
output reg [`L15_UNPARAM_3_0] l15_lrsc_flag_write_data_s2,

// lruarray
output reg l15_lruarray_read_val_s1,
output reg [`L15_CACHE_INDEX_WIDTH-1:0] l15_lruarray_read_index_s1,
Expand Down Expand Up @@ -2044,8 +2035,20 @@ end
////////////////////////////
// LRSC FLAG read control logics
////////////////////////////

// LRSC flag: read in stage 1; write in the end of stage 2
reg [`L15_CACHE_INDEX_WIDTH-1:0] l15_lrsc_flag_index;
reg l15_lrsc_flag;
reg [`L15_UNPARAM_1_0] l15_lrsc_flag_way;


// Remove decoder_lrsc_flag_read_op_s1
reg lrsc_flag_read_val_s1;
reg [`L15_CACHE_INDEX_WIDTH-1:0] lrsc_flag_read_index_s1;
reg l15_lrsc_flag_read_val_s1;
reg l15_lrsc_flag_read_match_s1;
reg l15_lrsc_flag_readout_s2;
reg [`L15_UNPARAM_1_0] l15_lrsc_flag_stored_way_s2;
always @ *
begin
lrsc_flag_read_val_s1 = 0;
Expand All @@ -2059,7 +2062,27 @@ begin
endcase

l15_lrsc_flag_read_val_s1 = lrsc_flag_read_val_s1 && val_s1 && !stall_s1;
l15_lrsc_flag_read_index_s1[`L15_CACHE_INDEX_WIDTH-1:0] = lrsc_flag_read_index_s1;
l15_lrsc_flag_read_match_s1 = (lrsc_flag_read_index_s1 == l15_lrsc_flag_index);
end

always @(posedge clk)
begin
if (!rst_n)
begin
l15_lrsc_flag_readout_s2 <= 1'b0;
end
else
begin
if (l15_lrsc_flag_read_val_s1 && l15_lrsc_flag_read_match_s1)
begin
l15_lrsc_flag_readout_s2 <= l15_lrsc_flag;
l15_lrsc_flag_stored_way_s2 <= l15_lrsc_flag_way;
end
else
begin
l15_lrsc_flag_readout_s2 <= 1'b0;
end
end
end

////////////////////////////
Expand Down Expand Up @@ -2525,11 +2548,7 @@ begin
// 2'd2 ? 4'b0100 :
// 4'b1000 ;

tagcheck_lrsc_flag_s2 = (tagcheck_val_s2 == 1'b0) ? 1'b0 :
(tagcheck_way_s2 == 2'd0) ? lrsc_flag_l15_dout_s2[0] :
(tagcheck_way_s2 == 2'd1) ? lrsc_flag_l15_dout_s2[1] :
(tagcheck_way_s2 == 2'd2) ? lrsc_flag_l15_dout_s2[2] :
lrsc_flag_l15_dout_s2[3] ;
tagcheck_lrsc_flag_s2 = (tagcheck_way_s2 == l15_lrsc_flag_stored_way_s2) ? l15_lrsc_flag_readout_s2 : 1'b0;

tagcheck_state_s2 = (tagcheck_val_s2 == 1'b0) ? `L15_MESI_STATE_I :
(tagcheck_way_s2 == 2'd0) ? mesi_state_way0_s2 :
Expand Down Expand Up @@ -2925,6 +2944,8 @@ reg lrsc_flag_write_val_s2;
reg [`L15_CACHE_INDEX_MASK] lrsc_flag_write_index_s2;
reg [`L15_UNPARAM_1_0] lrsc_flag_write_way_s2;
reg lrsc_flag_write_state_s2;
reg l15_lrsc_flag_write_val_s2;
reg l15_lrsc_flag_write_match_s2;
always @ *
begin
lrsc_flag_write_val_s2 = 0;
Expand Down Expand Up @@ -2961,15 +2982,32 @@ begin
lrsc_flag_write_state_s2 = 1'b0;
end
endcase
// bugfix (stall signal needs to be here)
// trin todo: why stall_s2 is needed
l15_lrsc_flag_write_val_s2 = lrsc_flag_write_val_s2 && val_s2 && !stall_s2;
l15_lrsc_flag_write_index_s2[`L15_CACHE_INDEX_MASK] = lrsc_flag_write_index_s2;
l15_lrsc_flag_write_mask_s2[`L15_UNPARAM_3_0] = (lrsc_flag_write_way_s2 == 0) ? 4'b0001 :
(lrsc_flag_write_way_s2 == 1) ? 4'b0010 :
(lrsc_flag_write_way_s2 == 2) ? 4'b0100 :
4'b1000 ;
l15_lrsc_flag_write_data_s2[`L15_UNPARAM_3_0] = {4{lrsc_flag_write_state_s2}};
l15_lrsc_flag_write_match_s2 = (lrsc_flag_write_index_s2 == l15_lrsc_flag_index) &&
(lrsc_flag_write_way_s2 == l15_lrsc_flag_way);
end


always @(posedge clk)
begin
if (!rst_n)
begin
l15_lrsc_flag <= 1'b0;
end
else
begin
if (l15_lrsc_flag_write_val_s2 && lrsc_flag_write_state_s2)
begin
l15_lrsc_flag_index <= lrsc_flag_write_index_s2; // TODO check width
l15_lrsc_flag_way <= lrsc_flag_write_way_s2;
l15_lrsc_flag <= 1'b1;
end
else if (l15_lrsc_flag_write_val_s2 && !lrsc_flag_write_state_s2 && l15_lrsc_flag_write_match_s2)
begin
l15_lrsc_flag <= 1'b0;
end
end
end

////////////////////////////
Expand Down
126 changes: 0 additions & 126 deletions piton/design/chip/tile/l15/rtl/rf_l15_lrsc_flag.v.pyv

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