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[RISCV] Use Zacas for AtomicRMWInst::Nand i32 and XLen. (llvm#80119)
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We don't have an AMO instruction for Nand, so with the A extension we
use an LR/SC loop. If we have Zacas we can use a CAS loop instead.

According to the Zacas spec, a CAS loop scales to highly parallel
systems better than LR/SC.
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topperc authored Jan 31, 2024
1 parent 40ebe52 commit cf401f7
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5 changes: 5 additions & 0 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -19514,6 +19514,11 @@ RISCVTargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const {
unsigned Size = AI->getType()->getPrimitiveSizeInBits();
if (Size == 8 || Size == 16)
return AtomicExpansionKind::MaskedIntrinsic;

if (Subtarget.hasStdExtZacas() && AI->getOperation() == AtomicRMWInst::Nand &&
(Size == Subtarget.getXLen() || Size == 32))
return AtomicExpansionKind::CmpXChg;

return AtomicExpansionKind::None;
}

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