R2.13 rocm enhanced bitcodes (#2768)

* [ROCm] Disallow undefined symbols when linking hsaco

* [ROCm] Allow 6.3 bitcodes

---------

Co-authored-by: scxfjiang <xuefei.jiang@amd.com>

tensorflow/compiler/xla/service/gpu/llvm_gpu_backend/gpu_backend_lib.cc

@@ -799,6 +799,7 @@ StatusOr<std::vector<uint8_t>> EmitModuleToHsaco(
   std::vector<llvm::StringRef> lld_args{
       llvm_ir::AsStringRef("ld.lld"),    llvm_ir::AsStringRef("-flavor"),
       llvm_ir::AsStringRef("gnu"),       llvm_ir::AsStringRef("-shared"),
+      llvm_ir::AsStringRef("-z"),        llvm_ir::AsStringRef("defs"),
       llvm_ir::AsStringRef(isabin_path), llvm_ir::AsStringRef("-o"),
       llvm_ir::AsStringRef(hsaco_path),
   };

third_party/llvm/rocm6.3-bitcode.patch

@@ -0,0 +1,50 @@
+From 25d98fbcb48786f611eb24f5162854a71d275c6f Mon Sep 17 00:00:00 2001
+From: Dragan Mladjenovic <Dragan.Mladjenovic@amd.com>
+Date: Thu, 21 Nov 2024 04:22:03 -0600
+Subject: [PATCH] Accept rocm 6.3 bitcode files
+
+---
+ llvm/lib/IR/AutoUpgrade.cpp | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
+index 92153b05c6ea..25cba18fe959 100644
+--- a/llvm/lib/IR/AutoUpgrade.cpp
++++ b/llvm/lib/IR/AutoUpgrade.cpp
+@@ -27,6 +27,7 @@
+ #include "llvm/IR/IntrinsicInst.h"
+ #include "llvm/IR/Intrinsics.h"
+ #include "llvm/IR/IntrinsicsAArch64.h"
++#include "llvm/IR/IntrinsicsAMDGPU.h"
+ #include "llvm/IR/IntrinsicsARM.h"
+ #include "llvm/IR/IntrinsicsWebAssembly.h"
+ #include "llvm/IR/IntrinsicsX86.h"
+@@ -601,6 +602,11 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
+   switch (Name[0]) {
+   default: break;
+   case 'a': {
++    if (Name.startswith("amdgcn.readfirstlane.i32")) {
++      rename(F);
++      NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::amdgcn_readfirstlane);
++      return true;
++    }
+     if (Name.startswith("arm.rbit") || Name.startswith("aarch64.rbit")) {
+       NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::bitreverse,
+                                         F->arg_begin()->getType());
+@@ -937,6 +943,13 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
+     break;
+   case 'i':
+   case 'l': {
++    if(Name.startswith("ldexp")) {
++      auto Args = F->getFunctionType()->params();
++      Type *Tys[] = { Args[0] };
++      rename(F);
++      NewFn = Intrinsic::getDeclaration(F->getParent(), Intrinsic::amdgcn_ldexp, Tys);
++      return true;
++    }
+     bool IsLifetimeStart = Name.startswith("lifetime.start");
+     if (IsLifetimeStart || Name.startswith("invariant.start")) {
+       Intrinsic::ID ID = IsLifetimeStart ?
+-- 
+2.34.1
+

third_party/llvm/workspace.bzl

@@ -23,6 +23,7 @@ def repo(name):
             "//third_party/llvm:toolchains.patch",
             "//third_party/llvm:zstd.patch",
             "//third_party/llvm:rocm6.2-bitcode.patch",
+            "//third_party/llvm:rocm6.3-bitcode.patch",
         ],
         link_files = {"//third_party/llvm:run_lit.sh": "mlir/run_lit.sh"},
     )