This is a tutorial for OVM (Open Verification Methodology) testbench . OVM is very similar to UVM(Universal Verification Methodology).
You can run this tutorial on Windows with Modelsim. These demos can run correctly with modeltech_10.2c .
There are serveral version of testbench(from ovm_demo_v1 to ovm_demo_v3). ovm_demo_v1 is the most simple ovm testbench, you can start from this.
a demo with basic OVM framework only Tc and harness in this bench
add clk and rst signal , you can see the waveform generated by the testbench with questa
add tb add duv, an and gate add interface