dictionary.py

instruction_type={'code':['01', '02', '10', '18', '19', '20', '21', '22', '23', '24', '25', '26', '27', '28', '29', '30', '31', '32', '33', '34', '35', '36', '37', '38', '39', '40', '41', '42', '43', '44', '45', '46', '47', '48', '49', '50', '51', '52', '53', '54', '55', '56', '57', '58', '59', '60', '61', '62', '63', '64', '65', '66', '67', '68', '69', '70', '71', '72', '73', '74', '75', '76', '77', '78', '79', '80', '81', '82', '83', '84', '85', '86', '87', '88', '89', '90', '91', '92', '93', '94', '95', '96', '97', '98', '99', '100', '101', '102', '103', '104', '105', '106', '107', '108', '109', '110', '111', '112', '113', '114', '115', '116', '117', '118', '119', '120', '121', '122', '123', '124', '125', '126', '127', '128', '129', '130', '131', '132', '133', '134', '135', '136', '137', '138', '139', '140', '141', '142', '143', '144', '145', '146', '147', '148', '149', '150', '151', '152', '153', '154', '155', '156', '157', '158', '159', '160', '161', '162', '163', '164', '165', '166', '166', '168', '170', '172', '174', '176', '178', '180', '182', '184', '186', '188', '190', '192', '194', '196', '198','200','202','203','206','208','210'],
'ist':['mov mem lit32', 'mov mem lit16','mov reg32 mem32', 'mov mem lit08', 'mov mem reg32', 'mov mem reg16', 'mov mem reg08', 'mov reg32 lit32', 'mov reg16 lit16', 'mov reg08 lit08', 'mov reg32 reg32', 'mov reg16 reg16', 'mov reg08 reg08', 'mov reg32 mem','mov reg32 memsib','mov reg16 memsib','mov reg8 memsib','mov reg16 mem', 'mov reg08 mem', 'add mem lit32', 'add mem lit16', 'add mem lit08', 'add mem reg32', 'add mem reg16', 'add mem reg08', 'add reg32 lit32', 'add reg16 lit16', 'add reg08 lit08', 'add reg32 reg32', 'add reg16 reg16', 'add reg08 reg08', 'add reg32 mem', 'add reg16 mem', 'add reg08','add reg32 memsib','add reg16 memsib','add reg8 memsib', 'sub mem lit32', 'sub mem lit16', 'sub mem lit08', 'sub mem reg32', 'sub mem reg16', 'sub mem reg08', 'sub reg32 lit32', 'sub reg16 lit16', 'sub reg08 lit08', 'sub reg32 reg32', 'sub reg16 reg16', 'sub reg08 reg08', 'sub reg32 mem', 'sub reg16 mem', 'sub reg08 mem','sub reg32 memsib','sub reg16 memsib','sub reg8 memsib', 'push reg32', 'push reg16', 'push reg08','push mem','push memsib' 'inc reg32', 'inc reg16', 'inc reg08', 'inc mem32/mem','inc memsib', 'dec reg32', 'dec reg16', 'dec reg08', 'dec mem32/mem', 'and mem lit32', 'and mem lit16', 'and mem lit08', 'and mem reg32', 'and mem reg16', 'and mem reg08', 'and reg32 lit32', 'and reg16 lit16', 'and reg08 lit08', 'and reg32 reg32', 'and reg16 reg16', 'and reg08 reg08', 'and reg32 mem', 'and reg16 mem', 'and reg08 mem',  'or mem lit32', 'or mem lit16', 'or mem lit08', 'or mem reg32', 'or mem reg16', 'or mem reg08', 'or reg32 lit32', 'or reg16 lit16', 'or reg08 lit08', 'or reg32 reg32', 'or reg16 reg16', 'or reg08 reg08', 'or reg32 mem', 'or reg16 mem', 'or reg08 mem', 'xor mem lit32', 'xor mem lit16', 'xor mem lit08', 'xor mem reg32', 'xor mem reg16', 'xor mem reg08', 'xor reg32 lit32', 'xor reg16 lit16', 'xor reg08 lit08', 'xor reg32 reg32', 'xor reg16 reg16', 'xor reg08 reg08', 'xor reg32 mem', 'xor reg16 mem', 'xor reg08 mem', 'jmp mem', 'je mem', 'jen mem', 'jg mem', 'jge mem', 'jl mem', 'jle mem', 'jz mem', 'jnz mem', 'loop mem', 'cmp mem reg32', 'cmp mem reg16', 'cmp mem reg08', 'cmp reg32 lit32', 'cmp reg16 lit16', 'cmp reg08 lit08', 'cmp reg32 reg32', 'cmp reg16 reg16', 'cmp reg08 reg08', 'cmp reg32 mem', 'cmp reg16 mem', 'cmp reg08 mem','int 0x80','not reg32', 'not reg16', 'not reg08', 'not mem32/mem']
}
reg=['eax','ebx','ecx','edx','esp','ebp','esi','edi']
rs={'eax':['reg32',0,'er0'],'ecx':['reg32',1,'er1'],'edx':['reg32',2,'er2'],'ebx':['reg32',3,'er3'],'esi':['reg32',6,'er6'],'edi':['reg32',7,'er7'],'esp':['reg32',4,'er4'],'ebp':['reg32',5,'er5'],'ax':['reg16',0,'r0'],'cx':['reg16',1,'r1'],'dx':['reg16',2,'r2'],'bx':['reg16',3,'r3'],'si':['reg16',6,'r6'],'di':['reg16',7,'r7'],'sp':['reg16',4,'r4'],'bp':['reg16',5,'r5'],'al':['reg08',0,'lr0'],'cl':['reg08',1,'lr1'],'bl':['reg08',2,'lr2'],'dl':['reg08',3,'lr3'],'ah':['reg08',0,'lr0'],'ch':['reg08',1,'hr1'],'bh':['reg08',3,'hr3'],'dh':['reg08',2,'hr2']}
ins=['add','mov','sub','xor','and','or','call','mul','push','ins','dec','not','loop','int','cmp','ret','movsb', 'movsw', 'movsd', 'cmpsb', 'cmpsw', 'cmpsd', 'scasb', 'scasw', 'scasd', 'stosb', 'stosw', 'stosd', 'cld', 'std','jmp','jeq','je','jne','jg','jge','jng','jl','jle']
mem={'byte':1,'word':2,'dword':4,'qword':8}

jm=['jmp','jeq','je','jne','jg','jge','jng','jl','jle']
dic={"lineNo":[],'symN':[],"symNo":[],'sym':[],'type':[],'size':[],'addr':[0],'status':[],'seg':[],'ele':[]}
lit_table={'Line No':[],'Literal_NO':[],'Symbol':[],'Literal':[],'Hex':[],'Type':[]}
lst_table={'line_num':[],'hex':[],'instruction':[]}
typeofbss={'resb':1,'resw':2,'resd':4,'resq':8,'rest':10}
typeofdata={'db':1,'dw':2,'dd':4,'dq':8,'dt':10,'equ':0}
intermed={'Iline':[]}
constart=['printf','scanf','strlen']
ex=['*','+','-']
mod={'eax':0,'ecx':1,'edx':2,'ebx':3,'[]':4,'disp32':5,'esi':6,'edi':7}
sib={'eax':0,'ecx':1,'edx':2,'ebx':3,'esp':4,'[]':5,'esi':6,'edi':7}
modR={"reg reg":3,'reg mem':0,'mem reg':0 }
ad={'0':0,'2':1,'4':2,'8':3}
macro=[]
macropara=[]
mline=[]