Dual boot Optiboot DX

[Floessie]

Hi there,

Seems like urboot won't be adopted to AVR Dx soon. There's this nice dual boot feature, where an external SPI flash is checked for valid code which is then flashed onto the µC.

As I'm planning to replace the old ATmegas with DDs or DBs in new designs, is anyone aware of such functionality in a fork of Optiboot DX or another Dx bootloader? Or do you know of an urboot port to Dx maybe in the making?

Thanks,
Flössie

[MX682X]

Just an Idea, but how big are your programs? If they fit in Half the Flash, it might be possible to use the upper half of the Flash as the Memory Buffer (instead of an external Flash) and make the bootloader copy the upper half to the lower half. A brainstorm ASM for 128k chips (ASM cause optiboot_dx is more ASM then C anyway at this point):

ldi r30 0x00
ldi r31 0x02 // begin at 0x0200
ldi r26 0x01 // known '1'
start:
cpi r31 0xFE // last valid address is 0xFD as we increment by 2
brge end
erase:
ldi r24 8 // page erase (512), pointed by Z
rcall nvm_cmd
spm
ldi r24, 2 // Flash Write enable
rcall nvm_cmd
ldi r25 0x02 // set up length of 512
ldi r24 0x00
readWrite:
STS RAMZ r26 // '0x01' go to upper space
elpm r0, Z+ // load memory, increment
elpm r1, Z+ //
sbiw r30, 2 // go back to before the increment
STS RAMZ r1 // '0x00' go to lower space
spm // store memory to FLASH
adiw r30, 2 // return to the correct address
brne readWrite // read/write next word
sbiw r24, 2 // counting pages
brne erase // 512
end:

This gives us 48 bytes. if optiboot_dx isn't using the erase function, this should fit in. Needs an entry condition though, like if there was a softwareReset, check GPR3 for 0xA5, if true, copy the Flash.
However, I'm not sure if anyone has done something like this before, so no promises.

@SpenceKonde What do you think about this idea?
Maybe add this as a module to optiboot, but enabled only by define only or so.

[MX682X]

I think i've come up with a crazy idea of how to solve this issue, especially, since #512 is also asking for that.

Basically, what you need to do is to specify the upper half of your Flash memory as APPDATA. Your App will need a function that:
A: Erases the upper Pages
B: Writes the incoming update into this section (starting at 1/2 FLASH_SIZE + 0x200).
C: Check the new Program for Validity (Checksum or read-back, whatever floats your boat)
D: Can jump into the following bootloader function ( e.g. .ota_copy=0x0e0 ; address must be known at compile-time)

The following code will copy all data from the upper half to the lower half, starting from 0x200 and soft-reset.

This circumvents the problem of the limited space we have in the bootloader and the question about the entry condition (no entry condition needed) And it does not create any additional Flash wear, as we're using different "banks".
And, nope, reading from external Memory is not possbile in 512 bytes (less then 256 Instructions (!)).

However, as I don't have a way of testing, this is basically just theory.

I can (I hope) provide a ready-to-use Microchip Studio Project for compiling the Bootloader if it helps.

@SpenceKonde I think this could be a useful feature to have in the bootloader, especially as the avrdude flash erase won't be implemented. Or did you have any other plans on how to use the 60 bytes that are left right now?

__attribute__((section(".ota_copy"))) __attribute__((used)) __attribute__ ((naked)) static void ota_copy();
static void ota_copy() {
   __asm__ __volatile__(
   "cli               \n"   /* No Interrupts allowed */
   "ldi  r30,    0x00 \n"
   "ldi  r31,    0x02 \n"    /* 0x0200, start of App, consider: Compiletime Constant */ 
   "ota_erase:"
   "ldi  r24, %[CMDA] \n"    /* load argument for page erase */
   "rcall     nvm_cmd \n"    /* load command */
   "spm               \n"    /* erase page */
   "ldi  r24, %[CMDB] \n"    /* load argument for Flash write */
   "rcall     nvm_cmd \n"    /* load command */
   "ldi  r27, %[PSHI] \n"    /* load page size (512 == 0x0200) */
   "ldi  r26, %[PSLO] \n"    /* word sized */
   "ldi  r25,    0x01 \n"    /* known 0x01 for RAMPZ / Software Reset; r25 clobbered by nvm_cmd */
   "ota_readWrite:    \n"    /* inter-page loop */
   "out %[RMPZ],  r25 \n"    /* set RAMPZ (64k ORI the r31) */
   "elpm     r0,   Z+ \n"    /* load Flash from 64k+ */
   "elpm     r1,   Z+ \n"    /* plus not needed, but it's consistent this way */
   "sbiw r30,    0x02 \n"    /* doesn't matter anyway */
   "out %[RMPZ],   r1 \n"    /* clear RAMPZ (64k ANDI the r31) */
   "spm               \n"    /* Program FLASH with r0 and r1  */
   "adiw r30,    0x02 \n"    /* increment Z again */
   "sbiw r26,    0x02 \n"    /* subtract inter-page counter */
   "brne ota_readWrite\n"    /* non zero? jump back */
   "cpi  r31,    0x00 \n"    /* if Z is 0x00xx, we're done */
   "brne    ota_erase \n"    /* otherwise we must continue with the next page */
   "sts %[SWRS], r25  \n"    /* Force a software reset */
   "rjmp .-2          \n"    /* we've changed the Program, a ret will be BAAAAAD */
   ::
   [PSHI]  "I" (MAPPED_PROGMEM_PAGE_SIZE >> 8),     /* Page Size High Byte */
   [PSLO]  "I" (MAPPED_PROGMEM_PAGE_SIZE & 0xFF),   /* Page Size Low Byte */
   [CMDA]  "I" (NVMCTRL_CMD_FLPER_gc),         /* one page erase */
   [CMDB]  "I" (NVMCTRL_CMD_FLWR_gc),          /* Flash Write */
   [RMPZ]  "n" (_SFR_MEM_ADDR(RAMPZ)),
   [SWRS]  "n" (_SFR_MEM_ADDR(RSTCTRL.SWRR))
   : "r24", "r25", "r26", "r27", "r30", "r31");  /*  */
}  

EDIT: forgot about r25 clobber by nvm_cmd, repositioned ldi r25, 0x01
EDIT2: I forgot that the in/out insn go up to 0x3F (confused with the I/O bit insn that go only to 0x1F) so saved another 2 words)

[Floessie]

@MX682X At first I thought, this was not what I was looking for. But the more I think about it, the more I like it. An AVR128Dx or AVR64Dx has plenty of space. (Somewhere I read that we can't use the space above 64k for code currently anyway. Don't know if this still holds true or if I'm mistaken.)

So yes, this sounds like a cool idea and it would be nice if it was realized one day. 👍

[MX682X]

I could provide you with a zip, containing the bootloader and a batch file to automatically build it (requires DxCore installed) and upload it (including setting fuses) through curiosity nano. I have one ready for another project, but probably not with the correct DEFINES, so either I'll just post it and you adjust it, or you provide me with the board settings you need and I'll adjust it.
Settings needed:
LED during flashing, LED flashes during startup, WDT Timeout bootloader, and anything that has "Bootloader burn required" in the board settings.