diff --git a/spinn_front_end_common/interface/interface_functions/machine_bit_field_router_compressor.py b/spinn_front_end_common/interface/interface_functions/machine_bit_field_router_compressor.py
index 44f17ade08..a01ea5a29c 100644
--- a/spinn_front_end_common/interface/interface_functions/machine_bit_field_router_compressor.py
+++ b/spinn_front_end_common/interface/interface_functions/machine_bit_field_router_compressor.py
@@ -475,8 +475,8 @@ def _load_usable_sdram(
                 matrix_addresses_and_size)
 
         # write sdram
-        transceiver.write_memory(
-            chip_x, chip_y, sdram_address, address_data, len(address_data))
+        transceiver.write_memory(chip_x, chip_y, sdram_address, address_data,
+                                 n_bytes=len(address_data))
 
         # get the only processor on the chip
         processor_id = list(cores.all_core_subsets.get_core_subset_for_chip(
@@ -547,8 +547,8 @@ def _load_address_data(
                 matrix_addresses_and_size, len(address_data))
 
         # write sdram
-        transceiver.write_memory(
-            chip_x, chip_y, sdram_address, address_data, len(address_data))
+        transceiver.write_memory(chip_x, chip_y, sdram_address, address_data,
+                                 n_bytes=len(address_data))
 
         # get the only processor on the chip
         sorter_cores = cores.get_cores_for_binary(
diff --git a/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py b/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py
index 06115a4bcf..f6b7888eb8 100644
--- a/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py
+++ b/unittests/interface/interface_functions/test_front_end_common_dsg_region_reloader.py
@@ -113,9 +113,8 @@ def __init__(self):
         self._regions_rewritten = list()
 
     @overrides(MockableTransceiver.write_memory)
-    def write_memory(
-            self, x, y, base_address, data, *, n_bytes=None, offset=0,
-            cpu=0, is_filename=False, get_sum=False):
+    def write_memory(self, x, y, base_address, data, *, n_bytes=None,
+                     offset=0, cpu=0, get_sum=False):
         self._regions_rewritten.append((base_address, data))
 
 
diff --git a/unittests/interface/interface_functions/test_load_data_specification.py b/unittests/interface/interface_functions/test_load_data_specification.py
index b72f9a2e74..fe3dc3578f 100644
--- a/unittests/interface/interface_functions/test_load_data_specification.py
+++ b/unittests/interface/interface_functions/test_load_data_specification.py
@@ -56,9 +56,8 @@ def malloc_sdram(self,  x, y, size, app_id, tag=None):
         return address
 
     @overrides(Version5Transceiver.write_memory)
-    def write_memory(
-            self, x, y, base_address, data, *, n_bytes=None, offset=0,
-            cpu=0, is_filename=False, get_sum=False):
+    def write_memory(self, x, y, base_address, data, *, n_bytes=None,
+                     offset=0, cpu=0, get_sum=False):
         if isinstance(data, int):
             data = struct.pack("<I", data)
         self._regions_written.append((base_address, data))