Update components_hierarchy.rst

| ``out UInt(7 bits)`` defined in previous line
SpinalHDL · Jul 20, 2024 · 80eaafb · 80eaafb
1 parent e23c9b3
commit 80eaafb
Showing 1 changed file with 0 additions and 1 deletion.
diff --git a/source/SpinalHDL/Structuring/components_hierarchy.rst b/source/SpinalHDL/Structuring/components_hierarchy.rst
@@ -66,7 +66,6 @@ The syntax to define inputs and outputs is as follows:
      - Bits/UInt/SInt
    * - | ``in(T)``
        | ``out(T)``
-       | ``out UInt(7 bits)``
      - For all other data types, you may have to add some brackets around it. Sorry, this is a Scala limitation.
      - T
    * - | ``master(T)``