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ARG VARIANT=ubuntu-22.04 | ||
FROM mcr.microsoft.com/vscode/devcontainers/base:${VARIANT} | ||
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ENV DEBIAN_FRONTEND=noninteractive | ||
ENV PDK_ROOT=~/ttsetup/pdk | ||
ENV PDK=sky130A | ||
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RUN apt update | ||
RUN apt install -y iverilog python3 python3-pip python3-venv python3-tk python-is-python3 libcairo2 verilator | ||
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# Clone tt-support-tools | ||
RUN mkdir -p /ttsetup | ||
RUN git clone -b tt09 https://github.com/TinyTapeout/tt-support-tools /ttsetup/tt-support-tools | ||
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COPY test/requirements.txt /ttsetup/test_requirements.txt | ||
COPY .devcontainer/copy_tt_support_tools.sh /ttsetup | ||
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RUN pip3 install -r /ttsetup/test_requirements.txt -r /ttsetup/tt-support-tools/requirements.txt | ||
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# Install verible (for formatting) | ||
RUN umask 022 && \ | ||
curl -L https://github.com/chipsalliance/verible/releases/download/v0.0-3795-gf4d72375/verible-v0.0-3795-gf4d72375-linux-static-x86_64.tar.gz | \ | ||
tar zxf - -C /usr/local --strip-components=1 && \ | ||
chmod 755 /usr/local/bin | ||
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# Install openlane | ||
RUN pip3 install openlane==2.1.5 |
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#! /bin/sh | ||
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if [ ! -L tt ]; then | ||
cp -R /ttsetup/tt-support-tools tt | ||
cd tt && git pull && cd .. | ||
fi |
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// For format details, see https://aka.ms/devcontainer.json. For config options, see the README at: | ||
// https://github.com/microsoft/vscode-dev-containers/tree/v0.183.0/containers/ubuntu | ||
{ | ||
"name": "Tiny Tapeout Dev Container", | ||
"build": { | ||
"dockerfile": "Dockerfile", | ||
"context": ".." | ||
}, | ||
"customizations": { | ||
"vscode": { | ||
"settings": { | ||
"terminal.integrated.defaultProfile.linux": "bash" | ||
}, | ||
"extensions": ["mshr-h.veriloghdl"] | ||
} | ||
}, | ||
"features": { | ||
"ghcr.io/devcontainers/features/docker-in-docker:2": { | ||
"moby": true, | ||
"azureDnsAutoDetection": true, | ||
"version": "latest", | ||
"dockerDashComposeVersion": "none" | ||
} | ||
}, | ||
"postStartCommand": "/ttsetup/copy_tt_support_tools.sh" | ||
} |
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.DS_Store | ||
.idea | ||
.vscode | ||
*.vcd | ||
runs | ||
tt_submission | ||
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{ | ||
"recommendations": [ | ||
"mshr-h.veriloghdl" | ||
] | ||
} |
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{ | ||
"verilog.linting.linter": "verilator", | ||
"verilog.formatting.verilogHDL.formatter": "verible-verilog-format" | ||
} |