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msp430-binutils-2.21.1-20110716.patch
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msp430-binutils-2.21.1-20110716.patch
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Copyright 2000-2011 Free Software Foundation, Inc.
The material in this patch is a derivative work of the binutils package,
and is subject to licensing and copyright of its parent package.
This patch adds/enhances support for the Texas Instruments MSP430 family of
microcontrollers to GNU binutils. The material incorporated is maintained
in a git repository hosted at:
git://mspgcc.git.sourceforge.net/gitroot/mspgcc/binutils
This patch incorporates changes between:
upstream/release/binutils-2.21.1 (e632af4ce2bbd0b7192febdf8140c89a356b16ac)
and
uniarch/release/binutils-2.21.1 (8b3b41a69905eeab5e723129f5fd7e5761f28309)
To build, obtain the upstream release distribution from:
ftp://ftp.gnu.org/pub/gnu/binutils/binutils-2.21.1.tar.bz2
Unpack the distribution, apply the patch, and build. (Note: The example
commands are in Bourne-shell syntax.)
tar xjf binutils-2.21.1.tar.bz2
( cd binutils-2.21.1 ; patch -p1 < ../msp430-binutils-2.21.1-20110716.patch )
mkdir -p BUILD/binutils
cd BUILD/binutils
../../binutils-2.21.1/configure \
--target=msp430 \
--prefix=/usr/local/msp430 \
2>&1 | tee co
make 2>&1 | tee mo
make install 2>&1 | tee moi
For support please use the mspgcc-users mailing list. You can subscribe at
https://lists.sourceforge.net/lists/listinfo/mspgcc-users. Once subscribed,
you can post by email to mspgcc-users@lists.sourceforge.net. To report
bugs, please file a tracker ticket on SourceForge at
https://sourceforge.net/tracker/?group_id=42303&atid=432701
Patch file generated: 2011-07-16T13:17:17-05:00
Log of relevant changes:
dea9a0d [2011-02-10 23:44:12 +0000] Revert 2010-11-02 H.J. Lu.
d67e991 [2011-06-12 11:09:24 -0500] SF 3315471 remove _init_section__ function
674669c [2011-05-07 11:43:29 -0500] SF 3293911 gas 2.21 segfault when building gcc 4.4.5
04e54de [2011-04-21 10:02:40 -0500] Avoid complaints in relocatable links
3d4651b [2011-04-18 16:42:26 -0500] SF 3289064 uniarch binutils missing far section support
61941d8 [2011-04-13 19:06:23 -0500] SF 3286248 broken #hlo calculation for small constants
4ecb659 [2011-04-10 21:39:34 -0500] SF 3237855: clean up -mmcu documentation
492b386 [2011-04-02 09:11:34 -0500] SF 3266079: binutils link does not preserve cpu architecture
0cf6f04 [2011-04-02 09:09:52 -0500] Clone genelf.em prior to msp430-specific mods
88c78f9 [2011-03-22 09:55:52 -0500] Store architecture, not CPU, in elf flags field
8b0914d [2011-03-14 12:55:23 -0500] Clean up section management.
0967a41 [2011-03-12 11:19:17 -0600] SF 3207853: bad constant extraction on 64-bit systems
e76d094 [2011-03-12 09:55:14 -0600] SF 3207853: validate llo/lhi/hlo/hhi
bd6984f [2011-03-12 09:28:50 -0600] Update to match current output (whitespace variations only)
4f48d67 [2011-03-02 18:24:57 -0600] SF 3197755: long long type not working
9ee0da1 [2011-02-20 14:44:58 -0600] Eliminate warning that breaks gcc test infrastructure
68710d7 [2011-02-10 17:01:58 -0600] SF 3177314: undefined reference with too many template parameters
3c372b3 [2011-02-07 10:49:43 -0600] Parse cpu/mpy directives in assembly code
dbbc6f6 [2011-02-07 09:06:23 -0600] Regenerate
5877af8 [2011-02-07 09:03:21 -0600] Remove hard-coded MCU-specific information from msp430 port.
5083be6 [2011-02-05 21:37:53 -0600] Correct vector start for ISA_24 chips
1ce656f [2011-02-05 13:56:25 -0600] Regenerate
f07e5a2 [2011-02-05 13:56:08 -0600] Add MCUs supported by msp430all.sh
f4dc7c0 [2011-02-05 13:31:09 -0600] Regenerate
5dfc571 [2011-02-05 13:29:08 -0600] Update to match MCUs in msp430all.sh
bea8d7b [2011-01-26 11:53:58 -0600] SF 3154622: Correct support for MSP430F2132
4674f3a [2011-01-26 11:12:49 -0600] SF 3146404: Support for msp430f550x chips
c8aacc6 [2011-01-21 16:01:15 +0200] Add support for msp430f471x3
e845ac1 [2010-11-14 10:07:12 -0600] SF 3109143: Support value-line MSP430G22x1 devices
3909fd6 [2010-11-06 14:31:43 -0500] SF 3096352: Illegal disassembly instruction (addx.a R14,R15)
e291e09 [2010-08-29 13:11:44 -0500] SF 3055519: add support for 55xx chips
a0f3a60 [2010-05-27 12:22:04 -0500] Replace undefined cc430x5123 with missing cc430x5133
aeec5cc [2010-05-27 11:32:07 -0500] Fix info/bsl locations on newer chips
70aa46c [2011-01-02 10:53:49 -0600] Apply binutils-2.20.patch from revision aac9a66b of mspgcc4 repository.
diff --git binutils-2.21.1.orig/bfd/archures.c binutils-2.21.1/bfd/archures.c
index 1867154..9ad71ab 100644
--- binutils-2.21.1.orig/bfd/archures.c
+++ binutils-2.21.1/bfd/archures.c
@@ -398,21 +398,8 @@ DESCRIPTION
. bfd_arch_xstormy16,
.#define bfd_mach_xstormy16 1
. bfd_arch_msp430, {* Texas Instruments MSP430 architecture. *}
-.#define bfd_mach_msp11 11
-.#define bfd_mach_msp110 110
-.#define bfd_mach_msp12 12
-.#define bfd_mach_msp13 13
-.#define bfd_mach_msp14 14
-.#define bfd_mach_msp15 15
-.#define bfd_mach_msp16 16
-.#define bfd_mach_msp21 21
-.#define bfd_mach_msp31 31
-.#define bfd_mach_msp32 32
-.#define bfd_mach_msp33 33
-.#define bfd_mach_msp41 41
-.#define bfd_mach_msp42 42
-.#define bfd_mach_msp43 43
-.#define bfd_mach_msp44 44
+.#define bfd_mach_msp430 430
+.#define bfd_mach_msp430x 431
. bfd_arch_xc16x, {* Infineon's XC16X Series. *}
.#define bfd_mach_xc16x 1
.#define bfd_mach_xc16xl 2
diff --git binutils-2.21.1.orig/bfd/bfd-in2.h binutils-2.21.1/bfd/bfd-in2.h
index 59b1b8f..4179b93 100644
--- binutils-2.21.1.orig/bfd/bfd-in2.h
+++ binutils-2.21.1/bfd/bfd-in2.h
@@ -2085,21 +2085,8 @@ enum bfd_architecture
bfd_arch_xstormy16,
#define bfd_mach_xstormy16 1
bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */
-#define bfd_mach_msp11 11
-#define bfd_mach_msp110 110
-#define bfd_mach_msp12 12
-#define bfd_mach_msp13 13
-#define bfd_mach_msp14 14
-#define bfd_mach_msp15 15
-#define bfd_mach_msp16 16
-#define bfd_mach_msp21 21
-#define bfd_mach_msp31 31
-#define bfd_mach_msp32 32
-#define bfd_mach_msp33 33
-#define bfd_mach_msp41 41
-#define bfd_mach_msp42 42
-#define bfd_mach_msp43 43
-#define bfd_mach_msp44 44
+#define bfd_mach_msp430 430
+#define bfd_mach_msp430x 431
bfd_arch_xc16x, /* Infineon's XC16X Series. */
#define bfd_mach_xc16x 1
#define bfd_mach_xc16xl 2
@@ -4561,6 +4548,25 @@ This is the 5 bits of a value. */
BFD_RELOC_MSP430_16_BYTE,
BFD_RELOC_MSP430_2X_PCREL,
BFD_RELOC_MSP430_RL_PCREL,
+ BFD_RELOC_MSP430X_SRC_BYTE,
+ BFD_RELOC_MSP430X_SRC,
+ BFD_RELOC_MSP430X_DST_BYTE,
+ BFD_RELOC_MSP430X_DST,
+ BFD_RELOC_MSP430X_DST_2ND_BYTE,
+ BFD_RELOC_MSP430X_DST_2ND,
+ BFD_RELOC_MSP430X_PCREL_SRC_BYTE,
+ BFD_RELOC_MSP430X_PCREL_SRC,
+ BFD_RELOC_MSP430X_PCREL_DST_BYTE,
+ BFD_RELOC_MSP430X_PCREL_DST,
+ BFD_RELOC_MSP430X_PCREL_DST_2ND,
+ BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE,
+ BFD_RELOC_MSP430X_S_BYTE,
+ BFD_RELOC_MSP430X_S,
+ BFD_RELOC_MSP430X_D_BYTE,
+ BFD_RELOC_MSP430X_D,
+ BFD_RELOC_MSP430X_PCREL_D,
+ BFD_RELOC_MSP430X_INDXD,
+ BFD_RELOC_MSP430X_PCREL_INDXD,
/* IQ2000 Relocations. */
BFD_RELOC_IQ2000_OFFSET_16,
diff --git binutils-2.21.1.orig/bfd/cpu-msp430.c binutils-2.21.1/bfd/cpu-msp430.c
index 63c301a..9e9fcdd 100644
--- binutils-2.21.1.orig/bfd/cpu-msp430.c
+++ binutils-2.21.1/bfd/cpu-msp430.c
@@ -23,86 +23,14 @@
#include "bfd.h"
#include "libbfd.h"
-static const bfd_arch_info_type *compatible
- PARAMS ((const bfd_arch_info_type *, const bfd_arch_info_type *));
-
-#define N(addr_bits, machine, print, default, next) \
-{ \
- 16, /* 16 bits in a word. */ \
- addr_bits, /* Bits in an address. */ \
- 8, /* 8 bits in a byte. */ \
- bfd_arch_msp430, \
- machine, /* Machine number. */ \
- "msp430", /* Architecture name. */ \
- print, /* Printable name. */ \
- 1, /* Section align power. */ \
- default, /* The default machine. */ \
- compatible, \
- bfd_default_scan, \
- next \
-}
-
-static const bfd_arch_info_type arch_info_struct[] =
-{
- /* msp430x11x. */
- N (16, bfd_mach_msp11, "msp:11", FALSE, & arch_info_struct[1]),
-
- /* msp430x11x1. */
- N (16, bfd_mach_msp110, "msp:110", FALSE, & arch_info_struct[2]),
-
- /* msp430x12x. */
- N (16, bfd_mach_msp12, "msp:12", FALSE, & arch_info_struct[3]),
-
- /* msp430x13x. */
- N (16, bfd_mach_msp13, "msp:13", FALSE, & arch_info_struct[4]),
-
- /* msp430x14x. */
- N (16, bfd_mach_msp14, "msp:14", FALSE, & arch_info_struct[5]),
-
- /* msp430x15x. */
- N (16, bfd_mach_msp15, "msp:15", FALSE, & arch_info_struct[6]),
-
- /* msp430x16x. */
- N (16, bfd_mach_msp16, "msp:16", FALSE, & arch_info_struct[7]),
-
- /* msp430x21x. */
- N (16, bfd_mach_msp21, "msp:21", FALSE, & arch_info_struct[8]),
-
- /* msp430x31x. */
- N (16, bfd_mach_msp31, "msp:31", FALSE, & arch_info_struct[9]),
-
- /* msp430x32x. */
- N (16, bfd_mach_msp32, "msp:32", FALSE, & arch_info_struct[10]),
-
- /* msp430x33x. */
- N (16, bfd_mach_msp33, "msp:33", FALSE, & arch_info_struct[11]),
-
- /* msp430x41x. */
- N (16, bfd_mach_msp41, "msp:41", FALSE, & arch_info_struct[12]),
-
- /* msp430x42x. */
- N (16, bfd_mach_msp42, "msp:42", FALSE, & arch_info_struct[13]),
-
- /* msp430x43x. */
- N (16, bfd_mach_msp43, "msp:43", FALSE, & arch_info_struct[14]),
-
- /* msp430x44x. */
- N (16, bfd_mach_msp43, "msp:44", FALSE, NULL)
-};
-
-const bfd_arch_info_type bfd_msp430_arch =
- N (16, bfd_mach_msp14, "msp:14", TRUE, & arch_info_struct[0]);
-
/* This routine is provided two arch_infos and works out which MSP
machine which would be compatible with both and returns a pointer
- to its info structure. */
-
+ to its info structure. */
static const bfd_arch_info_type *
-compatible (a,b)
- const bfd_arch_info_type * a;
- const bfd_arch_info_type * b;
+compatible (const bfd_arch_info_type *a,
+ const bfd_arch_info_type *b)
{
- /* If a & b are for different architectures we can do nothing. */
+ /* If a & b are for different architectures we can do nothing */
if (a->arch != b->arch)
return NULL;
@@ -111,3 +39,35 @@ compatible (a,b)
return a;
}
+
+/* Architecture for MSP430X and MSP430XV2 */
+static const bfd_arch_info_type bfd_msp430x_arch = {
+ 16, /* 16 bits in a word */
+ 20, /* 20 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_msp430,
+ bfd_mach_msp430x, /* Machine number */
+ "msp430", /* Architecture name. */
+ "msp430:430X", /* Printable name */
+ 1, /* Section align power */
+ FALSE, /* The default machine */
+ compatible,
+ bfd_default_scan,
+ 0
+};
+
+/* Architecture for MSP430 */
+const bfd_arch_info_type bfd_msp430_arch = {
+ 16, /* 16 bits in a word */
+ 16, /* 16 bits in an address */
+ 8, /* 8 bits in a byte */
+ bfd_arch_msp430,
+ bfd_mach_msp430, /* Machine number */
+ "msp430", /* Architecture name */
+ "msp430:430", /* Printable name */
+ 1, /* Section align power */
+ TRUE, /* The default machine */
+ compatible,
+ bfd_default_scan,
+ &bfd_msp430x_arch
+};
diff --git binutils-2.21.1.orig/bfd/elf32-msp430.c binutils-2.21.1/bfd/elf32-msp430.c
index 9a5fb2a..a2fc8c1 100644
--- binutils-2.21.1.orig/bfd/elf32-msp430.c
+++ binutils-2.21.1/bfd/elf32-msp430.c
@@ -90,7 +90,7 @@ static reloc_howto_type elf_msp430_howto_table[] =
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
- /* A 16 bit absolute relocation for command address. */
+ /* A 16 bit PC relative relocation for command address. */
HOWTO (R_MSP430_16_PCREL, /* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
@@ -120,7 +120,7 @@ static reloc_howto_type elf_msp430_howto_table[] =
0xffff, /* dst_mask */
FALSE), /* pcrel_offset */
- /* A 16 bit absolute relocation for command address. */
+ /* A 16 bit PC relative relocation, byte operations. */
HOWTO (R_MSP430_16_PCREL_BYTE,/* type */
1, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
@@ -163,7 +163,292 @@ static reloc_howto_type elf_msp430_howto_table[] =
FALSE, /* partial_inplace */
0, /* src_mask */
0xffff, /* dst_mask */
- TRUE) /* pcrel_offset */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x absolute src operand relocation, byte operations */
+ HOWTO (R_MSP430X_SRC_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_SRC_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffff, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x absolute src operand relocation */
+ HOWTO (R_MSP430X_SRC, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_SRC", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffff, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x absolute dst operand relocation, src is register mode, byte operations */
+ HOWTO (R_MSP430X_DST_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_DST_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x absolute dst operand relocation, src is register mode */
+ HOWTO (R_MSP430X_DST, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_DST", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x absolute dst operand relocation, byte operations */
+ HOWTO (R_MSP430X_DST_2ND_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_DST_2ND_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x absolute dst operand relocation */
+ HOWTO (R_MSP430X_DST_2ND, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_DST_2ND", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x PC relative src operand relocation, byte operations */
+ HOWTO (R_MSP430X_PCREL_SRC_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_SRC_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffff, /* src_mask */
+ 0, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x PC relative src operand relocation */
+ HOWTO (R_MSP430X_PCREL_SRC, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_SRC", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffff, /* src_mask */
+ 0, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x PC relative dst operand relocation, src is register mode, byte operations */
+ HOWTO (R_MSP430X_PCREL_DST_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_DST_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x PC relative dst operand relocation, src is register mode */
+ HOWTO (R_MSP430X_PCREL_DST, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_DST", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x PC relative dst operand relocation, byte operations */
+ HOWTO (R_MSP430X_PCREL_DST_2ND_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_DST_2ND_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x PC relative dst operand relocation */
+ HOWTO (R_MSP430X_PCREL_DST_2ND, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_DST_2ND", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 20 bit msp430x address instructions immediate src operand relocation */
+ HOWTO (R_MSP430X_S_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_S_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffff, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x address instructions absolute src operand relocation */
+ HOWTO (R_MSP430X_S, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_S", /* name */
+ FALSE, /* partial_inplace */
+ 0xfffff, /* src_mask */
+ 0, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x address instructions immediate dst operand relocation */
+ HOWTO (R_MSP430X_D_BYTE, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_D_BYTE", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x address instructions absolute dst operand relocation */
+ HOWTO (R_MSP430X_D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
+
+ /* A 20 bit msp430x address instructions absolute dst operand relocation */
+ HOWTO (R_MSP430X_PCREL_D, /* type */
+ 0, /* rightshift */
+ 2, /* size (0 = byte, 1 = short, 2 = long) */
+ 20, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_D", /* name */
+ FALSE, /* partial_inplace */
+ 0, /* src_mask */
+ 0xfffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 16 bit msp430x relocation *** for msp430x calla 16-bit PC-relative index ***/
+ HOWTO (R_MSP430X_PCREL_INDXD, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ TRUE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_PCREL_INDXD", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ TRUE), /* pcrel_offset */
+
+ /* A 16 bit msp430x relocation *** for msp430x bra/calla 16-bit index ***/
+ HOWTO (R_MSP430X_INDXD, /* type */
+ 0, /* rightshift */
+ 1, /* size (0 = byte, 1 = short, 2 = long) */
+ 16, /* bitsize */
+ FALSE, /* pc_relative */
+ 0, /* bitpos */
+ complain_overflow_dont,/* complain_on_overflow */
+ bfd_elf_generic_reloc, /* special_function */
+ "R_MSP430X_INDXD", /* name */
+ FALSE, /* partial_inplace */
+ 0xffff, /* src_mask */
+ 0xffff, /* dst_mask */
+ FALSE), /* pcrel_offset */
};
/* Map BFD reloc types to MSP430 ELF reloc types. */
@@ -185,7 +470,29 @@ static const struct msp430_reloc_map msp430_reloc_map[] =
{BFD_RELOC_MSP430_16_PCREL_BYTE, R_MSP430_16_PCREL_BYTE},
{BFD_RELOC_MSP430_16_BYTE, R_MSP430_16_BYTE},
{BFD_RELOC_MSP430_2X_PCREL, R_MSP430_2X_PCREL},
- {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL}
+ {BFD_RELOC_MSP430_RL_PCREL, R_MSP430_RL_PCREL},
+
+ {BFD_RELOC_MSP430X_SRC_BYTE, R_MSP430X_SRC_BYTE},
+ {BFD_RELOC_MSP430X_SRC, R_MSP430X_SRC},
+ {BFD_RELOC_MSP430X_DST_BYTE, R_MSP430X_DST_BYTE},
+ {BFD_RELOC_MSP430X_DST, R_MSP430X_DST},
+ {BFD_RELOC_MSP430X_DST_2ND_BYTE, R_MSP430X_DST_2ND_BYTE},
+ {BFD_RELOC_MSP430X_DST_2ND, R_MSP430X_DST_2ND},
+
+ {BFD_RELOC_MSP430X_PCREL_SRC_BYTE, R_MSP430X_PCREL_SRC_BYTE},
+ {BFD_RELOC_MSP430X_PCREL_SRC, R_MSP430X_PCREL_SRC},
+ {BFD_RELOC_MSP430X_PCREL_DST_BYTE, R_MSP430X_PCREL_DST_BYTE},
+ {BFD_RELOC_MSP430X_PCREL_DST, R_MSP430X_PCREL_DST},
+ {BFD_RELOC_MSP430X_PCREL_DST_2ND_BYTE, R_MSP430X_PCREL_DST_2ND_BYTE},
+ {BFD_RELOC_MSP430X_PCREL_DST_2ND, R_MSP430X_PCREL_DST_2ND},
+
+ {BFD_RELOC_MSP430X_S_BYTE, R_MSP430X_S_BYTE},
+ {BFD_RELOC_MSP430X_S, R_MSP430X_S},
+ {BFD_RELOC_MSP430X_D_BYTE, R_MSP430X_D_BYTE},
+ {BFD_RELOC_MSP430X_D, R_MSP430X_D},
+ {BFD_RELOC_MSP430X_PCREL_D, R_MSP430X_PCREL_D},
+ {BFD_RELOC_MSP430X_INDXD, R_MSP430X_INDXD},
+ {BFD_RELOC_MSP430X_PCREL_INDXD, R_MSP430X_PCREL_INDXD},
};
static reloc_howto_type *
@@ -207,10 +514,7 @@ bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
{
unsigned int i;
- for (i = 0;
- i < (sizeof (elf_msp430_howto_table)
- / sizeof (elf_msp430_howto_table[0]));
- i++)
+ for (i = 0; i < ARRAY_SIZE (elf_msp430_howto_table); i++)
if (elf_msp430_howto_table[i].name != NULL
&& strcasecmp (elf_msp430_howto_table[i].name, r_name) == 0)
return &elf_msp430_howto_table[i];
@@ -282,18 +586,44 @@ msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
{
bfd_reloc_status_type r = bfd_reloc_ok;
bfd_vma x;
- bfd_signed_vma srel;
+ bfd_signed_vma srel = 0;
- switch (howto->type)
+ if (howto->type > R_MSP430_32 && howto->type < R_MSP430_max)
{
- case R_MSP430_10_PCREL:
contents += rel->r_offset;
srel = (bfd_signed_vma) relocation;
srel += rel->r_addend;
- srel -= rel->r_offset;
+
+ if(howto->pc_relative)
+ {
+ srel -= rel->r_offset;
+ srel -= (input_section->output_section->vma +
+ input_section->output_offset);
+ }
+
+ switch (howto->type)
+ {
+ case R_MSP430X_PCREL_D: // PC relative dst operand of calla
+ case R_MSP430X_PCREL_INDXD: // 16-bit idx in mova/bra instruction PC relative (symbolic) mode operand
+ srel -= 2; // operand located 2 bytes after opcode
+ break;
+ case R_MSP430X_PCREL_SRC: // PC-relative 20-bit address operand
+ case R_MSP430X_PCREL_SRC_BYTE:
+ case R_MSP430X_PCREL_DST:
+ case R_MSP430X_PCREL_DST_BYTE:
+ srel -= 4; // operand located 4 bytes after opcode
+ break;
+ case R_MSP430X_PCREL_DST_2ND:
+ case R_MSP430X_PCREL_DST_2ND_BYTE:
+ srel -= 6; // operand located 6 bytes after opcode
+ break;
+ }
+ }
+
+ switch (howto->type)
+ {
+ case R_MSP430_10_PCREL:
srel -= 2; /* Branch instructions add 2 to the PC... */
- srel -= (input_section->output_section->vma +
- input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
@@ -311,13 +641,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
break;
case R_MSP430_2X_PCREL:
- contents += rel->r_offset;
- srel = (bfd_signed_vma) relocation;
- srel += rel->r_addend;
- srel -= rel->r_offset;
srel -= 2; /* Branch instructions add 2 to the PC... */
- srel -= (input_section->output_section->vma +
- input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
@@ -341,13 +665,7 @@ msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
case R_MSP430_16_PCREL:
case R_MSP430_RL_PCREL:
- contents += rel->r_offset;
- srel = (bfd_signed_vma) relocation;
- srel += rel->r_addend;
- srel -= rel->r_offset;
/* Only branch instructions add 2 to the PC... */
- srel -= (input_section->output_section->vma +
- input_section->output_offset);
if (srel & 1)
return bfd_reloc_outofrange;
@@ -356,35 +674,138 @@ msp430_final_link_relocate (reloc_howto_type * howto, bfd * input_bfd,
break;
case R_MSP430_16_PCREL_BYTE:
- contents += rel->r_offset;
- srel = (bfd_signed_vma) relocation;
- srel += rel->r_addend;
- srel -= rel->r_offset;
/* Only branch instructions add 2 to the PC... */
- srel -= (input_section->output_section->vma +
- input_section->output_offset);
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
case R_MSP430_16_BYTE:
- contents += rel->r_offset;
- srel = (bfd_signed_vma) relocation;
- srel += rel->r_addend;
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
case R_MSP430_16:
- contents += rel->r_offset;
- srel = (bfd_signed_vma) relocation;
- srel += rel->r_addend;
-
if (srel & 1)
return bfd_reloc_notsupported;
bfd_put_16 (input_bfd, srel & 0xffff, contents);
break;
+ case R_MSP430X_SRC: // address operand
+ case R_MSP430X_PCREL_SRC: // PC-relative address operand
+
+ // 20 bit reloc for msp430x
+ // src in Non-register mode extended instructions,
+ // imm/abs in bra instruction
+
+ // src(19:16) located at positions 10:7 of extension word
+ // src(15:0) located just after opcode
+
+ if (srel & 1) // odd address
+ return bfd_reloc_notsupported;
+ /* and fall trough, no break here!!! */
+ case R_MSP430X_SRC_BYTE: // byte instructions or immediate operand
+ case R_MSP430X_PCREL_SRC_BYTE:
+ x = bfd_get_16 (input_bfd, contents);
+ /* 4 most-significant bits */
+ x = (x & 0xf87f) | ((srel >> 9) & 0x0780);
+ bfd_put_16 (input_bfd, x, contents);
+ /* 16 least-significant bits */
+ bfd_put_16 (input_bfd, srel & 0xffff, contents + 4);
+ break;
+
+ case R_MSP430X_DST: // address operand
+ case R_MSP430X_PCREL_DST:
+
+ // 20 bit reloc for msp430x
+ // dst in Non-register mode extended instructions,
+ // imm/abs/20-bit idx in calla instruction
+
+ // dst(19:16) located at positions 3:0 of extension word
+ // dst(15:0) located just after opcode
+
+ if (srel & 1) // odd address
+ return bfd_reloc_notsupported;
+ /* and fall trough, no break here!!! */
+ case R_MSP430X_DST_BYTE: // byte instructions or immediate operand
+ case R_MSP430X_PCREL_DST_BYTE:
+ x = bfd_get_16 (input_bfd, contents);
+ /* 4 most-significant bits */
+ x = (x & 0xfff0) | ((srel >> 16) & 0x000f);
+ bfd_put_16 (input_bfd, x, contents);
+ /* 16 least-significant bits */
+ bfd_put_16 (input_bfd, srel & 0xffff, contents + 4);
+ break;
+
+ case R_MSP430X_DST_2ND: // address operand
+ case R_MSP430X_PCREL_DST_2ND:
+
+ // 20 bit reloc for msp430x
+ // dst in Non-register mode extended instructions,
+
+ // dst(19:16) located at positions 3:0 of extension word
+ // dst(15:0) located after src(15:0)
+
+ if (srel & 1) // odd address
+ return bfd_reloc_notsupported;
+ /* and fall trough, no break here!!! */
+ case R_MSP430X_DST_2ND_BYTE: // byte instructions or immediate operand
+ case R_MSP430X_PCREL_DST_2ND_BYTE:
+ x = bfd_get_16 (input_bfd, contents);
+ /* 4 most-significant bits */
+ x = (x & 0xfff0) | ((srel >> 16) & 0x000f);
+ bfd_put_16 (input_bfd, x, contents);
+ /* 16 least-significant bits */
+ bfd_put_16 (input_bfd, srel & 0xffff, contents + 6);
+ break;
+
+ case R_MSP430X_S: // absolute src operand of address instructions
+ // 20 bit reloc for msp430x
+
+ // src(19:16) located at positions 11:8 of opcode
+ // src(15:0) located just after opcode
+
+ if (srel & 1) //odd address
+ return bfd_reloc_notsupported;
+ /* and fall trough, no break here!!! */
+ case R_MSP430X_S_BYTE: // immediate src operand of address instructions
+ x = bfd_get_16 (input_bfd, contents);
+ /* 4 most-significant bits */
+ x = (x & 0xf0ff) | ((srel >> 8) & 0x0f00);
+ bfd_put_16 (input_bfd, x, contents);
+ /* 16 least-significant bits */
+ bfd_put_16 (input_bfd, srel & 0xffff, contents + 2);
+ break;
+
+ case R_MSP430X_D: // absolute dst operand of address instructions
+ case R_MSP430X_PCREL_D: // PC relative dst operand of calla
+ // 20 bit reloc for msp430x,
+
+ // dst(19:16) located at positions 3:0 of opcode
+ // dst(15:0) located just after opcode
+
+ if (srel & 1) //odd address
+ return bfd_reloc_notsupported;
+ /* and fall trough, no break here!!! */
+ case R_MSP430X_D_BYTE: //immediate dst operand of address instructions
+
+ x = bfd_get_16 (input_bfd, contents);
+ /* 4 most-significant bits */
+ x = (x & 0xfff0) | ((srel >> 16) & 0x000f);
+ bfd_put_16 (input_bfd, x, contents);
+ /* 16 least-significant bits */
+ bfd_put_16 (input_bfd, srel & 0xffff, contents + 2);
+ break;
+
+ case R_MSP430X_PCREL_INDXD: // 16-bit idx in mova/bra instruction PC relative (symbolic) mode operand
+
+ if (srel & 1) //odd address
+ return bfd_reloc_notsupported;
+ case R_MSP430X_INDXD: // 16-bit idx in calla/mova/bra instruction
+
+ x = srel & 0xffff;
+ bfd_put_16 (input_bfd, x, contents + 2); //16 least-significant bits
+ break;
+
default:
r = _bfd_final_link_relocate (howto, input_bfd, input_section,
contents, rel->r_offset,
@@ -517,150 +938,54 @@ elf32_msp430_relocate_section (bfd * output_bfd ATTRIBUTE_UNUSED,
number. */
static void
-bfd_elf_msp430_final_write_processing (bfd * abfd,
- bfd_boolean linker ATTRIBUTE_UNUSED)
+msp430_elf_backend_final_write_processing (bfd * abfd,
+ bfd_boolean linker ATTRIBUTE_UNUSED)
{
- unsigned long val;
+ Elf_Internal_Ehdr * i_ehdrp;
+ unsigned long flags;
+ i_ehdrp = elf_elfheader (abfd);
+ i_ehdrp->e_machine = EM_MSP430;
+ flags = 0;
switch (bfd_get_mach (abfd))
{
default:
- case bfd_mach_msp110:
- val = E_MSP430_MACH_MSP430x11x1;
- break;
-
- case bfd_mach_msp11:
- val = E_MSP430_MACH_MSP430x11;
- break;
-
- case bfd_mach_msp12:
- val = E_MSP430_MACH_MSP430x12;
- break;
-
- case bfd_mach_msp13:
- val = E_MSP430_MACH_MSP430x13;
- break;
-
- case bfd_mach_msp14:
- val = E_MSP430_MACH_MSP430x14;
- break;
-
- case bfd_mach_msp15:
- val = E_MSP430_MACH_MSP430x15;
- break;
-
- case bfd_mach_msp16:
- val = E_MSP430_MACH_MSP430x16;
- break;
-
- case bfd_mach_msp31:
- val = E_MSP430_MACH_MSP430x31;
- break;
-
- case bfd_mach_msp32:
- val = E_MSP430_MACH_MSP430x32;
- break;
-
- case bfd_mach_msp33:
- val = E_MSP430_MACH_MSP430x33;
- break;
-
- case bfd_mach_msp41:
- val = E_MSP430_MACH_MSP430x41;
- break;
-
- case bfd_mach_msp42:
- val = E_MSP430_MACH_MSP430x42;
- break;
-
- case bfd_mach_msp43:
- val = E_MSP430_MACH_MSP430x43;
+ case bfd_mach_msp430:
+ flags = EF_MSP430_ARCH_430;
break;
-
- case bfd_mach_msp44:
- val = E_MSP430_MACH_MSP430x44;
+ case bfd_mach_msp430x:
+ flags = EF_MSP430_ARCH_430X;
break;
}
-
- elf_elfheader (abfd)->e_machine = EM_MSP430;
- elf_elfheader (abfd)->e_flags &= ~EF_MSP430_MACH;
- elf_elfheader (abfd)->e_flags |= val;
+ i_ehdrp->e_flags = EF_MSP430_UNIARCH | flags;
}
/* Set the right machine number. */
static bfd_boolean
-elf32_msp430_object_p (bfd * abfd)
+msp430_elf_backend_object_p (bfd * abfd ATTRIBUTE_UNUSED)
{
- int e_set = bfd_mach_msp14;
-
- if (elf_elfheader (abfd)->e_machine == EM_MSP430
- || elf_elfheader (abfd)->e_machine == EM_MSP430_OLD)
- {
- int e_mach = elf_elfheader (abfd)->e_flags & EF_MSP430_MACH;
-
- switch (e_mach)
- {
- default:
- case E_MSP430_MACH_MSP430x11:
- e_set = bfd_mach_msp11;
- break;
-
- case E_MSP430_MACH_MSP430x11x1:
- e_set = bfd_mach_msp110;
- break;
-
- case E_MSP430_MACH_MSP430x12:
- e_set = bfd_mach_msp12;
- break;
-
- case E_MSP430_MACH_MSP430x13:
- e_set = bfd_mach_msp13;
- break;
-
- case E_MSP430_MACH_MSP430x14:
- e_set = bfd_mach_msp14;