Uvm router 4x4 environment

config_sequence.sv.txt

@@ -0,0 +1,25 @@
+class config_sequence extends uvm_sequence#(packet);
+`uvm_object_utils(config_sequence)
+
+function new (string name="config_sequence");
+	super.new(name);
+	set_automatic_phase_objection(1);//uvm-1.2 only
+endfunction
+
+task body();
+      `uvm_create(req);
+      req.mode=REG_WRITE;
+      req.reg_addr=8'h20; //sa_port_csr
+      req.reg_data=8'b0000_1111;
+      start_item(req);
+      finish_item(req);
+
+      `uvm_create(req);
+      req.mode=REG_WRITE;
+      req.reg_addr=8'h22;//da_port_csr
+      req.reg_data=8'b0000_1111;
+      start_item(req);
+      finish_item(req);
+	`uvm_info("CFG_SEQ","Config Sequence : Transaction DONE",UVM_MEDIUM);
+endtask
+endclass

coverage.sv.txt

@@ -0,0 +1,43 @@
+class coverage extends uvm_subscriber#(packet);
+`uvm_component_utils(coverage)
+
+packet pkt;
+real coverage_score;
+
+   covergroup cov_mem with function sample(packet pkt) ;
+   coverpoint pkt.sa { // Source Port Coverage 
+     bins sa_0 = {0};
+     bins sa_1 = {1};
+     bins sa_2 = {2};
+     bins sa_3 = {3};
+   }
+   coverpoint pkt.da { // Destination POrt Measure coverage
+     bins da_0 = {0};
+     bins da_1 = {1};
+     bins da_2 = {2};
+     bins da_3 = {3};
+   }
+   cross pkt.sa,pkt.da;
+   endgroup
+
+function new (string name="coverage",uvm_component parent);
+super.new(name,parent);
+cov_mem=new;
+endfunction
+
+virtual function void write( T t);
+
+if (!$cast(pkt,t.clone)) begin
+    `uvm_fatal("COV","Transaction object supplied is NULL in coverage component");
+end
+
+cov_mem.sample(pkt);
+coverage_score=cov_mem.get_coverage();
+`uvm_info("COV",$sformatf("Coverage=%0f ",coverage_score),UVM_NONE);
+endfunction
+
+virtual function void extract_phase(uvm_phase phase);
+uvm_config_db#(real)::set(null,"uvm_test_top.env","cov_score",coverage_score);
+endfunction
+
+endclass

driver.sv.txt

@@ -0,0 +1,99 @@
+class driver extends uvm_driver#(packet);
+`uvm_component_utils(driver)
+bit [31:0] pkt_id;
+virtual router_if.tb vif;
+
+function new (string name="driver",uvm_component parent);
+	super.new(name,parent);
+endfunction
+
+extern virtual task run_phase(uvm_phase phase);
+extern virtual function void build_phase(uvm_phase phase);
+extern virtual task drive(ref packet pkt);
+extern virtual task drive_pkt(input packet pkt);
+extern virtual task drive_reset(input packet pkt);
+extern virtual task drive_reg_write(input packet pkt);
+extern virtual task drive_reg_read(ref packet pkt);
+endclass
+
+task driver::run_phase(uvm_phase phase);
+forever begin
+	seq_item_port.get_next_item(req);
+	pkt_id++;
+	`uvm_info("get_pkt",$sformatf("Driver Received %0s Transaction %0d from TLM port ",req.mode.name(),pkt_id),UVM_HIGH);
+	drive(req);
+        seq_item_port.item_done();
+        `uvm_info("get_pkt",$sformatf("Driver Transaction %0d Done ",pkt_id),UVM_MEDIUM);
+end
+endtask
+
+function void driver::build_phase(uvm_phase phase);
+    super.build_phase(phase);
+	  uvm_config_db#(virtual router_if.tb)::get(get_parent(),"","drvr_if",vif);
+          assert(vif != null) else 
+          `uvm_fatal("VIF_ERR","Virtual interface in driver is NULL ");
+endfunction
+
+task driver::drive(ref packet pkt);
+    case (pkt.mode)
+	RESET     : drive_reset(pkt);
+	REG_WRITE : drive_reg_write(pkt);
+	REG_READ  : drive_reg_read(pkt);
+	default   : drive_pkt(pkt);
+    endcase
+endtask
+
+task driver::drive_reset(input packet pkt);
+`uvm_info("Reset_PKT","Applying Reset to DUT",UVM_MEDIUM);
+    vif.rst=1'b1;
+    for(bit[7:0] i=0;i<4;i++)
+	vif.cb.inp_vld[i] <= 1'b0;
+    repeat(5) @(vif.cb);
+    vif.rst=1'b0;
+
+`uvm_info("Reset_PKT","DUT is out of Reset ",UVM_MEDIUM);
+endtask
+
+task driver::drive_reg_write(input packet pkt);
+`uvm_info("Reg_Write","Register Write Operation Started ",UVM_MEDIUM);
+    @(vif.cb);
+    vif.cb.reg_wr   <= 1'b1;
+    vif.cb.reg_addr <= pkt.reg_addr;
+    vif.cb.reg_din  <= pkt.reg_data;
+    @(vif.cb);
+    vif.cb.reg_wr   <= 1'b0;
+`uvm_info("Reg_Write","Register Write Operation Ended ",UVM_MEDIUM);
+endtask
+
+task driver::drive_reg_read(ref packet pkt);
+`uvm_info("Reg_Write","Register Read Operation Started ",UVM_MEDIUM);
+    @(vif.cb);
+    vif.cb.reg_rd   <= 1'b1;
+    vif.cb.reg_addr <= pkt.reg_addr;
+    @(vif.cb);
+    @(vif.cb);
+    pkt.reg_data= vif.cb.reg_dout;
+    vif.cb.reg_rd   <= 1'b0;
+`uvm_info("Reg_Write","Register Read Operation Ended ",UVM_MEDIUM);
+endtask
+
+task driver::drive_pkt(input packet pkt);
+bit [7:0] tot_pkt[$];
+bit [31:0] length;
+length=pkt.tot_pkt.size();
+tot_pkt=pkt.tot_pkt;
+	@(vif.cb);
+`uvm_info("DRV_PKT"," Drive operation started...",UVM_FULL);
+`uvm_info("DRV_PKT",pkt.convert2string(),UVM_MEDIUM);
+vif.cb.inp_vld[pkt.sa] <= 1'b1;
+vif.cb.data_in[pkt.sa] <= tot_pkt.pop_front();//driving value of sa
+@(vif.cb);
+vif.cb.data_in[pkt.sa] <= tot_pkt.pop_front();//driving value of da
+for (bit [31:0] i=2; i < length;i++) begin
+    @(vif.cb);
+   vif.cb.data_in[pkt.sa] <= tot_pkt.pop_front();
+end
+vif.cb.inp_vld[pkt.sa] <= 1'b0;
+repeat(5) @(vif.cb);
+`uvm_info("DRV_PKT"," Drive operation Ended ...",UVM_FULL);
+endtask

duttop.sv.txt

@@ -0,0 +1,82 @@
+module duttop (
+input 	logic 		clk,
+input 	logic 		rst,
+input 	logic [7:0] in1,in2,in3,in4,
+input 	logic 		in1v,in2v,in3v,in4v,
+output 	logic [7:0]	out1,out2,out3,out4,
+output 	logic 		out1v,out2v,out3v,out4v,
+input 	logic [7:0] din,
+output  logic [7:0] dout,
+input 	logic [7:0] addr,
+input 	logic		wr,
+input   logic       rd,
+output logic  		i1wy1,i1wy2,i1wy3,i1wy4,
+output logic 		i2wy1,i2wy2,i2wy3,i2wy4,
+output logic 		i3wy1,i3wy2,i3wy3,i3wy4,
+output logic 		i4wy1,i4wy2,i4wy3,i4wy4
+);
+
+logic [7:0]	 	in1_del2,in2_del2,in3_del2,in4_del2;
+logic 			busy1,busy2,busy3,busy4;
+logic 			discy1,discy2,discy3,discy4;
+logic [ 7:0] 	sa_port_csr; 
+logic [ 7:0] 	da_port_csr; 
+logic [31:0] 	dropped_pkt_count_csr; 
+logic [31:0] 	crc_dropped_csr; 
+logic drop;
+always @(posedge clk or posedge rst)
+begin
+	if (rst) sa_port_csr <= 0; //[7:4]=FutureUse_
+								//[3:0]=SA4,SA3,SA2,SA1
+	else if (wr && addr==8'h20) sa_port_csr<=din;
+end
+always @(posedge clk or posedge rst)
+begin
+	if (rst) da_port_csr <= 0; //FutureUSE_4321
+	else if (wr && addr==8'h22) da_port_csr<=din;
+end
+always @(posedge clk or posedge rst)
+begin
+	if (rst) dropped_pkt_count_csr <= 0;//
+	else
+		begin
+			if (wr && addr==8'h40) dropped_pkt_count_csr<=din;
+			else if (drop) dropped_pkt_count_csr<=dropped_pkt_count_csr+1;
+		end
+end
+always @(posedge clk or posedge rst)
+begin
+	if (rst) crc_dropped_csr <= 0;//
+	else
+		begin
+			//pending
+		end
+end
+
+always @(posedge clk or posedge rst)
+begin
+	if (rst) dout<=0;
+	else
+	if (rd)
+	case(addr)
+	'h20 : dout <= sa_port_csr;
+	'h22 : dout <= da_port_csr;
+	'h40 : dout <= dropped_pkt_count_csr;
+	'h44 : dout <= crc_dropped_csr;
+	endcase
+end
+ichtop ICHTOP (.*,
+		.discy1_d2(discy1),
+		.discy2_d2(discy2),
+		.discy3_d2(discy3),
+		.discy4_d2(discy4)
+		);
+
+ochtop OCHTOP(.*,
+		.in1(in1_del2),
+		.in2(in2_del2),
+		.in3(in3_del2),
+		.in4(in4_del2)	
+);
+endmodule
+

environment.sv.txt

@@ -0,0 +1,68 @@
+class environment extends uvm_env;
+`uvm_component_utils(environment)
+
+bit [31:0] exp_pkt_count;
+real tot_cov_score;
+bit [31:0] m_matches,mis_matches;
+
+	master_agent  m_agent;
+	slave_agent   s_agent;
+	scoreboard scb;
+	coverage cov_comp;
+
+	function new (string name="environment",uvm_component parent=null);
+		super.new(name,parent);
+	endfunction
+
+	extern virtual function void build_phase(uvm_phase phase);
+	extern virtual function void connect_phase(uvm_phase phase);
+        extern virtual function void report_phase(uvm_phase phase);
+        extern virtual function void extract_phase(uvm_phase phase);
+
+endclass	
+
+function void environment::build_phase(uvm_phase phase);
+	super.build_phase(phase);
+	m_agent=master_agent::type_id::create("m_agent",this);
+	s_agent=slave_agent::type_id::create("s_agent",this);
+	scb=scoreboard#(packet)::type_id::create("scb",this);
+	cov_comp=coverage::type_id::create("cov_comp",this);
+endfunction
+
+function void environment::connect_phase(uvm_phase phase);
+    m_agent.ap.connect(scb.mon_in);
+    m_agent.ap.connect(cov_comp.analysis_export);
+    s_agent.ap.connect(scb.mon_out);
+endfunction
+
+function void environment::extract_phase(uvm_phase phase);
+uvm_config_db#(int)::get(this,"m_agent.seqr.*","item_count",exp_pkt_count); 
+uvm_config_db#(real)::get(this,"","cov_score",tot_cov_score);    
+uvm_config_db#(int)::get(this,"","matches",m_matches);    
+uvm_config_db#(int)::get(this,"","mis_matches",mis_matches);    
+endfunction
+
+function void environment::report_phase(uvm_phase phase);
+bit [31:0] tot_scb_cnt;
+tot_scb_cnt= m_matches + mis_matches;
+
+if(exp_pkt_count != tot_scb_cnt) begin
+  `uvm_info("","******************************************",UVM_NONE);
+  `uvm_info("FAIL","Test Failed due to packet count MIS_MATCH",UVM_NONE); 
+  `uvm_info("FAIL",$sformatf("exp_pkt_count=%0d Received_in_scb=%0d ",exp_pkt_count,tot_scb_cnt),UVM_NONE); 
+  `uvm_fatal("FAIL","******************Test FAILED ************");
+end
+else if(mis_matches != 0) begin
+  `uvm_info("","******************************************",UVM_NONE);
+  `uvm_info("FAIL","Test Failed due to mis_matched packets in scoreboard",UVM_NONE); 
+  `uvm_info("FAIL",$sformatf("matched_pkt_count=%0d mis_matched_pkt_count=%0d ",m_matches,mis_matches),UVM_NONE); 
+  `uvm_fatal("FAIL","******************Test FAILED ***************");
+end
+else begin
+  `uvm_info("PASS","******************Test PASSED ***************",UVM_NONE);
+  `uvm_info("PASS",$sformatf("exp_pkt_count=%0d Received_in_scb=%0d ",exp_pkt_count,tot_scb_cnt),UVM_NONE); 
+  `uvm_info("PASS",$sformatf("matched_pkt_count=%0d mis_matched_pkt_count=%0d ",m_matches,mis_matches),UVM_NONE); 
+  `uvm_info("PASS",$sformatf("Coverage=%0f%%",tot_cov_score),UVM_NONE); 
+  `uvm_info("","******************************************",UVM_NONE);
+  end
+endfunction

filelist.txt

@@ -0,0 +1,10 @@
+ich.sv
+ichtop.sv
++define+PRIORITY
+och.sv
+ochtop.sv
+resolver.sv
+duttop.sv
+intf.sv
+program_router.sv
+top.sv

iMonitor.sv.txt

@@ -0,0 +1,65 @@
+class iMonitor extends uvm_monitor;
+`uvm_component_utils(iMonitor)
+
+virtual router_if.tb_mon vif;
+
+// This TLM port is used to connect the monitor to the scoreboard
+uvm_analysis_port #(packet) analysis_port;
+
+// Current monitored transaction
+packet pkt;
+
+function new (string name="iMonitor",uvm_component parent);
+	super.new(name,parent);
+endfunction
+
+extern virtual task run_phase(uvm_phase phase);
+extern virtual function void build_phase(uvm_phase phase);
+extern task collect_pkt(input bit [3:0] port);
+endclass 
+
+function void iMonitor::build_phase(uvm_phase phase) ;
+	super.build_phase(phase);
+	if (!uvm_config_db#(virtual router_if.tb_mon)::get(get_parent(), "", "iMon_if", vif)) begin
+          `uvm_fatal("VIF_ERR","iMonitor DUT interface not set");
+         end
+//create TLM port
+    analysis_port=new("analysis_port",this);
+endfunction
+
+task iMonitor::run_phase(uvm_phase phase);
+    // The job of the iMonitor is to passively monitor the physical signals,
+    // interprete and report the activities that it sees.  In this case, to
+    // re-construct the packet that it sees on the DUT's input port as specified
+fork 
+  collect_pkt(0);
+  collect_pkt(1);
+  collect_pkt(2);
+  collect_pkt(3);
+join
+endtask 
+
+task iMonitor::collect_pkt(input bit [3:0] port);
+packet pkt1;
+bit [15:0] len1;
+    forever begin
+        @(vif.cb_mon.inp_vld[port]);
+        `uvm_info("iMon_PKT",$sformatf("Value change=%0d observed port %0d",vif.cb_mon.inp_vld[port],port),UVM_FULL);
+	 if (vif.cb_mon.inp_vld[port] === 1'bx || vif.cb_mon.inp_vld[port] === 1'bz || vif.cb_mon.inp_vld[port] === 1'b0) continue;
+        `uvm_info("iMon_PKT",$sformatf("Started collecting pakcet on port %0d",port),UVM_MEDIUM);
+	 pkt1 = packet::type_id::create("pkt1",this);
+	  	while(1) begin//collect packet
+	  	  pkt1.tot_pkt.push_back(vif.cb_mon.data_in[port]);
+		  if(pkt1.tot_pkt.size() == 6) len1= {pkt1.tot_pkt[2],pkt1.tot_pkt[3],pkt1.tot_pkt[4],pkt1.tot_pkt[5]};
+		  if(pkt1.tot_pkt.size() == (1+1+4+4+len1)) break;
+	   	  @(vif.cb_mon);
+        	end
+	pkt1.sa=pkt1.tot_pkt[0];	
+	pkt1.da=pkt1.tot_pkt[1];	
+        `uvm_info("iMon_PKT",pkt1.convert2string(),UVM_MEDIUM);
+	analysis_port.write(pkt1);
+        `uvm_info("iMon_PKT",$sformatf("Packet Sent to Scorboard from Port %0d",port),UVM_MEDIUM);
+     end
+
+endtask
+