Using nextpnr with new FPGA which is not supported currently

[mustafaarslan0]

Hi. I am developing a custom FPGA architecture for my thesis. I want to use nextpnr to do PnR and generate bitstream for my FPGA. But I see nextpnr-generic supports limited feature set. How can I develop nextpnr for my FPGA like others (ice40, ecp5, ..) ? Do I have to use nextpnr-generic?
Thanks.

[gatecat]

Depending on the size of the FPGA, I'd strongly recommend using Viaduct (below about 5-10k LUTs) or Himbächel.

Both of those get you access to the full power of the nextpnr C++ API for custom packing tasks, placement and routing validity constraints, etc; without anywhere near as much boilerplate code or maintenance overhead as starting from scratch. In both cases, there are several examples available as a starting point.

Any further questions, please do ask.

[mustafaarslan0]

Thank you for your answer. I want to know do I have to make changes in nextpnr source codes for this? Or do I just develop some database of my FPGA with Viaduct or Himbächel?

[gatecat]

In each case, at a very minimum you'll need to set up the uarch skeleton C++ code (the relevant minimal examples are a good reference here), and build the database either at runtime in C++ (Viaduct) or at build time in Python (Himbächel).

However, almost all FPGA architectures have constraints, like shared FF control sets; or clustering requirements, like carry chains. All of this will need specific C++ code as well.

[mustafaarslan0]

Thank you. I will investigate examples.