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For now, better ideas are those which:
- I kinda already know how to implement; or
- I can test easily enough (inc. on FPGA and other readily-available hardware); or
- I can learn from structured guides.
Examples of better ideas:
- SPI slave that shows on a VGA display how many writes it received in the last frame. Can be used to test SPI speed via RP2040 master.
- solo_squash, with optional SPI control, including other configurable parameters and maybe better graphics (e.g. RGB222).
- Proper SPI device that implements both MOSI and MISO.
- Something that interacts with an external RAM or ROM.
- UART device.
- Individual components/POCs of Raybox?
- Reciprocal approximator, but maybe pulled down from Q12.12 until it fits. Original Q6.10 (or whatever it was) didn't fit in what was then a larger tile size! Might end up having to go for something like Q7.7.
- Simple column renderer, possibly reading from an external trace buffer for a resolution of 256x128 (or even 320x128), using a 2-wire clocked address, and reading 8 bits: 6 for height, 1 for side (shade), 1 for colour. If we can squeeze in two consecutive reads per pixel, we can even get 16 bits, for 320x240: 7 bits for height, 1 for side, 3 for colour, 5 for texture column??
The following are a little harder to assess, implement, and test...
- Level shifter device, designed for vintage hardware interface.
- VGA display that uses dual QPSI chips (RAM or ROM) in order to read a full "framebuffer", e.g. 4 dedicated inputs, 4 bidi as inputs, could read RGB332... maybe at 320w?
- NES cartridge chip that can interface with an ESP8266, like my project to do it with STM32F103.
- I was going to try an 8-bit serially-addressible RAM for TT04, but I got hung up on specs and realised it might be a little clunky to use, and have only a very small amount of storage in a single tile.