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0194-2024-02-05.md

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5 Feb 2024

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Getting TT03p5 ready for demo

  • Merge PR from Pat
  • Reimplement the design on my FPGA:
    • ALL outputs inc. LZC, i.e. full wrapped TT TOP in de0nano wrapper
    • Detach RP2040 or use it for input control?
    • What to do for VGA out? Just use 270R all the way on one of my DAC PCBs?
  • Test VGA signal outputs with 270R, and current on scope
  • Test aux out and measure voltage: OK, 1.0V.
  • Test speaker and measure current (scope or DMM?)
  • Discussion of design
  • Scope screenshots, etc.
  • Photo of the running system in de0nano README
  • Advanced tests (LZC, etc)

It works as expected on the FPGA, inc. LZC signals and speaker done as line-out:

See DE0-Nano pin mapping here.

Steps:

  • I pulled the tt03p5-solo-squash repo on my main PC where I use Quartus.
  • Note that this repo hasn't been wrapped for de0nano before. The original repo (solo_squash) might've been, but tt03p5-solo-squash is a copy of the code (because at the time TT03p5 didn't support git submodules).
  • Compared solo_squash core code with tt03p5 core code. Only change is that we need to comment out timescale (in tt03p5 version) -- was necessary for newer versions of OpenLane/yosys? I'll make the change in tt03p5.
  • Copied solo_squash repo's de0nano implementation into tt03p5, and updated it to make sure:
    • It matches current passive RGB333 board.
    • SPI ROM (which is still plugged in) is held in a disabled state.
    • Pushbuttons have correct polarity and GPIO-1 mapping is known/correct.
  • Included an option to visualise the speaker on a lower bit of all colour channels.
  • Made sure the design runs as expected, inc. buttons.
  • Implemented speaker output on another pin, testing with voltage-divided 'line out' levels.
  • Checked col0 and row0 behaviour as well as LZC low bit -- working as expected.
  • NEXT: Take measurements: voltage and current, ideally via scope.

Notes:

  • DE0-Nano's GPIO-0 header is the one nearest the LEDs, while GPIO-1 is nearest the DIP switches.
  • GPIO-0 is the one for which I designed the Pi Pico bridge.
  • GPIO-1 is the one that I've typically plugged the VGA DAC and SPI ROM into.
  • vga_spi_rom's code include a diagram of GPIO-1 pin mapping.
  • NOTE: There's also the older RGB111 version of my VGA DAC board.
  • Note that I usually make one of the onboard pushbuttons into the reset line.