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adder_co.vhd
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address_logic.vhd
 
 
alu.vhd
alu.vhd
 
 
and_co.vhd
and_co.vhd
 
 
au.vhd
au.vhd
 
 
base_computer.vhd
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components.vhd
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comprator_co.vhd
 
 
controller.vhd
controller.vhd
 
 
cos_co.vhd
cos_co.vhd
 
 
cot_co.vhd
cot_co.vhd
 
 
datapath.vhd
datapath.vhd
 
 
divider_co.vhd
divider_co.vhd
 
 
flags.vhd
flags.vhd
 
 
ir.vhd
ir.vhd
 
 
left_shift_co.vhd
left_shift_co.vhd
 
 
memory.vhd
memory.vhd
 
 
multiplier_co.vhd
multiplier_co.vhd
 
 
not_co.vhd
not_co.vhd
 
 
or_co.vhd
or_co.vhd
 
 
pc.vhd
pc.vhd
 
 
port_manager.vhd
port_manager.vhd
 
 
random_generator_co.vhd
random_generator_co.vhd
 
 
register_file.vhd
register_file.vhd
 
 
right_shift_co.vhd
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sin_co.vhd
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sqrt_co.vhd
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subtractor_co.vhd
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tristate.vhd
tristate.vhd
 
 
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twos_complement_co.vhd
 
 
wp.vhd
wp.vhd
 
 
xor_co.vhd
xor_co.vhd
 
 

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SAYEH

This CPU exploits a 16-bit data-bus and also a 16-bit address-bus. Instructions used in this processor has 8 or 16-bit width. Short instructions (8-bit ones) contain shadow instructions, which effectively pack 2 such instructions (8-bit) into a single 16-bit word.

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Datapath

Controller

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SAYEH cpu-memory basic computer

Topics

cpu vhdl basic-computer sayeh vhdl-basic-cumputer basic-cumputer vhdl-controller vhdl-alu vhdl-address-logic vhdl-datapath vhdl-memory

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