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x86_64 virtio:get irqnum support for x86_64 virtio dev #97

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x86_64 virtio:get irqnum support for x86_64 virtio dev #97

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4f3c2eb
get irqnum support for x86_64 virtio dev
lklake Jul 6, 2023
2341d4f
fix CI
lklake Jul 6, 2023
9e22940
fix clippy
lklake Jul 6, 2023
cf9ac39
fix doc
lklake Jul 6, 2023
3f9683f
modify according to review
lklake Jul 11, 2023
4ece66b
fix doc
lklake Jul 11, 2023
9f3756f
fix clippy
lklake Jul 11, 2023
eeee32d
modify according to review
lklake Jul 14, 2023
3b92a0b
fix error:crate acpi need to dependent on feature alloc
lklake Jul 14, 2023
0b84984
fix ci
lklake Jul 14, 2023
54d43dd
modify according to review
lklake Jul 16, 2023
16aee82
fix doc
lklake Jul 16, 2023
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83 changes: 83 additions & 0 deletions Cargo.lock
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1 change: 1 addition & 0 deletions modules/axconfig/src/platform/pc-x86.toml
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Expand Up @@ -21,6 +21,7 @@ mmio-regions = [
["0xfec0_0000", "0x1000"], # IO APIC
["0xfed0_0000", "0x1000"], # HPET
["0xfee0_0000", "0x1000"], # Local APIC
["0xe_0000", "0x2_0000"], #ACPI
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]
# VirtIO MMIO regions with format (`base_paddr`, `size`).
virtio-mmio-regions = []
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2 changes: 2 additions & 0 deletions modules/axhal/Cargo.toml
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Expand Up @@ -50,6 +50,8 @@ x86 = "0.52"
x86_64 = "0.14"
x2apic = "0.4"
raw-cpuid = "11.0"
acpi = "4.1.1"
aml = "0.16.4"

[target.'cfg(any(target_arch = "riscv32", target_arch = "riscv64"))'.dependencies]
riscv = "0.10"
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3 changes: 2 additions & 1 deletion modules/axhal/src/arch/x86_64/mod.rs
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Expand Up @@ -2,7 +2,7 @@ mod context;
mod gdt;
mod idt;

#[cfg(target_os = "none")]
// #[cfg(target_os = "none")]
mod trap;
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use core::arch::asm;
Expand All @@ -14,6 +14,7 @@ use x86_64::instructions::interrupts;
pub use self::context::{ExtendedState, FxsaveArea, TaskContext, TrapFrame};
pub use self::gdt::GdtStruct;
pub use self::idt::IdtStruct;
pub use self::trap::{IRQ_VECTOR_END, IRQ_VECTOR_START};
pub use x86_64::structures::tss::TaskStateSegment;

/// Allows the current CPU to respond to interrupts.
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6 changes: 4 additions & 2 deletions modules/axhal/src/arch/x86_64/trap.rs
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Expand Up @@ -4,8 +4,10 @@ use super::context::TrapFrame;

core::arch::global_asm!(include_str!("trap.S"));

const IRQ_VECTOR_START: u8 = 0x20;
const IRQ_VECTOR_END: u8 = 0xff;
/// start value of irq vector
pub const IRQ_VECTOR_START: u8 = 0x20;
/// end value of irq vector
pub const IRQ_VECTOR_END: u8 = 0xff;

#[no_mangle]
fn x86_trap_handler(tf: &mut TrapFrame) {
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