ggx-15-gcc.patch

diff -r 2b98ce7f926e gcc/ChangeLog.ggx
--- a/gcc/ChangeLog.ggx	Wed Mar 19 09:06:25 2008 -0700
+++ b/gcc/ChangeLog.ggx	Wed Mar 19 11:14:45 2008 -0700
@@ -1,3 +1,7 @@ 2008-03-18  Anthony Green  <green@spinda
+2008-03-19  Anthony Green  <green@spindazzle.org>
+
+	* config/ggx/ggx.md (loadsi_offset, storesi_offset): New patterns.
+
 2008-03-18  Anthony Green  <green@spindazzle.org>
 
 	* config/ggx/ggx.md (ggx_general_movsrc_operand): Define predicate.
diff -r 2b98ce7f926e gcc/config/ggx/ggx.md
--- a/gcc/config/ggx/ggx.md	Wed Mar 19 09:06:25 2008 -0700
+++ b/gcc/config/ggx/ggx.md	Wed Mar 19 11:14:46 2008 -0700
@@ -59,9 +59,36 @@
   "
 {
   /* If this is a store, force the value into a register.  */
-  if (GET_CODE (operands[0]) == MEM)
-    operands[1] = force_reg (SImode, operands[1]);
+  if (! (reload_in_progress || reload_completed))
+  {
+    if (GET_CODE (operands[0]) == MEM)
+    {
+      operands[1] = force_reg (SImode, operands[1]);
+      if (GET_CODE (XEXP (operands[0], 0)) == MEM)
+        operands[0] = gen_rtx_MEM (SImode, force_reg (SImode, XEXP (operands[0], 0)));
+    }
+    else 
+      if (GET_CODE (operands[1]) == MEM
+          && GET_CODE (XEXP (operands[1], 0)) == MEM)
+        operands[1] = gen_rtx_MEM (SImode, force_reg (SImode, XEXP (operands[1], 0)));
+  }
 }")
+
+(define_insn "*loadsi_offset"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+ 	(mem:SI (plus:SI
+		  (match_operand:SI 1 "register_operand" "r")
+		  (match_operand:SI 2 "immediate_operand" "i"))))]
+  ""
+  "ldo.l  %0, %2(%1)")
+
+(define_insn "*storesi_offset"
+  [(set (mem:SI (plus:SI
+		  (match_operand:SI 1 "register_operand" "r")
+		  (match_operand:SI 2 "immediate_operand" "i")))
+        (match_operand:SI 0 "register_operand" "r"))]
+  ""
+  "sto.l  %2(%1), %0")
 
 (define_insn "*movsi"
   [(set (match_operand:SI 0 "general_operand" "=r,r,W,m,r,r")