Simple parallel MPU concept document. MISC array paradigm.
We have large change from before, since pagin have a memory reference speed matter, so we depend on programming language the system have.
This is almost the small enough MPU-array everyone at least once dreamed.
This is concept and only compileable document. So to use this, we must search prior patents first. At least, arm license for condition operations. And it might be bmov and bzero implementation on mpu had be patented.
These sources are not tested. And, There exists cacheline glitch on this implementation.