Changes as requested by lmbollen in PR comments #4800

Job	Run time
bittide-instances synthesis matrix generation	25s
Build dependencies	6m 21s
bittide-instances hardware-in-the-loop test matrix generation	25s
cc-sim-topologies simulation matrix generation	25s
License year check	27s
license-check	10s
Basic linting	22s
Simulate network (complete, 16, 1000000, --nodes 2 --clock-offsets [-2,2] --frame-size 1500)	2m 43s
Firmware Support Unit Tests	3m 13s
Bittide tests	2m 45s
bittide-experiments unittests	2m 47s
Host Tools Unit Tests	2m 45s
Rust Lints	2m 48s
bittide-instances doctests	2m 46s
bittide-instances unittests	2m 44s
synth (fullMeshHwCcTest, test, All)	16m 53s
Firmware Limit Checks	2m 42s
synth (fullMeshSwCcTest, test, All)	19m 57s
synth (hwCcTopologyTest, test, All)	21m 38s
synth (linkConfigurationTest, test, All)	11m 0s
synth (safeDffSynchronizer, hdl)	2m 46s
synth (vexRiscvTest, test, Specific [-1])	11m 19s
HITL (fullMeshHwCcTest, test, All)	2m 16s
HITL (fullMeshSwCcTest, test, All)	2m 35s
HITL (hwCcTopologyTest, test, All)	8m 18s
HITL (linkConfigurationTest, test, All)	2m 38s
HITL (vexRiscvTest, test, Specific [-1])	1m 15s
Generate clock control simulation report	2m 49s
All jobs finished	4s
	2h 17m 16s

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