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Add FINC/FDEC test #2466

Add FINC/FDEC test

Add FINC/FDEC test #2466

Triggered via push July 19, 2023 12:29
Status Success
Total duration 17m 27s
Artifacts 6

ci.yml

on: push
Build dependencies
1m 15s
Build dependencies
Basic linting
16s
Basic linting
elastic-buffer-sim-topologies simulation matrix generation
16s
elastic-buffer-sim-topologies simulation matrix generation
bittide-instances hardware-in-the-loop test matrix generation
14s
bittide-instances hardware-in-the-loop test matrix generation
bittide-instances synthesis matrix generation
17s
bittide-instances synthesis matrix generation
Firmware Build Examples
20s
Firmware Build Examples
license-check
11s
license-check
Firmware Lints
33s
Firmware Lints
Firmware Unit Tests
3m 35s
Firmware Unit Tests
elastic-buffer-sim unittests
2m 16s
elastic-buffer-sim unittests
Bittide tests
4m 28s
Bittide tests
bittide-instances doctests
3m 4s
bittide-instances doctests
bittide-instances unittests
3m 13s
bittide-instances unittests
Matrix: Simulate network
Matrix: bittide-instances synthesis
Firmware Limit Checks
32s
Firmware Limit Checks
Generate clock control simulation report
14s
Generate clock control simulation report
Matrix: bittide-instances hardware-in-the-loop tests
All jobs finished
2s
All jobs finished
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Artifacts

Produced during runtime
Name Size
Clock Control Simulation Report Expired
50.3 KB
_build-clockControlDemo0 Expired
13.9 MB
_build-extendedHardwareInTheLoopTest Expired
8.54 MB
_build-fincFdecTests Expired
12.1 MB
_build-simpleHardwareInTheLoopTest Expired
8.46 MB
gen-plots-hs-complete Expired
63.2 KB