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RISC-V processor framework with plugable pipelines

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Pebbles

Pebbles is a RISC-V processor framework supporting plugable pipelines. Different pipeline implementations may be connected to the same instruction set implementation by way of a common pipeline interface. Pebbles is written in Haskell, using the Blarney library.

Currently, Pebbles supports the RV32IMAxCHERI instruction set and two pipelines:

  • A 5-stage in-order scalar pipeline.

  • An 8-stage SIMT pipeline (Single Instruction Multiple Threads) with a parameterisable number of warps and warp size.

Currently, the only application of the Pebbles framework is the SIMTight GPGPU being developed on the CAPcelerate project.