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RDP The Graphics Processor
TODO: Complete documentation on the DPC registers
The RDP status register defines bits 9 and 10 as start valid and end value.
I believe 0 represents valid, and 1 represents invalid according the way the graphics ucode uses the start valid bit.
It seems that the RDP would turn on these bits when it starts reading a display list into the internal command buffer, when it finishes, they get cleared. The graphics ucode running on the RSP waits till the RDP is done reading a display list so it can start building the next display list for the RDP. No one seems to check the end valid bit maybe due to predictability.
There is a command busy flag, which is an indication flag that the RDP is currently executing a RDP command.
The RDP can signal this status: "Start GCLK", I believe this indicates when RDP profiling can be started. A RDP profilee would likely wait till the bit gets set, after the wait, it can write the begin timestamp, then when the profiled command finishes its execution, the profiler must wait on cmd busy to be cleared.