The MEEP platform enables FPGA-to-FPGA communication using Aurora Xilinx IP.
Compatible with the Alveo card U280.
It is available a Makefile to generate an IP
make generate_ip
It also have available to clean the project with:
make clean
The MEEP platform enables FPGA-to-FPGA communication using Aurora Xilinx IP.
Compatible with the Alveo card U280.
It is available a Makefile to generate an IP
make generate_ip
It also have available to clean the project with:
make clean