mulsign in pow

burrbull · Jan 24, 2024 · 6412fc2 · 6412fc2
1 parent be41a1e
commit 6412fc2
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Showing 4 changed files with 32 additions and 40 deletions.
diff --git a/src/f32/u10.rs b/src/f32/u10.rs
@@ -1011,12 +1011,14 @@ pub fn powf(x: f32, y: f32) -> f32 {
     };
     result *= if x >= 0. {
         1.
-    } else if !yisint {
-        f32::NAN
-    } else if yisodd {
-        -1.
+    } else if yisint {
+        if yisodd {
+            -1.
+        } else {
+            1.
+        }
     } else {
-        1.
+        f32::NAN
     };
 
     let efx = (fabsfk(x) - 1.).mul_sign(y);
@@ -1025,12 +1027,12 @@ pub fn powf(x: f32, y: f32) -> f32 {
     } else if x.is_nan() || y.is_nan() {
         f32::NAN
     } else if x.is_infinite() || (x == 0.) {
-        (if yisodd { x.sign() } else { 1. })
-            * (if (if x == 0. { -y } else { y }) < 0. {
-                0.
-            } else {
-                f32::INFINITY
-            })
+        (if y.is_sign_negative() ^ (x == 0.) {
+            0.
+        } else {
+            f32::INFINITY
+        })
+        .mul_sign(if yisodd { x } else { 1. })
     } else if y.is_infinite() {
         if efx < 0. {
             0.

diff --git a/src/f32x/u10.rs b/src/f32x/u10.rs
@@ -1395,15 +1395,9 @@ where
         );
 
         result = (x.is_infinite() | x.simd_eq(F32x::ZERO)).select(
-            yisodd.select(x.sign(), F32x::ONE)
-                * F32x::from_bits(
-                    !x.simd_eq(F32x::ZERO)
-                        .select(-y, y)
-                        .simd_lt(F32x::ZERO)
-                        .to_int()
-                        .cast::<u32>()
-                        & F32x::INFINITY.to_bits(),
-                ),
+            (y.is_sign_negative() ^ x.simd_eq(F32x::ZERO))
+                .select(F32x::ZERO, F32x::INFINITY)
+                .mul_sign(yisodd.select(x, F32x::ONE)),
             result,
         );
 

diff --git a/src/f64/u10.rs b/src/f64/u10.rs
@@ -1282,12 +1282,14 @@ pub fn pow(x: f64, y: f64) -> f64 {
     };
     result *= if x > 0. {
         1.
-    } else if !yisint {
-        f64::NAN
-    } else if yisodd {
-        -1.
+    } else if yisint {
+        if yisodd {
+            -1.
+        } else {
+            1.
+        }
     } else {
-        1.
+        f64::NAN
     };
 
     let efx = (fabsk(x) - 1.).mul_sign(y);
@@ -1302,12 +1304,12 @@ pub fn pow(x: f64, y: f64) -> f64 {
             f64::INFINITY
         }
     } else if x.is_infinite() || (x == 0.) {
-        (if yisodd { x.sign() } else { 1. })
-            * (if (if x == 0. { -y } else { y }) < 0. {
-                0.
-            } else {
-                f64::INFINITY
-            })
+        (if y.is_sign_negative() ^ (x == 0.) {
+            0.
+        } else {
+            f64::INFINITY
+        })
+        .mul_sign(if yisodd { x } else { 1. })
     } else if x.is_nan() || y.is_nan() {
         f64::NAN
     } else {

diff --git a/src/f64x/u10.rs b/src/f64x/u10.rs
@@ -1806,15 +1806,9 @@ where
         );
 
         result = (x.is_infinite() | x.simd_eq(F64x::ZERO)).select(
-            yisodd.select(x.sign(), F64x::ONE)
-                * F64x::from_bits(
-                    !x.simd_eq(F64x::ZERO)
-                        .select(-y, y)
-                        .simd_lt(F64x::ZERO)
-                        .to_int()
-                        .cast::<u64>()
-                        & F64x::INFINITY.to_bits(),
-                ),
+            (y.is_sign_negative() ^ x.simd_eq(F64x::ZERO))
+                .select(F64x::ZERO, F64x::INFINITY)
+                .mul_sign(yisodd.select(x, F64x::ONE)),
             result,
         );