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allow multi-master with trivial Bwd direction e.g. Signal #13
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I think either TrivialFanout
or UnitBwd
would make sense. I'm wondering whether this feature should be symmetrical: if a protocol has a trivial type on its Fwd
, would we do something similar?
However I don't particularly like this as it would be inserting logic without any obvious indication.
Fully agree.
As for the review (but @cchalmers opinion is leading of course :-)):
- I don't really like the abbreviation of
Direc
. There's no real harm in writing it out IMO. - I think it's time we add some unit tests to this project. Maybe add a test that verifies data is getting propagated correctly + bwd contains
()
? Though maybe this is mostly covered by types anyway.. - I'm wondering what kinds of errors we get if you try to duplicate a protocol that doesn't support it. Is it intelligible enough?
I considered this but it seems kind of pointless as I'm not sure when you'd really use something where there is data but it only flows backwards.
Well it replace the |
At the very least
It's not too bad:
It's kinda annoying because GHC only gives one error at a time so you have to know that |
Yeah I had originally put my examples in I have imported "Example.hs" in the test so it now is required to type-check |
This allows you to write circuits like:
When the
Bwd
direction of the port is a()
or other unit type defined byTrivialBwd
.It does so by replacing all
Bwd
expressions withunitBwd
from aTrivialBwd
typeclass (Note: we might want to change this to be calledUnitC
or something). The above is desugared into something similar to:We could imagine a more general version of this which allowed more complex circuits to be fanned out by using a typeclass:
However I don't particularly like this as it would be inserting logic without any obvious indication.