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examples/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/MX_Device.h
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/****************************************************************************** | ||
* File Name : MX_Device.h | ||
* Date : 14/03/2023 13:27:52 | ||
* Description : STM32Cube MX parameter definitions | ||
* Note : This file is generated by STM32CubeMX (DO NOT EDIT!) | ||
******************************************************************************/ | ||
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#ifndef __MX_DEVICE_H | ||
#define __MX_DEVICE_H | ||
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/*---------------------------- Clock Configuration ---------------------------*/ | ||
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#define MX_LSI_VALUE 32000 | ||
#define MX_LSE_VALUE 32768 | ||
#define MX_HSI_VALUE 16000000 | ||
#define MX_HSE_VALUE 25000000 | ||
#define MX_EXTERNAL_CLOCK_VALUE 12288000 | ||
#define MX_SYSCLKFreq_VALUE 216000000 | ||
#define MX_HCLKFreq_Value 216000000 | ||
#define MX_FCLKCortexFreq_Value 216000000 | ||
#define MX_CortexFreq_Value 216000000 | ||
#define MX_AHBFreq_Value 216000000 | ||
#define MX_APB1Freq_Value 54000000 | ||
#define MX_APB2Freq_Value 108000000 | ||
#define MX_APB1TimFreq_Value 108000000 | ||
#define MX_APB2TimFreq_Value 216000000 | ||
#define MX_EthernetFreq_Value 216000000 | ||
#define MX_CECFreq_Value 32786 | ||
#define MX_LCDTFToutputFreq_Value 96000000 | ||
#define MX_I2C1Freq_Value 54000000 | ||
#define MX_I2C2Freq_Value 54000000 | ||
#define MX_I2C3Freq_Value 54000000 | ||
#define MX_I2C4Freq_Value 54000000 | ||
#define MX_I2SFreq_Value 192000000 | ||
#define MX_SAI1Freq_Value 192000000 | ||
#define MX_SAI2Freq_Value 192000000 | ||
#define MX_SDMMCFreq_Value 216000000 | ||
#define MX_RTCFreq_Value 32000 | ||
#define MX_USART1Freq_Value 108000000 | ||
#define MX_USART2Freq_Value 54000000 | ||
#define MX_USART3Freq_Value 54000000 | ||
#define MX_UART4Freq_Value 54000000 | ||
#define MX_UART5Freq_Value 54000000 | ||
#define MX_UART8Freq_Value 54000000 | ||
#define MX_UART7Freq_Value 54000000 | ||
#define MX_USART6Freq_Value 108000000 | ||
#define MX_USBFreq_Value 48000000 | ||
#define MX_WatchDogFreq_Value 32000 | ||
#define MX_LPTIM1Freq_Value 54000000 | ||
#define MX_SPDIFRXFreq_Value 192000000 | ||
#define MX_MCO1PinFreq_Value 16000000 | ||
#define MX_MCO2PinFreq_Value 216000000 | ||
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/*-------------------------------- CORTEX_M7 --------------------------------*/ | ||
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#define MX_CORTEX_M7 1 | ||
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/* GPIO Configuration */ | ||
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/*-------------------------------- ETH --------------------------------*/ | ||
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#define MX_ETH 1 | ||
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/* GPIO Configuration */ | ||
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/* Pin PA1 */ | ||
#define MX_ETH_REF_CLK_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_REF_CLK_Pin PA1 | ||
#define MX_ETH_REF_CLK_GPIOx GPIOA | ||
#define MX_ETH_REF_CLK_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_REF_CLK_GPIO_Pin GPIO_PIN_1 | ||
#define MX_ETH_REF_CLK_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_REF_CLK_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PA7 */ | ||
#define MX_ETH_CRS_DV_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_CRS_DV_Pin PA7 | ||
#define MX_ETH_CRS_DV_GPIOx GPIOA | ||
#define MX_ETH_CRS_DV_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_CRS_DV_GPIO_Pin GPIO_PIN_7 | ||
#define MX_ETH_CRS_DV_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_CRS_DV_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PC4 */ | ||
#define MX_ETH_RXD0_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_RXD0_Pin PC4 | ||
#define MX_ETH_RXD0_GPIOx GPIOC | ||
#define MX_ETH_RXD0_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_RXD0_GPIO_Pin GPIO_PIN_4 | ||
#define MX_ETH_RXD0_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_RXD0_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PC5 */ | ||
#define MX_ETH_RXD1_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_RXD1_Pin PC5 | ||
#define MX_ETH_RXD1_GPIOx GPIOC | ||
#define MX_ETH_RXD1_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_RXD1_GPIO_Pin GPIO_PIN_5 | ||
#define MX_ETH_RXD1_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_RXD1_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PG11 */ | ||
#define MX_ETH_TX_EN_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_TX_EN_Pin PG11 | ||
#define MX_ETH_TX_EN_GPIOx GPIOG | ||
#define MX_ETH_TX_EN_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_TX_EN_GPIO_Pin GPIO_PIN_11 | ||
#define MX_ETH_TX_EN_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_TX_EN_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PA2 */ | ||
#define MX_ETH_MDIO_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_MDIO_Pin PA2 | ||
#define MX_ETH_MDIO_GPIOx GPIOA | ||
#define MX_ETH_MDIO_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_MDIO_GPIO_Pin GPIO_PIN_2 | ||
#define MX_ETH_MDIO_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_MDIO_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PB13 */ | ||
#define MX_ETH_TXD1_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_TXD1_Pin PB13 | ||
#define MX_ETH_TXD1_GPIOx GPIOB | ||
#define MX_ETH_TXD1_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_TXD1_GPIO_Pin GPIO_PIN_13 | ||
#define MX_ETH_TXD1_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_TXD1_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PG13 */ | ||
#define MX_ETH_TXD0_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_TXD0_Pin PG13 | ||
#define MX_ETH_TXD0_GPIOx GPIOG | ||
#define MX_ETH_TXD0_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_TXD0_GPIO_Pin GPIO_PIN_13 | ||
#define MX_ETH_TXD0_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_TXD0_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* Pin PC1 */ | ||
#define MX_ETH_MDC_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_ETH_MDC_Pin PC1 | ||
#define MX_ETH_MDC_GPIOx GPIOC | ||
#define MX_ETH_MDC_GPIO_PuPd GPIO_NOPULL | ||
#define MX_ETH_MDC_GPIO_Pin GPIO_PIN_1 | ||
#define MX_ETH_MDC_GPIO_AF GPIO_AF11_ETH | ||
#define MX_ETH_MDC_GPIO_Mode GPIO_MODE_AF_PP | ||
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/* NVIC Configuration */ | ||
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/* NVIC ETH_IRQn */ | ||
#define MX_ETH_IRQn_interruptPremptionPriority 0 | ||
#define MX_ETH_IRQn_PriorityGroup NVIC_PRIORITYGROUP_4 | ||
#define MX_ETH_IRQn_Subriority 0 | ||
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/*-------------------------------- RNG --------------------------------*/ | ||
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#define MX_RNG 1 | ||
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/* GPIO Configuration */ | ||
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/*-------------------------------- SYS --------------------------------*/ | ||
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#define MX_SYS 1 | ||
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/* GPIO Configuration */ | ||
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/*-------------------------------- USART3 --------------------------------*/ | ||
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#define MX_USART3 1 | ||
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#define MX_USART3_VM VM_ASYNC | ||
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/* GPIO Configuration */ | ||
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/* Pin PD8 */ | ||
#define MX_USART3_TX_GPIO_ModeDefaultPP GPIO_MODE_AF_PP | ||
#define MX_USART3_TX_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_USART3_TX_Pin PD8 | ||
#define MX_USART3_TX_GPIOx GPIOD | ||
#define MX_USART3_TX_GPIO_PuPd GPIO_NOPULL | ||
#define MX_USART3_TX_GPIO_Pin GPIO_PIN_8 | ||
#define MX_USART3_TX_GPIO_AF GPIO_AF7_USART3 | ||
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/* Pin PD9 */ | ||
#define MX_USART3_RX_GPIO_ModeDefaultPP GPIO_MODE_AF_PP | ||
#define MX_USART3_RX_GPIO_Speed GPIO_SPEED_FREQ_VERY_HIGH | ||
#define MX_USART3_RX_Pin PD9 | ||
#define MX_USART3_RX_GPIOx GPIOD | ||
#define MX_USART3_RX_GPIO_PuPd GPIO_NOPULL | ||
#define MX_USART3_RX_GPIO_Pin GPIO_PIN_9 | ||
#define MX_USART3_RX_GPIO_AF GPIO_AF7_USART3 | ||
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/*-------------------------------- NVIC --------------------------------*/ | ||
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#define MX_NVIC 1 | ||
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/*-------------------------------- GPIO --------------------------------*/ | ||
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#define MX_GPIO 1 | ||
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/* GPIO Configuration */ | ||
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/* Pin PB7 */ | ||
#define MX_PB7_GPIO_Speed GPIO_SPEED_FREQ_LOW | ||
#define MX_PB7_Pin PB7 | ||
#define MX_PB7_GPIOx GPIOB | ||
#define MX_PB7_PinState GPIO_PIN_RESET | ||
#define MX_PB7_GPIO_PuPd GPIO_NOPULL | ||
#define MX_PB7_GPIO_Pin GPIO_PIN_7 | ||
#define MX_PB7_GPIO_ModeDefaultOutputPP GPIO_MODE_OUTPUT_PP | ||
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#endif /* __MX_DEVICE_H */ | ||
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examples/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/Makefile
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CFLAGS = -W -Wall -Wextra -Werror -Wundef -Wshadow -Wdouble-promotion | ||
CFLAGS += -Wformat-truncation -fno-common -Wconversion -Wno-sign-conversion | ||
CFLAGS += -g3 -Os -ffunction-sections -fdata-sections | ||
CFLAGS += -I. | ||
# CMSIS Driver specifics, and its dependencies | ||
CFLAGS += -Icmsis_core/CMSIS/Core/Include # CMSIS core headers | ||
CFLAGS += -Icmsis_core/CMSIS/Driver/Include -Icmsis_driver/ETH # CMSIS Driver core and ETH headers | ||
CFLAGS += -Icmsis_mcu/CMSIS/Driver # CMSIS Driver device driver headers | ||
CFLAGS += -D__MEMORY_AT\(x\)= # disable using specific memory address for Eth buffers | ||
CFLAGS += -Icmsis_mcu/Drivers/CMSIS/Device/ST/STM32F7xx/Include -DSTM32F746xx # CMSIS device headers | ||
CFLAGS += -Icmsis_mcu/Drivers/STM32F7xx_HAL_Driver/Inc/ # HAL headers, required by CMSIS Driver device driver (HAL-based) | ||
CFLAGS += -Icmsis_mcu/MDK/Templates/Inc/ # pull stm32f7xx_hal_conf.h (HAL configuration) | ||
CFLAGS += -DRTE_DEVICE_HAL_ETH -DRTE_DEVICE_HAL_GPIO -DRTE_DEVICE_HAL_RCC # configure it | ||
CFLAGS += -DRTE_DEVICE_HAL_COMMON -DRTE_DEVICE_FRAMEWORK_CUBE_MX | ||
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CFLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 | ||
LDFLAGS ?= -Tlink.ld -nostdlib -nostartfiles --specs nano.specs -lc -lgcc -Wl,--gc-sections -Wl,-Map=$@.map | ||
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SOURCES = main.c syscalls.c sysinit.c | ||
# CMSIS Driver specifics, and its dependencies | ||
SOURCES += cmsis_driver/ETH/PHY_LAN8742A.c # CMSIS Driver for the PHY present in this board | ||
CFLAGS += -Wno-conversion # avoid warnings when building it | ||
SOURCES += cmsis_mcu/CMSIS/Driver/EMAC_STM32F7xx.c # CMSIS Driver for EMAC peripheral | ||
SOURCES += cmsis_mcu/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_eth.c # HAL sources required by the driver | ||
SOURCES += cmsis_mcu/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_rcc.c | ||
SOURCES += cmsis_mcu/Drivers/CMSIS/Device/ST/STM32F7xx/Source/Templates/gcc/startup_stm32f746xx.s # ST startup file. Compiler-dependent! | ||
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# Mongoose-specific. See https://mongoose.ws/documentation/#build-options | ||
SOURCES += mongoose.c net.c packed_fs.c | ||
CFLAGS += -DMG_ENABLE_TCPIP=1 -DMG_ARCH=MG_ARCH_NEWLIB -DMG_ENABLE_CUSTOM_MILLIS=1 | ||
CFLAGS += -DMG_ENABLE_CUSTOM_RANDOM=1 -DMG_ENABLE_PACKED_FS=1 | ||
CFLAGS += -DMG_ENABLE_DRIVER_CMSIS=1 $(CFLAGS_EXTRA) | ||
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# Example specific build options. See README.md | ||
CFLAGS += -DHTTP_URL=\"http://0.0.0.0/\" -DHTTPS_URL=\"https://0.0.0.0/\" | ||
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ifeq ($(OS),Windows_NT) | ||
RM = cmd /C del /Q /F /S | ||
else | ||
RM = rm -rf | ||
endif | ||
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all build example: firmware.bin | ||
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firmware.bin: firmware.elf | ||
arm-none-eabi-objcopy -O binary $< $@ | ||
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firmware.elf: cmsis_core cmsis_driver cmsis_mcu $(SOURCES) hal.h link.ld Makefile | ||
arm-none-eabi-gcc $(SOURCES) $(CFLAGS) $(LDFLAGS) -o $@ | ||
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flash: firmware.bin | ||
st-flash --reset write $< 0x8000000 | ||
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cmsis_core: # ARM CMSIS core headers | ||
git clone --depth 1 -b 5.9.0 https://github.com/ARM-software/CMSIS_5 $@ | ||
cmsis_driver: # ARM CMSIS Driver code and headers | ||
git clone --depth 1 -b 2.7.2 https://github.com/ARM-software/CMSIS-Driver $@ | ||
cmsis_mcu: # Keil CMSIS headers and drivers for STM32F7 series (CMSIS-pack) | ||
curl -sL https://www.keil.com/pack/Keil.STM32F7xx_DFP.2.15.2.pack -o $@.zip | ||
mkdir $@ && cd $@ && unzip -q ../$@.zip | ||
mbedtls: # mbedTLS library | ||
git clone --depth 1 -b v2.28.2 https://github.com/mbed-tls/mbedtls $@ | ||
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ifeq ($(TLS), mbedtls) | ||
CFLAGS += -DMG_TLS=MG_TLS_MBED -Wno-conversion -Imbedtls/include | ||
CFLAGS += -DMBEDTLS_CONFIG_FILE=\"mbedtls_config.h\" mbedtls/library/*.c | ||
firmware.elf: mbedtls | ||
endif | ||
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# Automated remote test. Requires env variable VCON_API_KEY set. See https://vcon.io/automated-firmware-tests/ | ||
DEVICE_URL ?= https://dash.vcon.io/api/v3/devices/5 | ||
update: firmware.bin | ||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/ota --data-binary @$< | ||
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test update: CFLAGS += -DUART_DEBUG=USART1 | ||
test: update | ||
curl --fail-with-body -su :$(VCON_API_KEY) $(DEVICE_URL)/tx?t=5 | tee /tmp/output.txt | ||
grep 'READY, IP:' /tmp/output.txt # Check for network init | ||
# grep 'MQTT connected' /tmp/output.txt # Check for MQTT connection success | ||
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clean: | ||
$(RM) firmware.* *.su cmsis_core cmsis_driver cmsis_mcu* mbedtls |
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examples/stm32/nucleo-f746zg-make-baremetal-builtin-cmsis_driver/README.md
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# CMSIS-Driver example | ||
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Mongoose includes a driver for CMSIS-Driver, that is, Mongoose built-in TCP/IP stack can run over any (ARM) chip that has a CMSIS Driver for its Ethernet controller, and uses a PHY that also has a CMSIS Driver. You can follow this example to use Mongoose there, the Makefile in this example performs the following list of actions. | ||
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Actions: | ||
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- Pull CMSIS core, this also includes the basic support for CMSIS Driver | ||
- Pull CMSIS Driver, this repository has driver code for several widely used PHYs and some Ethernet chips (stand-alone controllers, not MCUs) | ||
- Pull the device family CMSIS Pack, this includes CMSIS headers and also includes CMSIS Drivers for those peripherals that have Middleware (Ethernet, CAN, UART...) available | ||
- The rest of the job is to find and solve the driver dependencies. In this example, the CMSIS Driver for the STM32F746 uses the STM32 HAL, so we have copied some files from an STM32CubeMX generated project in order to have some defines available, then picked the correct sources to compile, and provided a HAL_GetTick() function to satisfy those parts of the HAL that use it, without having to include more pieces of the HAL, as we already have a time base in place. | ||
- Finally, | ||
- enable the driver by defining `MG_ENABLE_DRIVER_CMSIS=1` | ||
- select it in your `main.c` | ||
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```c | ||
struct mg_tcpip_if mif = {.driver = &mg_tcpip_driver_cmsis} | ||
``` |
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