{"payload":{"header_redesign_enabled":false,"results":[{"id":"161159032","archived":false,"color":"#b2b7f8","followers":0,"has_funding_file":false,"hl_name":"chamin96/CO224-Building-a-Processor","hl_trunc_description":"Lab 5 - CO224 Computer Architecture Project","language":"Verilog","mirror":false,"owned_by_organization":false,"public":true,"repo":{"repository":{"id":161159032,"name":"CO224-Building-a-Processor","owner_id":33717507,"owner_login":"chamin96","updated_at":"2019-01-28T04:50:56.646Z","has_issues":true}},"sponsorable":false,"topics":["cpu","verilog","hdl","implementing"],"type":"Public","help_wanted_issues_count":0,"good_first_issue_issues_count":0,"starred_by_current_user":false}],"type":"repositories","page":1,"page_count":1,"elapsed_millis":80,"errors":[],"result_count":1,"facets":[],"protected_org_logins":[],"topics":null,"query_id":"","logged_in":false,"sign_up_path":"/signup?source=code_search_results","sign_in_path":"/login?return_to=https%3A%2F%2Fgithub.com%2Fsearch%3Fq%3Drepo%253Achamin96%252FCO224-Building-a-Processor%2B%2Blanguage%253AVerilog","metadata":null,"warn_limited_results":false,"csrf_tokens":{"/chamin96/CO224-Building-a-Processor/star":{"post":"fac7QkxhMSVt8Ve1BGLEVur5anxnCExbx4znTTWo0gsa6MzSusVrUtUUQLzIbxE1uHWonlGtq2cCpKMUgCeczw"},"/chamin96/CO224-Building-a-Processor/unstar":{"post":"ifnaGCO2rkq5Dn7jt2j-BRkpejKN2DBGPLb4-tRRnDNmZ5JGho6KN4yxgpPg7-ufaN20PkZCZAtgj0ZoV2Gj7g"},"/sponsors/batch_deferred_sponsor_buttons":{"post":"kJfaDrE4uw_R3B2cVQt-QODvrirqI2ALYHSNb3b4AcOQKMvg4jSBDfzVFfbYn588dfnEyz2IHOM7C_UgodEPWA"}}},"title":"Repository search results"}