Add OTP RDL and registers

For the OpenTitan fuse (one-time programmable) controller, and
also for the related entropy sources.

These RDLs is added in the `caliptra-ss` repo at commit:
chipsalliance/caliptra-ss@984f228

I also slightly changed the register names to also include their most
recent sub-block name so that the digest register names would be less
confusing. This caused some changes to the I3C register names (which
I've fixed the corresponding code for).

emulator/app/src/main.rs

@@ -372,6 +372,8 @@ fn run(cli: Emulator, capture_uart_output: bool) -> io::Result<Vec<u8>> {
         None,
         None,
         None,
+        None,
+        None,
     );
 
     let cpu = Cpu::new(auto_root_bus, clock, pic);

emulator/periph/src/flash_ctrl.rs

@@ -498,7 +498,17 @@ mod test {
             DummyFlashCtrl::new(clock, file, flash_ctrl_error_irq, flash_ctrl_event_irq).unwrap(),
         );
 
-        AutoRootBus::new(None, None, Some(flash_controller), None, None, None, None)
+        AutoRootBus::new(
+            None,
+            None,
+            Some(flash_controller),
+            None,
+            None,
+            None,
+            None,
+            None,
+            None,
+        )
     }
 
     fn test_helper_prepare_io_page_buffer(

emulator/periph/src/i3c.rs

@@ -405,7 +405,7 @@ mod tests {
             .tcri_send(DynamicI3cAddress::new(8).unwrap(), cmd)
             .unwrap();
 
-        let mut bus = AutoRootBus::new(None, Some(i3c), None, None, None, None, None);
+        let mut bus = AutoRootBus::new(None, Some(i3c), None, None, None, None, None, None, None);
         for _ in 0..10000 {
             clock.increment_and_process_timer_actions(1, &mut bus);
         }

hw/el2_pic_ctrl.rdl

@@ -85,8 +85,4 @@ addrmap el2_pic_ctrl {
                     desc = "Reserved";
                 } RESERVED[31:0];
     } meigwclr[256] @0x00005000;
-};
-
-addrmap el2_pic {
-    el2_pic_ctrl el2_pic_ctrl @ 0x6000_0000;
 };

hw/flash_ctrl.rdl

@@ -76,8 +76,4 @@ addrmap flash_ctrl {
 
         } EN[0:0];
     } CTRL_REGWEN @ 0x1C;
-};
-
-addrmap flashctrl_dummy {
-    flash_ctrl flash_ctrl @ 0x2000_8000;
 };

hw/mcu.rdl

@@ -0,0 +1,6 @@
+addrmap mcu {
+    el2_pic_ctrl el2_pic_ctrl @ 0x6000_0000;
+    flash_ctrl flash_ctrl @ 0x2000_8000;
+    entropy_src entropy_src @ 0x2000_9000;
+    caliptra_otp_ctrl caliptra_otp_ctrl @ 0x2000_b000;
+};