Allow specification of multiple pack patterns

Signed-off-by: Maciej Kurc <mkurc@antmicro.com>
chipsalliance · Sep 28, 2020 · cf995ab · cf995ab
1 parent 4b31933
commit cf995ab
Showing 1 changed file with 16 additions and 10 deletions.
diff --git a/v2x/vlog_to_pbtype.py b/v2x/vlog_to_pbtype.py
@@ -53,6 +53,10 @@
     - `(* carry = ADDER *)` : specify carry chain pack_pattern associated
                               with this wire
 
+    - `(* PACK = "<name1>[;<name2>[..]]" *)` : List of semicolon-separated
+                                               pack pattern names to be used
+                                               for a wire.
+
 The following are allowed on ports:
     - `(* CLOCK *)` or `(* CLOCK=1 *)` : force a given port to be a clock
 
@@ -237,16 +241,18 @@ def make_direct_conn(
     create_port(dir_xml, driver, "input")
     create_port(dir_xml, sink, "output")
 
-    pack_name = path_attr.get('pack', False)
-    if pack_name:
-        pp_xml = ET.SubElement(
-            dir_xml, 'pack_pattern', {
-                'name': pack_name,
-                'type': 'pack'
-            }
-        )
-        create_port(pp_xml, driver, "input")
-        create_port(pp_xml, sink, "output")
+    # Pack patterns
+    pack = path_attr.get('pack', path_attr.get('PACK', None))
+    if pack is not None:
+        for pack_name in pack.split(";"):
+            pp_xml = ET.SubElement(
+                dir_xml, 'pack_pattern', {
+                    'name': pack_name,
+                    'type': 'pack'
+                }
+            )
+            create_port(pp_xml, driver, "input")
+            create_port(pp_xml, sink, "output")
 
     carry_name = path_attr.get('carry', None)
     if carry_name: