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Implement ARM64 Support #3

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Implement ARM64 Support #3

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d3bd472
Don't Build Fairplay Code For ARM64
CuriousTommy Nov 1, 2023
afa4ab6
Avoid Executing Code That Use mremap_encrypted
CuriousTommy Feb 25, 2024
f556245
Modify "_tlv_get_addr" To Support Calling "___darling_thread_get_tsd"
CuriousTommy Jun 23, 2024
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3 changes: 2 additions & 1 deletion dyld3/Loading.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -679,7 +679,8 @@ void Loader::mapImage(Diagnostics& diag, LoadedImage& info, bool fromOFI, bool*

#endif

#if (__arm__ || __arm64__) && !TARGET_OS_SIMULATOR
// Darling: It's unlikely we will support fairplay
#if (__arm__ || __arm64__) && !TARGET_OS_SIMULATOR && !DARLING
// tell kernel about fairplay encrypted regions
uint32_t fpTextOffset;
uint32_t fpSize;
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3 changes: 2 additions & 1 deletion src/ImageLoaderMachOCompressed.cpp
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Expand Up @@ -2125,7 +2125,8 @@ void ImageLoaderMachOCompressed::updateOptimizedLazyPointers(const LinkContext&

void ImageLoaderMachOCompressed::registerEncryption(const encryption_info_command* encryptCmd, const LinkContext& context)
{
#if (__arm__ || __arm64__) && !TARGET_OS_SIMULATOR
// Darling: It's unlikely we will support fairplay
#if (__arm__ || __arm64__) && !TARGET_OS_SIMULATOR && !DARLING
if ( encryptCmd == NULL )
return;
// fMachOData not set up yet, need to manually find mach_header
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63 changes: 63 additions & 0 deletions src/threadLocalHelpers.S
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Original file line number Diff line number Diff line change
Expand Up @@ -228,12 +228,40 @@ LlazyAllocate:
.globl _tlv_get_addr
.private_extern _tlv_get_addr
_tlv_get_addr:
#if DARLING
// Since "___darling_thread_get_tsd" is a C function, _tlv_get_addr &
// LlazyAllocate will need to be partically rewritten with this in mind.
// We will reuse some of logic from "LlazyAllocate" in "_tlv_get_addr"
stp fp, lr, [sp, #-16]!
mov fp, sp

stp x1, x2, [sp, #-16]! // save all registers that C function might trash
stp x3, x4, [sp, #-16]!
stp x5, x6, [sp, #-16]!
stp x7, x8, [sp, #-16]!
stp x9, x10, [sp, #-16]!
stp x11, x12, [sp, #-16]!
stp x13, x14, [sp, #-16]!
str x15, [sp, #-16]!
stp q0, q1, [sp, #-32]!
stp q2, q3, [sp, #-32]!
stp q4, q5, [sp, #-32]!
stp q6, q7, [sp, #-32]!
#endif

#if __LP64__
ldr x16, [x0, #8] // get key from descriptor
#else
ldr w16, [x0, #4] // get key from descriptor
#endif
#if DARLING
stp x0, x16, [sp, #-16]!
bl ___darling_thread_get_tsd
mov x17, x0 // Move result to x17
ldp x0, x16, [sp], #16
#else
mrs x17, TPIDRRO_EL0
#endif
and x17, x17, #-8 // clear low 3 bits???
#if __LP64__
ldr x17, [x17, x16, lsl #3] // get thread allocation address for this key
Expand All @@ -247,8 +275,42 @@ _tlv_get_addr:
ldr w16, [x0, #8] // get offset from descriptor
#endif
add x0, x17, x16 // return allocation+offset
#if DARLING
b LReturn
LlazyAllocate:
str x16, [sp, #-16]! // save register
stp x0, x17, [sp, #-16]! // save descriptor
mov x0, x16 // use key from descriptor as parameter
bl _tlv_allocate_and_initialize_for_key
ldp x16, x17, [sp], #16 // pop descriptor (part 1)
#if __LP64__
ldr x16, [x16, #16] // get offset from descriptor
#else
ldr w16, [x16, #8] // get offset from descriptor
#endif
add x0, x0, x16 // return allocation+offset
ldr x16, [sp], #16 // restore register
LReturn:
ldp q6, q7, [sp], #32
ldp q4, q5, [sp], #32
ldp q2, q3, [sp], #32
ldp q0, q1, [sp], #32
ldr x15, [sp], #16
ldp x13, x14, [sp], #16
ldp x11, x12, [sp], #16
ldp x9, x10, [sp], #16
ldp x7, x8, [sp], #16
ldp x5, x6, [sp], #16
ldp x3, x4, [sp], #16
ldp x1, x2, [sp], #16

mov sp, fp
ldp fp, lr, [sp], #16
#endif
ret lr


#if !DARLING
LlazyAllocate:
#if __has_feature(ptrauth_returns)
pacibsp
Expand Down Expand Up @@ -300,6 +362,7 @@ LlazyAllocate:
#else
ret
#endif
#endif // #if !DARLING

#endif

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